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path: root/drivers/net/wireless/ath/ath9k/ar9002_hw.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9002_hw.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_hw.c48
1 files changed, 24 insertions, 24 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
index b54ab78fb09..626d547d2f0 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
@@ -30,7 +30,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
30{ 30{
31 if (AR_SREV_9271(ah)) { 31 if (AR_SREV_9271(ah)) {
32 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271, 32 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
33 ARRAY_SIZE(ar9271Modes_9271), 6); 33 ARRAY_SIZE(ar9271Modes_9271), 5);
34 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271, 34 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
35 ARRAY_SIZE(ar9271Common_9271), 2); 35 ARRAY_SIZE(ar9271Common_9271), 2);
36 INIT_INI_ARRAY(&ah->iniCommon_normal_cck_fir_coeff_9271, 36 INIT_INI_ARRAY(&ah->iniCommon_normal_cck_fir_coeff_9271,
@@ -41,21 +41,21 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
41 ARRAY_SIZE(ar9271Common_japan_2484_cck_fir_coeff_9271), 2); 41 ARRAY_SIZE(ar9271Common_japan_2484_cck_fir_coeff_9271), 2);
42 INIT_INI_ARRAY(&ah->iniModes_9271_1_0_only, 42 INIT_INI_ARRAY(&ah->iniModes_9271_1_0_only,
43 ar9271Modes_9271_1_0_only, 43 ar9271Modes_9271_1_0_only,
44 ARRAY_SIZE(ar9271Modes_9271_1_0_only), 6); 44 ARRAY_SIZE(ar9271Modes_9271_1_0_only), 5);
45 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg, 45 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
46 ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 6); 46 ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 5);
47 INIT_INI_ARRAY(&ah->iniModes_high_power_tx_gain_9271, 47 INIT_INI_ARRAY(&ah->iniModes_high_power_tx_gain_9271,
48 ar9271Modes_high_power_tx_gain_9271, 48 ar9271Modes_high_power_tx_gain_9271,
49 ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 6); 49 ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 5);
50 INIT_INI_ARRAY(&ah->iniModes_normal_power_tx_gain_9271, 50 INIT_INI_ARRAY(&ah->iniModes_normal_power_tx_gain_9271,
51 ar9271Modes_normal_power_tx_gain_9271, 51 ar9271Modes_normal_power_tx_gain_9271,
52 ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 6); 52 ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 5);
53 return; 53 return;
54 } 54 }
55 55
56 if (AR_SREV_9287_11_OR_LATER(ah)) { 56 if (AR_SREV_9287_11_OR_LATER(ah)) {
57 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1, 57 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
58 ARRAY_SIZE(ar9287Modes_9287_1_1), 6); 58 ARRAY_SIZE(ar9287Modes_9287_1_1), 5);
59 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1, 59 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,
60 ARRAY_SIZE(ar9287Common_9287_1_1), 2); 60 ARRAY_SIZE(ar9287Common_9287_1_1), 2);
61 if (ah->config.pcie_clock_req) 61 if (ah->config.pcie_clock_req)
@@ -71,7 +71,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
71 71
72 72
73 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2, 73 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
74 ARRAY_SIZE(ar9285Modes_9285_1_2), 6); 74 ARRAY_SIZE(ar9285Modes_9285_1_2), 5);
75 INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2, 75 INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,
76 ARRAY_SIZE(ar9285Common_9285_1_2), 2); 76 ARRAY_SIZE(ar9285Common_9285_1_2), 2);
77 77
@@ -87,7 +87,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
87 } 87 }
88 } else if (AR_SREV_9280_20_OR_LATER(ah)) { 88 } else if (AR_SREV_9280_20_OR_LATER(ah)) {
89 INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2, 89 INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,
90 ARRAY_SIZE(ar9280Modes_9280_2), 6); 90 ARRAY_SIZE(ar9280Modes_9280_2), 5);
91 INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2, 91 INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
92 ARRAY_SIZE(ar9280Common_9280_2), 2); 92 ARRAY_SIZE(ar9280Common_9280_2), 2);
93 93
@@ -105,7 +105,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
105 ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3); 105 ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
106 } else if (AR_SREV_9160_10_OR_LATER(ah)) { 106 } else if (AR_SREV_9160_10_OR_LATER(ah)) {
107 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160, 107 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,
108 ARRAY_SIZE(ar5416Modes_9160), 6); 108 ARRAY_SIZE(ar5416Modes_9160), 5);
109 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160, 109 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,
110 ARRAY_SIZE(ar5416Common_9160), 2); 110 ARRAY_SIZE(ar5416Common_9160), 2);
111 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9160, 111 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9160,
@@ -134,7 +134,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
134 } 134 }
135 } else if (AR_SREV_9100_OR_LATER(ah)) { 135 } else if (AR_SREV_9100_OR_LATER(ah)) {
136 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100, 136 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,
137 ARRAY_SIZE(ar5416Modes_9100), 6); 137 ARRAY_SIZE(ar5416Modes_9100), 5);
138 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100, 138 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,
139 ARRAY_SIZE(ar5416Common_9100), 2); 139 ARRAY_SIZE(ar5416Common_9100), 2);
140 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9100, 140 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9100,
@@ -157,7 +157,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
157 ARRAY_SIZE(ar5416Addac_9100), 2); 157 ARRAY_SIZE(ar5416Addac_9100), 2);
158 } else { 158 } else {
159 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes, 159 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,
160 ARRAY_SIZE(ar5416Modes), 6); 160 ARRAY_SIZE(ar5416Modes), 5);
161 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common, 161 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,
162 ARRAY_SIZE(ar5416Common), 2); 162 ARRAY_SIZE(ar5416Common), 2);
163 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0, 163 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,
@@ -207,19 +207,19 @@ static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
207 if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF) 207 if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
208 INIT_INI_ARRAY(&ah->iniModesRxGain, 208 INIT_INI_ARRAY(&ah->iniModesRxGain,
209 ar9280Modes_backoff_13db_rxgain_9280_2, 209 ar9280Modes_backoff_13db_rxgain_9280_2,
210 ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 6); 210 ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 5);
211 else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF) 211 else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)
212 INIT_INI_ARRAY(&ah->iniModesRxGain, 212 INIT_INI_ARRAY(&ah->iniModesRxGain,
213 ar9280Modes_backoff_23db_rxgain_9280_2, 213 ar9280Modes_backoff_23db_rxgain_9280_2,
214 ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 6); 214 ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 5);
215 else 215 else
216 INIT_INI_ARRAY(&ah->iniModesRxGain, 216 INIT_INI_ARRAY(&ah->iniModesRxGain,
217 ar9280Modes_original_rxgain_9280_2, 217 ar9280Modes_original_rxgain_9280_2,
218 ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 6); 218 ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
219 } else { 219 } else {
220 INIT_INI_ARRAY(&ah->iniModesRxGain, 220 INIT_INI_ARRAY(&ah->iniModesRxGain,
221 ar9280Modes_original_rxgain_9280_2, 221 ar9280Modes_original_rxgain_9280_2,
222 ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 6); 222 ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
223 } 223 }
224} 224}
225 225
@@ -234,15 +234,15 @@ static void ar9280_20_hw_init_txgain_ini(struct ath_hw *ah)
234 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) 234 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
235 INIT_INI_ARRAY(&ah->iniModesTxGain, 235 INIT_INI_ARRAY(&ah->iniModesTxGain,
236 ar9280Modes_high_power_tx_gain_9280_2, 236 ar9280Modes_high_power_tx_gain_9280_2,
237 ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 6); 237 ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 5);
238 else 238 else
239 INIT_INI_ARRAY(&ah->iniModesTxGain, 239 INIT_INI_ARRAY(&ah->iniModesTxGain,
240 ar9280Modes_original_tx_gain_9280_2, 240 ar9280Modes_original_tx_gain_9280_2,
241 ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 6); 241 ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
242 } else { 242 } else {
243 INIT_INI_ARRAY(&ah->iniModesTxGain, 243 INIT_INI_ARRAY(&ah->iniModesTxGain,
244 ar9280Modes_original_tx_gain_9280_2, 244 ar9280Modes_original_tx_gain_9280_2,
245 ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 6); 245 ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
246 } 246 }
247} 247}
248 248
@@ -251,14 +251,14 @@ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
251 if (AR_SREV_9287_11_OR_LATER(ah)) 251 if (AR_SREV_9287_11_OR_LATER(ah))
252 INIT_INI_ARRAY(&ah->iniModesRxGain, 252 INIT_INI_ARRAY(&ah->iniModesRxGain,
253 ar9287Modes_rx_gain_9287_1_1, 253 ar9287Modes_rx_gain_9287_1_1,
254 ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 6); 254 ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 5);
255 else if (AR_SREV_9280_20(ah)) 255 else if (AR_SREV_9280_20(ah))
256 ar9280_20_hw_init_rxgain_ini(ah); 256 ar9280_20_hw_init_rxgain_ini(ah);
257 257
258 if (AR_SREV_9287_11_OR_LATER(ah)) { 258 if (AR_SREV_9287_11_OR_LATER(ah)) {
259 INIT_INI_ARRAY(&ah->iniModesTxGain, 259 INIT_INI_ARRAY(&ah->iniModesTxGain,
260 ar9287Modes_tx_gain_9287_1_1, 260 ar9287Modes_tx_gain_9287_1_1,
261 ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 6); 261 ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 5);
262 } else if (AR_SREV_9280_20(ah)) { 262 } else if (AR_SREV_9280_20(ah)) {
263 ar9280_20_hw_init_txgain_ini(ah); 263 ar9280_20_hw_init_txgain_ini(ah);
264 } else if (AR_SREV_9285_12_OR_LATER(ah)) { 264 } else if (AR_SREV_9285_12_OR_LATER(ah)) {
@@ -270,24 +270,24 @@ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
270 INIT_INI_ARRAY(&ah->iniModesTxGain, 270 INIT_INI_ARRAY(&ah->iniModesTxGain,
271 ar9285Modes_XE2_0_high_power, 271 ar9285Modes_XE2_0_high_power,
272 ARRAY_SIZE( 272 ARRAY_SIZE(
273 ar9285Modes_XE2_0_high_power), 6); 273 ar9285Modes_XE2_0_high_power), 5);
274 } else { 274 } else {
275 INIT_INI_ARRAY(&ah->iniModesTxGain, 275 INIT_INI_ARRAY(&ah->iniModesTxGain,
276 ar9285Modes_high_power_tx_gain_9285_1_2, 276 ar9285Modes_high_power_tx_gain_9285_1_2,
277 ARRAY_SIZE( 277 ARRAY_SIZE(
278 ar9285Modes_high_power_tx_gain_9285_1_2), 6); 278 ar9285Modes_high_power_tx_gain_9285_1_2), 5);
279 } 279 }
280 } else { 280 } else {
281 if (AR_SREV_9285E_20(ah)) { 281 if (AR_SREV_9285E_20(ah)) {
282 INIT_INI_ARRAY(&ah->iniModesTxGain, 282 INIT_INI_ARRAY(&ah->iniModesTxGain,
283 ar9285Modes_XE2_0_normal_power, 283 ar9285Modes_XE2_0_normal_power,
284 ARRAY_SIZE( 284 ARRAY_SIZE(
285 ar9285Modes_XE2_0_normal_power), 6); 285 ar9285Modes_XE2_0_normal_power), 5);
286 } else { 286 } else {
287 INIT_INI_ARRAY(&ah->iniModesTxGain, 287 INIT_INI_ARRAY(&ah->iniModesTxGain,
288 ar9285Modes_original_tx_gain_9285_1_2, 288 ar9285Modes_original_tx_gain_9285_1_2,
289 ARRAY_SIZE( 289 ARRAY_SIZE(
290 ar9285Modes_original_tx_gain_9285_1_2), 6); 290 ar9285Modes_original_tx_gain_9285_1_2), 5);
291 } 291 }
292 } 292 }
293 } 293 }