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path: root/drivers/net/tulip/tulip_core.c
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Diffstat (limited to 'drivers/net/tulip/tulip_core.c')
-rw-r--r--drivers/net/tulip/tulip_core.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index ee08292bcf8..e5e2c9c4ebf 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -292,6 +292,7 @@ static void tulip_up(struct net_device *dev)
292 struct tulip_private *tp = netdev_priv(dev); 292 struct tulip_private *tp = netdev_priv(dev);
293 void __iomem *ioaddr = tp->base_addr; 293 void __iomem *ioaddr = tp->base_addr;
294 int next_tick = 3*HZ; 294 int next_tick = 3*HZ;
295 u32 reg;
295 int i; 296 int i;
296 297
297#ifdef CONFIG_TULIP_NAPI 298#ifdef CONFIG_TULIP_NAPI
@@ -307,14 +308,14 @@ static void tulip_up(struct net_device *dev)
307 308
308 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */ 309 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
309 iowrite32(0x00000001, ioaddr + CSR0); 310 iowrite32(0x00000001, ioaddr + CSR0);
310 pci_read_config_dword(tp->pdev, PCI_COMMAND, &i); /* flush write */ 311 pci_read_config_dword(tp->pdev, PCI_COMMAND, &reg); /* flush write */
311 udelay(100); 312 udelay(100);
312 313
313 /* Deassert reset. 314 /* Deassert reset.
314 Wait the specified 50 PCI cycles after a reset by initializing 315 Wait the specified 50 PCI cycles after a reset by initializing
315 Tx and Rx queues and the address filter list. */ 316 Tx and Rx queues and the address filter list. */
316 iowrite32(tp->csr0, ioaddr + CSR0); 317 iowrite32(tp->csr0, ioaddr + CSR0);
317 pci_read_config_dword(tp->pdev, PCI_COMMAND, &i); /* flush write */ 318 pci_read_config_dword(tp->pdev, PCI_COMMAND, &reg); /* flush write */
318 udelay(100); 319 udelay(100);
319 320
320 if (tulip_debug > 1) 321 if (tulip_debug > 1)