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path: root/drivers/net/r8169.c
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Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r--drivers/net/r8169.c74
1 files changed, 4 insertions, 70 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index c821da21d8e..4b7cb389dc4 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -81,6 +81,10 @@ static const int multicast_filter_limit = 32;
81#define RTL8169_TX_TIMEOUT (6*HZ) 81#define RTL8169_TX_TIMEOUT (6*HZ)
82#define RTL8169_PHY_TIMEOUT (10*HZ) 82#define RTL8169_PHY_TIMEOUT (10*HZ)
83 83
84#define RTL_EEPROM_SIG cpu_to_le32(0x8129)
85#define RTL_EEPROM_SIG_MASK cpu_to_le32(0xffff)
86#define RTL_EEPROM_SIG_ADDR 0x0000
87
84/* write/read MMIO register */ 88/* write/read MMIO register */
85#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) 89#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
86#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) 90#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
@@ -1911,74 +1915,6 @@ static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp)
1911 } 1915 }
1912} 1916}
1913 1917
1914static int rtl_eeprom_read(struct pci_dev *pdev, int cap, int addr, __le32 *val)
1915{
1916 int ret, count = 100;
1917 u16 status = 0;
1918 u32 value;
1919
1920 ret = pci_write_config_word(pdev, cap + PCI_VPD_ADDR, addr);
1921 if (ret < 0)
1922 return ret;
1923
1924 do {
1925 udelay(10);
1926 ret = pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &status);
1927 if (ret < 0)
1928 return ret;
1929 } while (!(status & PCI_VPD_ADDR_F) && --count);
1930
1931 if (!(status & PCI_VPD_ADDR_F))
1932 return -ETIMEDOUT;
1933
1934 ret = pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &value);
1935 if (ret < 0)
1936 return ret;
1937
1938 *val = cpu_to_le32(value);
1939
1940 return 0;
1941}
1942
1943static void rtl_init_mac_address(struct rtl8169_private *tp,
1944 void __iomem *ioaddr)
1945{
1946 struct pci_dev *pdev = tp->pci_dev;
1947 u8 cfg1;
1948 int vpd_cap;
1949 u8 mac[8];
1950 DECLARE_MAC_BUF(buf);
1951
1952 cfg1 = RTL_R8(Config1);
1953 if (!(cfg1 & VPD)) {
1954 dprintk("VPD access not enabled, enabling\n");
1955 RTL_W8(Cfg9346, Cfg9346_Unlock);
1956 RTL_W8(Config1, cfg1 | VPD);
1957 RTL_W8(Cfg9346, Cfg9346_Lock);
1958 }
1959
1960 vpd_cap = pci_find_capability(pdev, PCI_CAP_ID_VPD);
1961 if (!vpd_cap)
1962 return;
1963
1964 /* MAC address is stored in EEPROM at offset 0x0e
1965 * Realtek says: "The VPD address does not have to be a DWORD-aligned
1966 * address as defined in the PCI 2.2 Specifications, but the VPD data
1967 * is always consecutive 4-byte data starting from the VPD address
1968 * specified."
1969 */
1970 if (rtl_eeprom_read(pdev, vpd_cap, 0x000e, (__le32*)&mac[0]) < 0 ||
1971 rtl_eeprom_read(pdev, vpd_cap, 0x0012, (__le32*)&mac[4]) < 0) {
1972 dprintk("Reading MAC address from EEPROM failed\n");
1973 return;
1974 }
1975
1976 dprintk("MAC address found in EEPROM: %s\n", print_mac(buf, mac));
1977
1978 /* Write MAC address */
1979 rtl_rar_set(tp, mac);
1980}
1981
1982static int __devinit 1918static int __devinit
1983rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 1919rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1984{ 1920{
@@ -2156,8 +2092,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2156 2092
2157 tp->mmio_addr = ioaddr; 2093 tp->mmio_addr = ioaddr;
2158 2094
2159 rtl_init_mac_address(tp, ioaddr);
2160
2161 /* Get MAC address */ 2095 /* Get MAC address */
2162 for (i = 0; i < MAC_ADDR_LEN; i++) 2096 for (i = 0; i < MAC_ADDR_LEN; i++)
2163 dev->dev_addr[i] = RTL_R8(MAC0 + i); 2097 dev->dev_addr[i] = RTL_R8(MAC0 + i);