1 files changed, 47 insertions, 31 deletions

diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h
index 1c46da63212..d138fc22927 100644
--- a/drivers/net/netxen/netxen_nic_hdr.h
+++ b/drivers/net/netxen/netxen_nic_hdr.h
@@ -545,6 +545,8 @@ enum {
 #define NETXEN_NIU_TEST_MUX_CTL         (NETXEN_CRB_NIU + 0x00094)
 #define NETXEN_NIU_XG_PAUSE_CTL         (NETXEN_CRB_NIU + 0x00098)
 #define NETXEN_NIU_XG_PAUSE_LEVEL       (NETXEN_CRB_NIU + 0x000dc)
+#define NETXEN_NIU_FRAME_COUNT_SELECT   (NETXEN_CRB_NIU + 0x000ac)
+#define NETXEN_NIU_FRAME_COUNT          (NETXEN_CRB_NIU + 0x000b0)
 #define NETXEN_NIU_XG_SEL               (NETXEN_CRB_NIU + 0x00128)
 #define NETXEN_NIU_GB_PAUSE_CTL         (NETXEN_CRB_NIU + 0x0030c)
 
@@ -662,40 +664,51 @@ enum {
 #define NETXEN_NIU_AP_STATION_ADDR_0(I)    (NETXEN_CRB_NIU+0xa0040+(I)*0x10000)
 #define NETXEN_NIU_AP_STATION_ADDR_1(I)    (NETXEN_CRB_NIU+0xa0044+(I)*0x10000)
 
+
+#define TEST_AGT_CTRL   (0x00)
+
+#define TA_CTL_START    1
+#define TA_CTL_ENABLE   2
+#define TA_CTL_WRITE    4
+#define TA_CTL_BUSY     8
+
 /*
  *   Register offsets for MN
  */
-#define MIU_CONTROL            (0x000)
-#define MIU_TEST_AGT_CTRL      (0x090)
-#define MIU_TEST_AGT_ADDR_LO   (0x094)
-#define MIU_TEST_AGT_ADDR_HI   (0x098)
-#define MIU_TEST_AGT_WRDATA_LO (0x0a0)
-#define MIU_TEST_AGT_WRDATA_HI (0x0a4)
-#define MIU_TEST_AGT_WRDATA(i) (0x0a0+(4*(i)))
-#define MIU_TEST_AGT_RDDATA_LO (0x0a8)
-#define MIU_TEST_AGT_RDDATA_HI (0x0ac)
-#define MIU_TEST_AGT_RDDATA(i) (0x0a8+(4*(i)))
-#define MIU_TEST_AGT_ADDR_MASK 0xfffffff8
-#define MIU_TEST_AGT_UPPER_ADDR(off) (0)
-
-/* MIU_TEST_AGT_CTRL flags. work for SIU as well */
-#define MIU_TA_CTL_START        1
-#define MIU_TA_CTL_ENABLE       2
-#define MIU_TA_CTL_WRITE        4
-#define MIU_TA_CTL_BUSY         8
-
-#define SIU_TEST_AGT_CTRL      (0x060)
-#define SIU_TEST_AGT_ADDR_LO   (0x064)
-#define SIU_TEST_AGT_ADDR_HI   (0x078)
-#define SIU_TEST_AGT_WRDATA_LO (0x068)
-#define SIU_TEST_AGT_WRDATA_HI (0x06c)
-#define SIU_TEST_AGT_WRDATA(i) (0x068+(4*(i)))
-#define SIU_TEST_AGT_RDDATA_LO (0x070)
-#define SIU_TEST_AGT_RDDATA_HI (0x074)
-#define SIU_TEST_AGT_RDDATA(i) (0x070+(4*(i)))
-
-#define SIU_TEST_AGT_ADDR_MASK 0x3ffff8
-#define SIU_TEST_AGT_UPPER_ADDR(off) ((off)>>22)
+#define MIU_TEST_AGT_BASE               (0x90)
+
+#define MIU_TEST_AGT_ADDR_LO            (0x04)
+#define MIU_TEST_AGT_ADDR_HI            (0x08)
+#define MIU_TEST_AGT_WRDATA_LO          (0x10)
+#define MIU_TEST_AGT_WRDATA_HI          (0x14)
+#define MIU_TEST_AGT_WRDATA_UPPER_LO    (0x20)
+#define MIU_TEST_AGT_WRDATA_UPPER_HI    (0x24)
+#define MIU_TEST_AGT_WRDATA(i)          (0x10+(0x10*((i)>>1))+(4*((i)&1)))
+#define MIU_TEST_AGT_RDDATA_LO          (0x18)
+#define MIU_TEST_AGT_RDDATA_HI          (0x1c)
+#define MIU_TEST_AGT_RDDATA_UPPER_LO    (0x28)
+#define MIU_TEST_AGT_RDDATA_UPPER_HI    (0x2c)
+#define MIU_TEST_AGT_RDDATA(i)          (0x18+(0x10*((i)>>1))+(4*((i)&1)))
+
+#define MIU_TEST_AGT_ADDR_MASK          0xfffffff8
+#define MIU_TEST_AGT_UPPER_ADDR(off)    (0)
+
+/*
+ *   Register offsets for MS
+ */
+#define SIU_TEST_AGT_BASE               (0x60)
+
+#define SIU_TEST_AGT_ADDR_LO            (0x04)
+#define SIU_TEST_AGT_ADDR_HI            (0x18)
+#define SIU_TEST_AGT_WRDATA_LO          (0x08)
+#define SIU_TEST_AGT_WRDATA_HI          (0x0c)
+#define SIU_TEST_AGT_WRDATA(i)          (0x08+(4*(i)))
+#define SIU_TEST_AGT_RDDATA_LO          (0x10)
+#define SIU_TEST_AGT_RDDATA_HI          (0x14)
+#define SIU_TEST_AGT_RDDATA(i)          (0x10+(4*(i)))
+
+#define SIU_TEST_AGT_ADDR_MASK          0x3ffff8
+#define SIU_TEST_AGT_UPPER_ADDR(off)    ((off)>>22)
 
 /* XG Link status */
 #define XG_LINK_UP      0x10
@@ -857,6 +870,9 @@ enum {
                 (PCIX_SN_WINDOW_F0 + (0x20 * (func))) :\
                 (PCIX_SN_WINDOW_F4 + (0x10 * ((func)-4))))
 
+#define PCIX_OCM_WINDOW         (0x10800)
+#define PCIX_OCM_WINDOW_REG(func)       (PCIX_OCM_WINDOW + 0x20 * (func))
+
 #define PCIX_TARGET_STATUS      (0x10118)
 #define PCIX_TARGET_STATUS_F1   (0x10160)
 #define PCIX_TARGET_STATUS_F2   (0x10164)