1 files changed, 16 insertions, 124 deletions

diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c
index 01ab916c280..add2008d890 100644
--- a/drivers/mmc/host/sdhci-of-core.c
+++ b/drivers/mmc/host/sdhci-of-core.c
@@ -22,62 +22,37 @@
 #include <linux/of_platform.h>
 #include <linux/mmc/host.h>
 #include <asm/machdep.h>
+#include "sdhci-of.h"
 #include "sdhci.h"
 
-struct sdhci_of_data {
-        unsigned int quirks;
-        struct sdhci_ops ops;
-};
-
-struct sdhci_of_host {
-        unsigned int clock;
-        u16 xfer_mode_shadow;
-};
+#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
 
 /*
- * Ops and quirks for the Freescale eSDHC controller.
+ * These accessors are designed for big endian hosts doing I/O to
+ * little endian controllers incorporating a 32-bit hardware byte swapper.
  */
 
-#define ESDHC_DMA_SYSCTL        0x40c
-#define ESDHC_DMA_SNOOP         0x00000040
-
-#define ESDHC_SYSTEM_CONTROL    0x2c
-#define ESDHC_CLOCK_MASK        0x0000fff0
-#define ESDHC_PREDIV_SHIFT      8
-#define ESDHC_DIVIDER_SHIFT     4
-#define ESDHC_CLOCK_PEREN       0x00000004
-#define ESDHC_CLOCK_HCKEN       0x00000002
-#define ESDHC_CLOCK_IPGEN       0x00000001
-
-#define ESDHC_HOST_CONTROL_RES  0x05
-
-static u32 esdhc_readl(struct sdhci_host *host, int reg)
+u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
 {
         return in_be32(host->ioaddr + reg);
 }
 
-static u16 esdhc_readw(struct sdhci_host *host, int reg)
+u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
 {
-        u16 ret;
-
-        if (unlikely(reg == SDHCI_HOST_VERSION))
-                ret = in_be16(host->ioaddr + reg);
-        else
-                ret = in_be16(host->ioaddr + (reg ^ 0x2));
-        return ret;
+        return in_be16(host->ioaddr + (reg ^ 0x2));
 }
 
-static u8 esdhc_readb(struct sdhci_host *host, int reg)
+u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
 {
         return in_8(host->ioaddr + (reg ^ 0x3));
 }
 
-static void esdhc_writel(struct sdhci_host *host, u32 val, int reg)
+void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
 {
         out_be32(host->ioaddr + reg, val);
 }
 
-static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
+void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
 {
         struct sdhci_of_host *of_host = sdhci_priv(host);
         int base = reg & ~0x3;
@@ -92,106 +67,21 @@ static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
                 of_host->xfer_mode_shadow = val;
                 return;
         case SDHCI_COMMAND:
-                esdhc_writel(host, val << 16 | of_host->xfer_mode_shadow,
-                             SDHCI_TRANSFER_MODE);
+                sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
+                                    SDHCI_TRANSFER_MODE);
                 return;
-        case SDHCI_BLOCK_SIZE:
-                /*
-                 * Two last DMA bits are reserved, and first one is used for
-                 * non-standard blksz of 4096 bytes that we don't support
-                 * yet. So clear the DMA boundary bits.
-                 */
-                val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
-                /* fall through */
         }
         clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
 }
 
-static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
+void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
 {
         int base = reg & ~0x3;
         int shift = (reg & 0x3) * 8;
 
-        /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
-        if (reg == SDHCI_HOST_CONTROL)
-                val &= ~ESDHC_HOST_CONTROL_RES;
-
         clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
 }
-
-static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-        int pre_div = 2;
-        int div = 1;
-
-        clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
-                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
-
-        if (clock == 0)
-                goto out;
-
-        while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
-                pre_div *= 2;
-
-        while (host->max_clk / pre_div / div > clock && div < 16)
-                div++;
-
-        dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
-                clock, host->max_clk / pre_div / div);
-
-        pre_div >>= 1;
-        div--;
-
-        setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
-                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
-                  div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT);
-        mdelay(100);
-out:
-        host->clock = clock;
-}
-
-static int esdhc_enable_dma(struct sdhci_host *host)
-{
-        setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
-        return 0;
-}
-
-static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
-{
-        struct sdhci_of_host *of_host = sdhci_priv(host);
-
-        return of_host->clock;
-}
-
-static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
-{
-        struct sdhci_of_host *of_host = sdhci_priv(host);
-
-        return of_host->clock / 256 / 16;
-}
-
-static struct sdhci_of_data sdhci_esdhc = {
-        .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
-                  SDHCI_QUIRK_BROKEN_CARD_DETECTION |
-                  SDHCI_QUIRK_NO_BUSY_IRQ |
-                  SDHCI_QUIRK_NONSTANDARD_CLOCK |
-                  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
-                  SDHCI_QUIRK_PIO_NEEDS_DELAY |
-                  SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
-                  SDHCI_QUIRK_NO_CARD_NO_RESET,
-        .ops = {
-                .readl = esdhc_readl,
-                .readw = esdhc_readw,
-                .readb = esdhc_readb,
-                .writel = esdhc_writel,
-                .writew = esdhc_writew,
-                .writeb = esdhc_writeb,
-                .set_clock = esdhc_set_clock,
-                .enable_dma = esdhc_enable_dma,
-                .get_max_clock = esdhc_get_max_clock,
-                .get_min_clock = esdhc_get_min_clock,
-        },
-};
+#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
 
 #ifdef CONFIG_PM
 
@@ -301,9 +191,11 @@ static int __devexit sdhci_of_remove(struct of_device *ofdev)
 }
 
 static const struct of_device_id sdhci_of_match[] = {
+#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
         { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
         { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
         { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
+#endif
         { .compatible = "generic-sdhci", },
         {},
 };