aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/video/s5p-fimc/fimc-core.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/media/video/s5p-fimc/fimc-core.c')
-rw-r--r--drivers/media/video/s5p-fimc/fimc-core.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c
index 19ca6db38b2..07c6254faee 100644
--- a/drivers/media/video/s5p-fimc/fimc-core.c
+++ b/drivers/media/video/s5p-fimc/fimc-core.c
@@ -37,7 +37,7 @@ static char *fimc_clocks[MAX_FIMC_CLOCKS] = {
37static struct fimc_fmt fimc_formats[] = { 37static struct fimc_fmt fimc_formats[] = {
38 { 38 {
39 .name = "RGB565", 39 .name = "RGB565",
40 .fourcc = V4L2_PIX_FMT_RGB565X, 40 .fourcc = V4L2_PIX_FMT_RGB565,
41 .depth = { 16 }, 41 .depth = { 16 },
42 .color = S5P_FIMC_RGB565, 42 .color = S5P_FIMC_RGB565,
43 .memplanes = 1, 43 .memplanes = 1,
@@ -1038,12 +1038,11 @@ static int fimc_try_fmt_mplane(struct fimc_ctx *ctx, struct v4l2_format *f)
1038 mod_x = 6; /* 64 x 32 pixels tile */ 1038 mod_x = 6; /* 64 x 32 pixels tile */
1039 mod_y = 5; 1039 mod_y = 5;
1040 } else { 1040 } else {
1041 if (fimc->id == 1 && variant->pix_hoff) 1041 if (variant->min_vsize_align == 1)
1042 mod_y = fimc_fmt_is_rgb(fmt->color) ? 0 : 1; 1042 mod_y = fimc_fmt_is_rgb(fmt->color) ? 0 : 1;
1043 else 1043 else
1044 mod_y = mod_x; 1044 mod_y = ffs(variant->min_vsize_align) - 1;
1045 } 1045 }
1046 dbg("mod_x: %d, mod_y: %d, max_w: %d", mod_x, mod_y, max_w);
1047 1046
1048 v4l_bound_align_image(&pix->width, 16, max_w, mod_x, 1047 v4l_bound_align_image(&pix->width, 16, max_w, mod_x,
1049 &pix->height, 8, variant->pix_limit->scaler_dis_w, mod_y, 0); 1048 &pix->height, 8, variant->pix_limit->scaler_dis_w, mod_y, 0);
@@ -1226,10 +1225,10 @@ static int fimc_m2m_try_crop(struct fimc_ctx *ctx, struct v4l2_crop *cr)
1226 fimc->variant->min_inp_pixsize : fimc->variant->min_out_pixsize; 1225 fimc->variant->min_inp_pixsize : fimc->variant->min_out_pixsize;
1227 1226
1228 /* Get pixel alignment constraints. */ 1227 /* Get pixel alignment constraints. */
1229 if (fimc->id == 1 && fimc->variant->pix_hoff) 1228 if (fimc->variant->min_vsize_align == 1)
1230 halign = fimc_fmt_is_rgb(f->fmt->color) ? 0 : 1; 1229 halign = fimc_fmt_is_rgb(f->fmt->color) ? 0 : 1;
1231 else 1230 else
1232 halign = ffs(min_size) - 1; 1231 halign = ffs(fimc->variant->min_vsize_align) - 1;
1233 1232
1234 for (i = 0; i < f->fmt->colplanes; i++) 1233 for (i = 0; i < f->fmt->colplanes; i++)
1235 depth += f->fmt->depth[i]; 1234 depth += f->fmt->depth[i];
@@ -1615,7 +1614,6 @@ static int fimc_probe(struct platform_device *pdev)
1615 pdata = pdev->dev.platform_data; 1614 pdata = pdev->dev.platform_data;
1616 fimc->pdata = pdata; 1615 fimc->pdata = pdata;
1617 1616
1618 set_bit(ST_LPM, &fimc->state);
1619 1617
1620 init_waitqueue_head(&fimc->irq_queue); 1618 init_waitqueue_head(&fimc->irq_queue);
1621 spin_lock_init(&fimc->slock); 1619 spin_lock_init(&fimc->slock);
@@ -1707,8 +1705,6 @@ static int fimc_runtime_resume(struct device *dev)
1707 /* Enable clocks and perform basic initalization */ 1705 /* Enable clocks and perform basic initalization */
1708 clk_enable(fimc->clock[CLK_GATE]); 1706 clk_enable(fimc->clock[CLK_GATE]);
1709 fimc_hw_reset(fimc); 1707 fimc_hw_reset(fimc);
1710 if (fimc->variant->out_buf_count > 4)
1711 fimc_hw_set_dma_seq(fimc, 0xF);
1712 1708
1713 /* Resume the capture or mem-to-mem device */ 1709 /* Resume the capture or mem-to-mem device */
1714 if (fimc_capture_busy(fimc)) 1710 if (fimc_capture_busy(fimc))
@@ -1750,8 +1746,6 @@ static int fimc_resume(struct device *dev)
1750 return 0; 1746 return 0;
1751 } 1747 }
1752 fimc_hw_reset(fimc); 1748 fimc_hw_reset(fimc);
1753 if (fimc->variant->out_buf_count > 4)
1754 fimc_hw_set_dma_seq(fimc, 0xF);
1755 spin_unlock_irqrestore(&fimc->slock, flags); 1749 spin_unlock_irqrestore(&fimc->slock, flags);
1756 1750
1757 if (fimc_capture_busy(fimc)) 1751 if (fimc_capture_busy(fimc))
@@ -1780,7 +1774,6 @@ static int __devexit fimc_remove(struct platform_device *pdev)
1780 struct fimc_dev *fimc = platform_get_drvdata(pdev); 1774 struct fimc_dev *fimc = platform_get_drvdata(pdev);
1781 1775
1782 pm_runtime_disable(&pdev->dev); 1776 pm_runtime_disable(&pdev->dev);
1783 fimc_runtime_suspend(&pdev->dev);
1784 pm_runtime_set_suspended(&pdev->dev); 1777 pm_runtime_set_suspended(&pdev->dev);
1785 1778
1786 vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx); 1779 vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
@@ -1840,6 +1833,7 @@ static struct samsung_fimc_variant fimc0_variant_s5p = {
1840 .min_inp_pixsize = 16, 1833 .min_inp_pixsize = 16,
1841 .min_out_pixsize = 16, 1834 .min_out_pixsize = 16,
1842 .hor_offs_align = 8, 1835 .hor_offs_align = 8,
1836 .min_vsize_align = 16,
1843 .out_buf_count = 4, 1837 .out_buf_count = 4,
1844 .pix_limit = &s5p_pix_limit[0], 1838 .pix_limit = &s5p_pix_limit[0],
1845}; 1839};
@@ -1849,6 +1843,7 @@ static struct samsung_fimc_variant fimc2_variant_s5p = {
1849 .min_inp_pixsize = 16, 1843 .min_inp_pixsize = 16,
1850 .min_out_pixsize = 16, 1844 .min_out_pixsize = 16,
1851 .hor_offs_align = 8, 1845 .hor_offs_align = 8,
1846 .min_vsize_align = 16,
1852 .out_buf_count = 4, 1847 .out_buf_count = 4,
1853 .pix_limit = &s5p_pix_limit[1], 1848 .pix_limit = &s5p_pix_limit[1],
1854}; 1849};
@@ -1861,6 +1856,7 @@ static struct samsung_fimc_variant fimc0_variant_s5pv210 = {
1861 .min_inp_pixsize = 16, 1856 .min_inp_pixsize = 16,
1862 .min_out_pixsize = 16, 1857 .min_out_pixsize = 16,
1863 .hor_offs_align = 8, 1858 .hor_offs_align = 8,
1859 .min_vsize_align = 16,
1864 .out_buf_count = 4, 1860 .out_buf_count = 4,
1865 .pix_limit = &s5p_pix_limit[1], 1861 .pix_limit = &s5p_pix_limit[1],
1866}; 1862};
@@ -1874,6 +1870,7 @@ static struct samsung_fimc_variant fimc1_variant_s5pv210 = {
1874 .min_inp_pixsize = 16, 1870 .min_inp_pixsize = 16,
1875 .min_out_pixsize = 16, 1871 .min_out_pixsize = 16,
1876 .hor_offs_align = 1, 1872 .hor_offs_align = 1,
1873 .min_vsize_align = 1,
1877 .out_buf_count = 4, 1874 .out_buf_count = 4,
1878 .pix_limit = &s5p_pix_limit[2], 1875 .pix_limit = &s5p_pix_limit[2],
1879}; 1876};
@@ -1884,6 +1881,7 @@ static struct samsung_fimc_variant fimc2_variant_s5pv210 = {
1884 .min_inp_pixsize = 16, 1881 .min_inp_pixsize = 16,
1885 .min_out_pixsize = 16, 1882 .min_out_pixsize = 16,
1886 .hor_offs_align = 8, 1883 .hor_offs_align = 8,
1884 .min_vsize_align = 16,
1887 .out_buf_count = 4, 1885 .out_buf_count = 4,
1888 .pix_limit = &s5p_pix_limit[2], 1886 .pix_limit = &s5p_pix_limit[2],
1889}; 1887};
@@ -1898,6 +1896,7 @@ static struct samsung_fimc_variant fimc0_variant_exynos4 = {
1898 .min_inp_pixsize = 16, 1896 .min_inp_pixsize = 16,
1899 .min_out_pixsize = 16, 1897 .min_out_pixsize = 16,
1900 .hor_offs_align = 2, 1898 .hor_offs_align = 2,
1899 .min_vsize_align = 1,
1901 .out_buf_count = 32, 1900 .out_buf_count = 32,
1902 .pix_limit = &s5p_pix_limit[1], 1901 .pix_limit = &s5p_pix_limit[1],
1903}; 1902};
@@ -1910,6 +1909,7 @@ static struct samsung_fimc_variant fimc3_variant_exynos4 = {
1910 .min_inp_pixsize = 16, 1909 .min_inp_pixsize = 16,
1911 .min_out_pixsize = 16, 1910 .min_out_pixsize = 16,
1912 .hor_offs_align = 2, 1911 .hor_offs_align = 2,
1912 .min_vsize_align = 1,
1913 .out_buf_count = 32, 1913 .out_buf_count = 32,
1914 .pix_limit = &s5p_pix_limit[3], 1914 .pix_limit = &s5p_pix_limit[3],
1915}; 1915};