diff options
Diffstat (limited to 'drivers/media/video/pvrusb2/pvrusb2-i2c-core.c')
-rw-r--r-- | drivers/media/video/pvrusb2/pvrusb2-i2c-core.c | 697 |
1 files changed, 697 insertions, 0 deletions
diff --git a/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c b/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c new file mode 100644 index 00000000000..e72d5103e77 --- /dev/null +++ b/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c | |||
@@ -0,0 +1,697 @@ | |||
1 | /* | ||
2 | * | ||
3 | * | ||
4 | * Copyright (C) 2005 Mike Isely <isely@pobox.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | * | ||
19 | */ | ||
20 | |||
21 | #include <linux/i2c.h> | ||
22 | #include <media/ir-kbd-i2c.h> | ||
23 | #include "pvrusb2-i2c-core.h" | ||
24 | #include "pvrusb2-hdw-internal.h" | ||
25 | #include "pvrusb2-debug.h" | ||
26 | #include "pvrusb2-fx2-cmd.h" | ||
27 | #include "pvrusb2.h" | ||
28 | |||
29 | #define trace_i2c(...) pvr2_trace(PVR2_TRACE_I2C,__VA_ARGS__) | ||
30 | |||
31 | /* | ||
32 | |||
33 | This module attempts to implement a compliant I2C adapter for the pvrusb2 | ||
34 | device. | ||
35 | |||
36 | */ | ||
37 | |||
38 | static unsigned int i2c_scan; | ||
39 | module_param(i2c_scan, int, S_IRUGO|S_IWUSR); | ||
40 | MODULE_PARM_DESC(i2c_scan,"scan i2c bus at insmod time"); | ||
41 | |||
42 | static int ir_mode[PVR_NUM] = { [0 ... PVR_NUM-1] = 1 }; | ||
43 | module_param_array(ir_mode, int, NULL, 0444); | ||
44 | MODULE_PARM_DESC(ir_mode,"specify: 0=disable IR reception, 1=normal IR"); | ||
45 | |||
46 | static int pvr2_disable_ir_video; | ||
47 | module_param_named(disable_autoload_ir_video, pvr2_disable_ir_video, | ||
48 | int, S_IRUGO|S_IWUSR); | ||
49 | MODULE_PARM_DESC(disable_autoload_ir_video, | ||
50 | "1=do not try to autoload ir_video IR receiver"); | ||
51 | |||
52 | static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */ | ||
53 | u8 i2c_addr, /* I2C address we're talking to */ | ||
54 | u8 *data, /* Data to write */ | ||
55 | u16 length) /* Size of data to write */ | ||
56 | { | ||
57 | /* Return value - default 0 means success */ | ||
58 | int ret; | ||
59 | |||
60 | |||
61 | if (!data) length = 0; | ||
62 | if (length > (sizeof(hdw->cmd_buffer) - 3)) { | ||
63 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | ||
64 | "Killing an I2C write to %u that is too large" | ||
65 | " (desired=%u limit=%u)", | ||
66 | i2c_addr, | ||
67 | length,(unsigned int)(sizeof(hdw->cmd_buffer) - 3)); | ||
68 | return -ENOTSUPP; | ||
69 | } | ||
70 | |||
71 | LOCK_TAKE(hdw->ctl_lock); | ||
72 | |||
73 | /* Clear the command buffer (likely to be paranoia) */ | ||
74 | memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); | ||
75 | |||
76 | /* Set up command buffer for an I2C write */ | ||
77 | hdw->cmd_buffer[0] = FX2CMD_I2C_WRITE; /* write prefix */ | ||
78 | hdw->cmd_buffer[1] = i2c_addr; /* i2c addr of chip */ | ||
79 | hdw->cmd_buffer[2] = length; /* length of what follows */ | ||
80 | if (length) memcpy(hdw->cmd_buffer + 3, data, length); | ||
81 | |||
82 | /* Do the operation */ | ||
83 | ret = pvr2_send_request(hdw, | ||
84 | hdw->cmd_buffer, | ||
85 | length + 3, | ||
86 | hdw->cmd_buffer, | ||
87 | 1); | ||
88 | if (!ret) { | ||
89 | if (hdw->cmd_buffer[0] != 8) { | ||
90 | ret = -EIO; | ||
91 | if (hdw->cmd_buffer[0] != 7) { | ||
92 | trace_i2c("unexpected status" | ||
93 | " from i2_write[%d]: %d", | ||
94 | i2c_addr,hdw->cmd_buffer[0]); | ||
95 | } | ||
96 | } | ||
97 | } | ||
98 | |||
99 | LOCK_GIVE(hdw->ctl_lock); | ||
100 | |||
101 | return ret; | ||
102 | } | ||
103 | |||
104 | static int pvr2_i2c_read(struct pvr2_hdw *hdw, /* Context */ | ||
105 | u8 i2c_addr, /* I2C address we're talking to */ | ||
106 | u8 *data, /* Data to write */ | ||
107 | u16 dlen, /* Size of data to write */ | ||
108 | u8 *res, /* Where to put data we read */ | ||
109 | u16 rlen) /* Amount of data to read */ | ||
110 | { | ||
111 | /* Return value - default 0 means success */ | ||
112 | int ret; | ||
113 | |||
114 | |||
115 | if (!data) dlen = 0; | ||
116 | if (dlen > (sizeof(hdw->cmd_buffer) - 4)) { | ||
117 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | ||
118 | "Killing an I2C read to %u that has wlen too large" | ||
119 | " (desired=%u limit=%u)", | ||
120 | i2c_addr, | ||
121 | dlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 4)); | ||
122 | return -ENOTSUPP; | ||
123 | } | ||
124 | if (res && (rlen > (sizeof(hdw->cmd_buffer) - 1))) { | ||
125 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | ||
126 | "Killing an I2C read to %u that has rlen too large" | ||
127 | " (desired=%u limit=%u)", | ||
128 | i2c_addr, | ||
129 | rlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 1)); | ||
130 | return -ENOTSUPP; | ||
131 | } | ||
132 | |||
133 | LOCK_TAKE(hdw->ctl_lock); | ||
134 | |||
135 | /* Clear the command buffer (likely to be paranoia) */ | ||
136 | memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); | ||
137 | |||
138 | /* Set up command buffer for an I2C write followed by a read */ | ||
139 | hdw->cmd_buffer[0] = FX2CMD_I2C_READ; /* read prefix */ | ||
140 | hdw->cmd_buffer[1] = dlen; /* arg length */ | ||
141 | hdw->cmd_buffer[2] = rlen; /* answer length. Device will send one | ||
142 | more byte (status). */ | ||
143 | hdw->cmd_buffer[3] = i2c_addr; /* i2c addr of chip */ | ||
144 | if (dlen) memcpy(hdw->cmd_buffer + 4, data, dlen); | ||
145 | |||
146 | /* Do the operation */ | ||
147 | ret = pvr2_send_request(hdw, | ||
148 | hdw->cmd_buffer, | ||
149 | 4 + dlen, | ||
150 | hdw->cmd_buffer, | ||
151 | rlen + 1); | ||
152 | if (!ret) { | ||
153 | if (hdw->cmd_buffer[0] != 8) { | ||
154 | ret = -EIO; | ||
155 | if (hdw->cmd_buffer[0] != 7) { | ||
156 | trace_i2c("unexpected status" | ||
157 | " from i2_read[%d]: %d", | ||
158 | i2c_addr,hdw->cmd_buffer[0]); | ||
159 | } | ||
160 | } | ||
161 | } | ||
162 | |||
163 | /* Copy back the result */ | ||
164 | if (res && rlen) { | ||
165 | if (ret) { | ||
166 | /* Error, just blank out the return buffer */ | ||
167 | memset(res, 0, rlen); | ||
168 | } else { | ||
169 | memcpy(res, hdw->cmd_buffer + 1, rlen); | ||
170 | } | ||
171 | } | ||
172 | |||
173 | LOCK_GIVE(hdw->ctl_lock); | ||
174 | |||
175 | return ret; | ||
176 | } | ||
177 | |||
178 | /* This is the common low level entry point for doing I2C operations to the | ||
179 | hardware. */ | ||
180 | static int pvr2_i2c_basic_op(struct pvr2_hdw *hdw, | ||
181 | u8 i2c_addr, | ||
182 | u8 *wdata, | ||
183 | u16 wlen, | ||
184 | u8 *rdata, | ||
185 | u16 rlen) | ||
186 | { | ||
187 | if (!rdata) rlen = 0; | ||
188 | if (!wdata) wlen = 0; | ||
189 | if (rlen || !wlen) { | ||
190 | return pvr2_i2c_read(hdw,i2c_addr,wdata,wlen,rdata,rlen); | ||
191 | } else { | ||
192 | return pvr2_i2c_write(hdw,i2c_addr,wdata,wlen); | ||
193 | } | ||
194 | } | ||
195 | |||
196 | |||
197 | /* This is a special entry point for cases of I2C transaction attempts to | ||
198 | the IR receiver. The implementation here simulates the IR receiver by | ||
199 | issuing a command to the FX2 firmware and using that response to return | ||
200 | what the real I2C receiver would have returned. We use this for 24xxx | ||
201 | devices, where the IR receiver chip has been removed and replaced with | ||
202 | FX2 related logic. */ | ||
203 | static int i2c_24xxx_ir(struct pvr2_hdw *hdw, | ||
204 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | ||
205 | { | ||
206 | u8 dat[4]; | ||
207 | unsigned int stat; | ||
208 | |||
209 | if (!(rlen || wlen)) { | ||
210 | /* This is a probe attempt. Just let it succeed. */ | ||
211 | return 0; | ||
212 | } | ||
213 | |||
214 | /* We don't understand this kind of transaction */ | ||
215 | if ((wlen != 0) || (rlen == 0)) return -EIO; | ||
216 | |||
217 | if (rlen < 3) { | ||
218 | /* Mike Isely <isely@pobox.com> Appears to be a probe | ||
219 | attempt from lirc. Just fill in zeroes and return. If | ||
220 | we try instead to do the full transaction here, then bad | ||
221 | things seem to happen within the lirc driver module | ||
222 | (version 0.8.0-7 sources from Debian, when run under | ||
223 | vanilla 2.6.17.6 kernel) - and I don't have the patience | ||
224 | to chase it down. */ | ||
225 | if (rlen > 0) rdata[0] = 0; | ||
226 | if (rlen > 1) rdata[1] = 0; | ||
227 | return 0; | ||
228 | } | ||
229 | |||
230 | /* Issue a command to the FX2 to read the IR receiver. */ | ||
231 | LOCK_TAKE(hdw->ctl_lock); do { | ||
232 | hdw->cmd_buffer[0] = FX2CMD_GET_IR_CODE; | ||
233 | stat = pvr2_send_request(hdw, | ||
234 | hdw->cmd_buffer,1, | ||
235 | hdw->cmd_buffer,4); | ||
236 | dat[0] = hdw->cmd_buffer[0]; | ||
237 | dat[1] = hdw->cmd_buffer[1]; | ||
238 | dat[2] = hdw->cmd_buffer[2]; | ||
239 | dat[3] = hdw->cmd_buffer[3]; | ||
240 | } while (0); LOCK_GIVE(hdw->ctl_lock); | ||
241 | |||
242 | /* Give up if that operation failed. */ | ||
243 | if (stat != 0) return stat; | ||
244 | |||
245 | /* Mangle the results into something that looks like the real IR | ||
246 | receiver. */ | ||
247 | rdata[2] = 0xc1; | ||
248 | if (dat[0] != 1) { | ||
249 | /* No code received. */ | ||
250 | rdata[0] = 0; | ||
251 | rdata[1] = 0; | ||
252 | } else { | ||
253 | u16 val; | ||
254 | /* Mash the FX2 firmware-provided IR code into something | ||
255 | that the normal i2c chip-level driver expects. */ | ||
256 | val = dat[1]; | ||
257 | val <<= 8; | ||
258 | val |= dat[2]; | ||
259 | val >>= 1; | ||
260 | val &= ~0x0003; | ||
261 | val |= 0x8000; | ||
262 | rdata[0] = (val >> 8) & 0xffu; | ||
263 | rdata[1] = val & 0xffu; | ||
264 | } | ||
265 | |||
266 | return 0; | ||
267 | } | ||
268 | |||
269 | /* This is a special entry point that is entered if an I2C operation is | ||
270 | attempted to a wm8775 chip on model 24xxx hardware. Autodetect of this | ||
271 | part doesn't work, but we know it is really there. So let's look for | ||
272 | the autodetect attempt and just return success if we see that. */ | ||
273 | static int i2c_hack_wm8775(struct pvr2_hdw *hdw, | ||
274 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | ||
275 | { | ||
276 | if (!(rlen || wlen)) { | ||
277 | // This is a probe attempt. Just let it succeed. | ||
278 | return 0; | ||
279 | } | ||
280 | return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); | ||
281 | } | ||
282 | |||
283 | /* This is an entry point designed to always fail any attempt to perform a | ||
284 | transfer. We use this to cause certain I2C addresses to not be | ||
285 | probed. */ | ||
286 | static int i2c_black_hole(struct pvr2_hdw *hdw, | ||
287 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | ||
288 | { | ||
289 | return -EIO; | ||
290 | } | ||
291 | |||
292 | /* This is a special entry point that is entered if an I2C operation is | ||
293 | attempted to a cx25840 chip on model 24xxx hardware. This chip can | ||
294 | sometimes wedge itself. Worse still, when this happens msp3400 can | ||
295 | falsely detect this part and then the system gets hosed up after msp3400 | ||
296 | gets confused and dies. What we want to do here is try to keep msp3400 | ||
297 | away and also try to notice if the chip is wedged and send a warning to | ||
298 | the system log. */ | ||
299 | static int i2c_hack_cx25840(struct pvr2_hdw *hdw, | ||
300 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | ||
301 | { | ||
302 | int ret; | ||
303 | unsigned int subaddr; | ||
304 | u8 wbuf[2]; | ||
305 | int state = hdw->i2c_cx25840_hack_state; | ||
306 | |||
307 | if (!(rlen || wlen)) { | ||
308 | // Probe attempt - always just succeed and don't bother the | ||
309 | // hardware (this helps to make the state machine further | ||
310 | // down somewhat easier). | ||
311 | return 0; | ||
312 | } | ||
313 | |||
314 | if (state == 3) { | ||
315 | return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); | ||
316 | } | ||
317 | |||
318 | /* We're looking for the exact pattern where the revision register | ||
319 | is being read. The cx25840 module will always look at the | ||
320 | revision register first. Any other pattern of access therefore | ||
321 | has to be a probe attempt from somebody else so we'll reject it. | ||
322 | Normally we could just let each client just probe the part | ||
323 | anyway, but when the cx25840 is wedged, msp3400 will get a false | ||
324 | positive and that just screws things up... */ | ||
325 | |||
326 | if (wlen == 0) { | ||
327 | switch (state) { | ||
328 | case 1: subaddr = 0x0100; break; | ||
329 | case 2: subaddr = 0x0101; break; | ||
330 | default: goto fail; | ||
331 | } | ||
332 | } else if (wlen == 2) { | ||
333 | subaddr = (wdata[0] << 8) | wdata[1]; | ||
334 | switch (subaddr) { | ||
335 | case 0x0100: state = 1; break; | ||
336 | case 0x0101: state = 2; break; | ||
337 | default: goto fail; | ||
338 | } | ||
339 | } else { | ||
340 | goto fail; | ||
341 | } | ||
342 | if (!rlen) goto success; | ||
343 | state = 0; | ||
344 | if (rlen != 1) goto fail; | ||
345 | |||
346 | /* If we get to here then we have a legitimate read for one of the | ||
347 | two revision bytes, so pass it through. */ | ||
348 | wbuf[0] = subaddr >> 8; | ||
349 | wbuf[1] = subaddr; | ||
350 | ret = pvr2_i2c_basic_op(hdw,i2c_addr,wbuf,2,rdata,rlen); | ||
351 | |||
352 | if ((ret != 0) || (*rdata == 0x04) || (*rdata == 0x0a)) { | ||
353 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | ||
354 | "WARNING: Detected a wedged cx25840 chip;" | ||
355 | " the device will not work."); | ||
356 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | ||
357 | "WARNING: Try power cycling the pvrusb2 device."); | ||
358 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | ||
359 | "WARNING: Disabling further access to the device" | ||
360 | " to prevent other foul-ups."); | ||
361 | // This blocks all further communication with the part. | ||
362 | hdw->i2c_func[0x44] = NULL; | ||
363 | pvr2_hdw_render_useless(hdw); | ||
364 | goto fail; | ||
365 | } | ||
366 | |||
367 | /* Success! */ | ||
368 | pvr2_trace(PVR2_TRACE_CHIPS,"cx25840 appears to be OK."); | ||
369 | state = 3; | ||
370 | |||
371 | success: | ||
372 | hdw->i2c_cx25840_hack_state = state; | ||
373 | return 0; | ||
374 | |||
375 | fail: | ||
376 | hdw->i2c_cx25840_hack_state = state; | ||
377 | return -EIO; | ||
378 | } | ||
379 | |||
380 | /* This is a very, very limited I2C adapter implementation. We can only | ||
381 | support what we actually know will work on the device... */ | ||
382 | static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap, | ||
383 | struct i2c_msg msgs[], | ||
384 | int num) | ||
385 | { | ||
386 | int ret = -ENOTSUPP; | ||
387 | pvr2_i2c_func funcp = NULL; | ||
388 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(i2c_adap->algo_data); | ||
389 | |||
390 | if (!num) { | ||
391 | ret = -EINVAL; | ||
392 | goto done; | ||
393 | } | ||
394 | if (msgs[0].addr < PVR2_I2C_FUNC_CNT) { | ||
395 | funcp = hdw->i2c_func[msgs[0].addr]; | ||
396 | } | ||
397 | if (!funcp) { | ||
398 | ret = -EIO; | ||
399 | goto done; | ||
400 | } | ||
401 | |||
402 | if (num == 1) { | ||
403 | if (msgs[0].flags & I2C_M_RD) { | ||
404 | /* Simple read */ | ||
405 | u16 tcnt,bcnt,offs; | ||
406 | if (!msgs[0].len) { | ||
407 | /* Length == 0 read. This is a probe. */ | ||
408 | if (funcp(hdw,msgs[0].addr,NULL,0,NULL,0)) { | ||
409 | ret = -EIO; | ||
410 | goto done; | ||
411 | } | ||
412 | ret = 1; | ||
413 | goto done; | ||
414 | } | ||
415 | /* If the read is short enough we'll do the whole | ||
416 | thing atomically. Otherwise we have no choice | ||
417 | but to break apart the reads. */ | ||
418 | tcnt = msgs[0].len; | ||
419 | offs = 0; | ||
420 | while (tcnt) { | ||
421 | bcnt = tcnt; | ||
422 | if (bcnt > sizeof(hdw->cmd_buffer)-1) { | ||
423 | bcnt = sizeof(hdw->cmd_buffer)-1; | ||
424 | } | ||
425 | if (funcp(hdw,msgs[0].addr,NULL,0, | ||
426 | msgs[0].buf+offs,bcnt)) { | ||
427 | ret = -EIO; | ||
428 | goto done; | ||
429 | } | ||
430 | offs += bcnt; | ||
431 | tcnt -= bcnt; | ||
432 | } | ||
433 | ret = 1; | ||
434 | goto done; | ||
435 | } else { | ||
436 | /* Simple write */ | ||
437 | ret = 1; | ||
438 | if (funcp(hdw,msgs[0].addr, | ||
439 | msgs[0].buf,msgs[0].len,NULL,0)) { | ||
440 | ret = -EIO; | ||
441 | } | ||
442 | goto done; | ||
443 | } | ||
444 | } else if (num == 2) { | ||
445 | if (msgs[0].addr != msgs[1].addr) { | ||
446 | trace_i2c("i2c refusing 2 phase transfer with" | ||
447 | " conflicting target addresses"); | ||
448 | ret = -ENOTSUPP; | ||
449 | goto done; | ||
450 | } | ||
451 | if ((!((msgs[0].flags & I2C_M_RD))) && | ||
452 | (msgs[1].flags & I2C_M_RD)) { | ||
453 | u16 tcnt,bcnt,wcnt,offs; | ||
454 | /* Write followed by atomic read. If the read | ||
455 | portion is short enough we'll do the whole thing | ||
456 | atomically. Otherwise we have no choice but to | ||
457 | break apart the reads. */ | ||
458 | tcnt = msgs[1].len; | ||
459 | wcnt = msgs[0].len; | ||
460 | offs = 0; | ||
461 | while (tcnt || wcnt) { | ||
462 | bcnt = tcnt; | ||
463 | if (bcnt > sizeof(hdw->cmd_buffer)-1) { | ||
464 | bcnt = sizeof(hdw->cmd_buffer)-1; | ||
465 | } | ||
466 | if (funcp(hdw,msgs[0].addr, | ||
467 | msgs[0].buf,wcnt, | ||
468 | msgs[1].buf+offs,bcnt)) { | ||
469 | ret = -EIO; | ||
470 | goto done; | ||
471 | } | ||
472 | offs += bcnt; | ||
473 | tcnt -= bcnt; | ||
474 | wcnt = 0; | ||
475 | } | ||
476 | ret = 2; | ||
477 | goto done; | ||
478 | } else { | ||
479 | trace_i2c("i2c refusing complex transfer" | ||
480 | " read0=%d read1=%d", | ||
481 | (msgs[0].flags & I2C_M_RD), | ||
482 | (msgs[1].flags & I2C_M_RD)); | ||
483 | } | ||
484 | } else { | ||
485 | trace_i2c("i2c refusing %d phase transfer",num); | ||
486 | } | ||
487 | |||
488 | done: | ||
489 | if (pvrusb2_debug & PVR2_TRACE_I2C_TRAF) { | ||
490 | unsigned int idx,offs,cnt; | ||
491 | for (idx = 0; idx < num; idx++) { | ||
492 | cnt = msgs[idx].len; | ||
493 | printk(KERN_INFO | ||
494 | "pvrusb2 i2c xfer %u/%u:" | ||
495 | " addr=0x%x len=%d %s", | ||
496 | idx+1,num, | ||
497 | msgs[idx].addr, | ||
498 | cnt, | ||
499 | (msgs[idx].flags & I2C_M_RD ? | ||
500 | "read" : "write")); | ||
501 | if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) { | ||
502 | if (cnt > 8) cnt = 8; | ||
503 | printk(" ["); | ||
504 | for (offs = 0; offs < (cnt>8?8:cnt); offs++) { | ||
505 | if (offs) printk(" "); | ||
506 | printk("%02x",msgs[idx].buf[offs]); | ||
507 | } | ||
508 | if (offs < cnt) printk(" ..."); | ||
509 | printk("]"); | ||
510 | } | ||
511 | if (idx+1 == num) { | ||
512 | printk(" result=%d",ret); | ||
513 | } | ||
514 | printk("\n"); | ||
515 | } | ||
516 | if (!num) { | ||
517 | printk(KERN_INFO | ||
518 | "pvrusb2 i2c xfer null transfer result=%d\n", | ||
519 | ret); | ||
520 | } | ||
521 | } | ||
522 | return ret; | ||
523 | } | ||
524 | |||
525 | static u32 pvr2_i2c_functionality(struct i2c_adapter *adap) | ||
526 | { | ||
527 | return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; | ||
528 | } | ||
529 | |||
530 | static struct i2c_algorithm pvr2_i2c_algo_template = { | ||
531 | .master_xfer = pvr2_i2c_xfer, | ||
532 | .functionality = pvr2_i2c_functionality, | ||
533 | }; | ||
534 | |||
535 | static struct i2c_adapter pvr2_i2c_adap_template = { | ||
536 | .owner = THIS_MODULE, | ||
537 | .class = 0, | ||
538 | }; | ||
539 | |||
540 | |||
541 | /* Return true if device exists at given address */ | ||
542 | static int do_i2c_probe(struct pvr2_hdw *hdw, int addr) | ||
543 | { | ||
544 | struct i2c_msg msg[1]; | ||
545 | int rc; | ||
546 | msg[0].addr = 0; | ||
547 | msg[0].flags = I2C_M_RD; | ||
548 | msg[0].len = 0; | ||
549 | msg[0].buf = NULL; | ||
550 | msg[0].addr = addr; | ||
551 | rc = i2c_transfer(&hdw->i2c_adap, msg, ARRAY_SIZE(msg)); | ||
552 | return rc == 1; | ||
553 | } | ||
554 | |||
555 | static void do_i2c_scan(struct pvr2_hdw *hdw) | ||
556 | { | ||
557 | int i; | ||
558 | printk(KERN_INFO "%s: i2c scan beginning\n", hdw->name); | ||
559 | for (i = 0; i < 128; i++) { | ||
560 | if (do_i2c_probe(hdw, i)) { | ||
561 | printk(KERN_INFO "%s: i2c scan: found device @ 0x%x\n", | ||
562 | hdw->name, i); | ||
563 | } | ||
564 | } | ||
565 | printk(KERN_INFO "%s: i2c scan done.\n", hdw->name); | ||
566 | } | ||
567 | |||
568 | static void pvr2_i2c_register_ir(struct pvr2_hdw *hdw) | ||
569 | { | ||
570 | struct i2c_board_info info; | ||
571 | struct IR_i2c_init_data *init_data = &hdw->ir_init_data; | ||
572 | if (pvr2_disable_ir_video) { | ||
573 | pvr2_trace(PVR2_TRACE_INFO, | ||
574 | "Automatic binding of ir_video has been disabled."); | ||
575 | return; | ||
576 | } | ||
577 | memset(&info, 0, sizeof(struct i2c_board_info)); | ||
578 | switch (hdw->ir_scheme_active) { | ||
579 | case PVR2_IR_SCHEME_24XXX: /* FX2-controlled IR */ | ||
580 | case PVR2_IR_SCHEME_29XXX: /* Original 29xxx device */ | ||
581 | init_data->ir_codes = RC_MAP_HAUPPAUGE; | ||
582 | init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP; | ||
583 | init_data->type = RC_TYPE_RC5; | ||
584 | init_data->name = hdw->hdw_desc->description; | ||
585 | init_data->polling_interval = 100; /* ms From ir-kbd-i2c */ | ||
586 | /* IR Receiver */ | ||
587 | info.addr = 0x18; | ||
588 | info.platform_data = init_data; | ||
589 | strlcpy(info.type, "ir_video", I2C_NAME_SIZE); | ||
590 | pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.", | ||
591 | info.type, info.addr); | ||
592 | i2c_new_device(&hdw->i2c_adap, &info); | ||
593 | break; | ||
594 | case PVR2_IR_SCHEME_ZILOG: /* HVR-1950 style */ | ||
595 | case PVR2_IR_SCHEME_24XXX_MCE: /* 24xxx MCE device */ | ||
596 | init_data->ir_codes = RC_MAP_HAUPPAUGE; | ||
597 | init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR; | ||
598 | init_data->type = RC_TYPE_RC5; | ||
599 | init_data->name = hdw->hdw_desc->description; | ||
600 | /* IR Receiver */ | ||
601 | info.addr = 0x71; | ||
602 | info.platform_data = init_data; | ||
603 | strlcpy(info.type, "ir_rx_z8f0811_haup", I2C_NAME_SIZE); | ||
604 | pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.", | ||
605 | info.type, info.addr); | ||
606 | i2c_new_device(&hdw->i2c_adap, &info); | ||
607 | /* IR Trasmitter */ | ||
608 | info.addr = 0x70; | ||
609 | info.platform_data = init_data; | ||
610 | strlcpy(info.type, "ir_tx_z8f0811_haup", I2C_NAME_SIZE); | ||
611 | pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.", | ||
612 | info.type, info.addr); | ||
613 | i2c_new_device(&hdw->i2c_adap, &info); | ||
614 | break; | ||
615 | default: | ||
616 | /* The device either doesn't support I2C-based IR or we | ||
617 | don't know (yet) how to operate IR on the device. */ | ||
618 | break; | ||
619 | } | ||
620 | } | ||
621 | |||
622 | void pvr2_i2c_core_init(struct pvr2_hdw *hdw) | ||
623 | { | ||
624 | unsigned int idx; | ||
625 | |||
626 | /* The default action for all possible I2C addresses is just to do | ||
627 | the transfer normally. */ | ||
628 | for (idx = 0; idx < PVR2_I2C_FUNC_CNT; idx++) { | ||
629 | hdw->i2c_func[idx] = pvr2_i2c_basic_op; | ||
630 | } | ||
631 | |||
632 | /* However, deal with various special cases for 24xxx hardware. */ | ||
633 | if (ir_mode[hdw->unit_number] == 0) { | ||
634 | printk(KERN_INFO "%s: IR disabled\n",hdw->name); | ||
635 | hdw->i2c_func[0x18] = i2c_black_hole; | ||
636 | } else if (ir_mode[hdw->unit_number] == 1) { | ||
637 | if (hdw->ir_scheme_active == PVR2_IR_SCHEME_24XXX) { | ||
638 | /* Set up translation so that our IR looks like a | ||
639 | 29xxx device */ | ||
640 | hdw->i2c_func[0x18] = i2c_24xxx_ir; | ||
641 | } | ||
642 | } | ||
643 | if (hdw->hdw_desc->flag_has_cx25840) { | ||
644 | hdw->i2c_func[0x44] = i2c_hack_cx25840; | ||
645 | } | ||
646 | if (hdw->hdw_desc->flag_has_wm8775) { | ||
647 | hdw->i2c_func[0x1b] = i2c_hack_wm8775; | ||
648 | } | ||
649 | |||
650 | // Configure the adapter and set up everything else related to it. | ||
651 | memcpy(&hdw->i2c_adap,&pvr2_i2c_adap_template,sizeof(hdw->i2c_adap)); | ||
652 | memcpy(&hdw->i2c_algo,&pvr2_i2c_algo_template,sizeof(hdw->i2c_algo)); | ||
653 | strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name)); | ||
654 | hdw->i2c_adap.dev.parent = &hdw->usb_dev->dev; | ||
655 | hdw->i2c_adap.algo = &hdw->i2c_algo; | ||
656 | hdw->i2c_adap.algo_data = hdw; | ||
657 | hdw->i2c_linked = !0; | ||
658 | i2c_set_adapdata(&hdw->i2c_adap, &hdw->v4l2_dev); | ||
659 | i2c_add_adapter(&hdw->i2c_adap); | ||
660 | if (hdw->i2c_func[0x18] == i2c_24xxx_ir) { | ||
661 | /* Probe for a different type of IR receiver on this | ||
662 | device. This is really the only way to differentiate | ||
663 | older 24xxx devices from 24xxx variants that include an | ||
664 | IR blaster. If the IR blaster is present, the IR | ||
665 | receiver is part of that chip and thus we must disable | ||
666 | the emulated IR receiver. */ | ||
667 | if (do_i2c_probe(hdw, 0x71)) { | ||
668 | pvr2_trace(PVR2_TRACE_INFO, | ||
669 | "Device has newer IR hardware;" | ||
670 | " disabling unneeded virtual IR device"); | ||
671 | hdw->i2c_func[0x18] = NULL; | ||
672 | /* Remember that this is a different device... */ | ||
673 | hdw->ir_scheme_active = PVR2_IR_SCHEME_24XXX_MCE; | ||
674 | } | ||
675 | } | ||
676 | if (i2c_scan) do_i2c_scan(hdw); | ||
677 | |||
678 | pvr2_i2c_register_ir(hdw); | ||
679 | } | ||
680 | |||
681 | void pvr2_i2c_core_done(struct pvr2_hdw *hdw) | ||
682 | { | ||
683 | if (hdw->i2c_linked) { | ||
684 | i2c_del_adapter(&hdw->i2c_adap); | ||
685 | hdw->i2c_linked = 0; | ||
686 | } | ||
687 | } | ||
688 | |||
689 | /* | ||
690 | Stuff for Emacs to see, in order to encourage consistent editing style: | ||
691 | *** Local Variables: *** | ||
692 | *** mode: c *** | ||
693 | *** fill-column: 75 *** | ||
694 | *** tab-width: 8 *** | ||
695 | *** c-basic-offset: 8 *** | ||
696 | *** End: *** | ||
697 | */ | ||