aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/video/cx23885/cx23885-cards.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/media/video/cx23885/cx23885-cards.c')
-rw-r--r--drivers/media/video/cx23885/cx23885-cards.c1476
1 files changed, 1476 insertions, 0 deletions
diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c
new file mode 100644
index 00000000000..76b7563de39
--- /dev/null
+++ b/drivers/media/video/cx23885/cx23885-cards.c
@@ -0,0 +1,1476 @@
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
26#include <media/cx25840.h>
27#include <linux/firmware.h>
28
29#include "../../../staging/altera-stapl/altera.h"
30#include "cx23885.h"
31#include "tuner-xc2028.h"
32#include "netup-eeprom.h"
33#include "netup-init.h"
34#include "altera-ci.h"
35#include "xc4000.h"
36#include "xc5000.h"
37#include "cx23888-ir.h"
38
39static unsigned int netup_card_rev = 1;
40module_param(netup_card_rev, int, 0644);
41MODULE_PARM_DESC(netup_card_rev,
42 "NetUP Dual DVB-T/C CI card revision");
43static unsigned int enable_885_ir;
44module_param(enable_885_ir, int, 0644);
45MODULE_PARM_DESC(enable_885_ir,
46 "Enable integrated IR controller for supported\n"
47 "\t\t CX2388[57] boards that are wired for it:\n"
48 "\t\t\tHVR-1250 (reported safe)\n"
49 "\t\t\tTeVii S470 (reported unsafe)\n"
50 "\t\t This can cause an interrupt storm with some cards.\n"
51 "\t\t Default: 0 [Disabled]");
52
53/* ------------------------------------------------------------------ */
54/* board config info */
55
56struct cx23885_board cx23885_boards[] = {
57 [CX23885_BOARD_UNKNOWN] = {
58 .name = "UNKNOWN/GENERIC",
59 /* Ensure safe default for unknown boards */
60 .clk_freq = 0,
61 .input = {{
62 .type = CX23885_VMUX_COMPOSITE1,
63 .vmux = 0,
64 }, {
65 .type = CX23885_VMUX_COMPOSITE2,
66 .vmux = 1,
67 }, {
68 .type = CX23885_VMUX_COMPOSITE3,
69 .vmux = 2,
70 }, {
71 .type = CX23885_VMUX_COMPOSITE4,
72 .vmux = 3,
73 } },
74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
76 .name = "Hauppauge WinTV-HVR1800lp",
77 .portc = CX23885_MPEG_DVB,
78 .input = {{
79 .type = CX23885_VMUX_TELEVISION,
80 .vmux = 0,
81 .gpio0 = 0xff00,
82 }, {
83 .type = CX23885_VMUX_DEBUG,
84 .vmux = 0,
85 .gpio0 = 0xff01,
86 }, {
87 .type = CX23885_VMUX_COMPOSITE1,
88 .vmux = 1,
89 .gpio0 = 0xff02,
90 }, {
91 .type = CX23885_VMUX_SVIDEO,
92 .vmux = 2,
93 .gpio0 = 0xff02,
94 } },
95 },
96 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
97 .name = "Hauppauge WinTV-HVR1800",
98 .porta = CX23885_ANALOG_VIDEO,
99 .portb = CX23885_MPEG_ENCODER,
100 .portc = CX23885_MPEG_DVB,
101 .tuner_type = TUNER_PHILIPS_TDA8290,
102 .tuner_addr = 0x42, /* 0x84 >> 1 */
103 .tuner_bus = 1,
104 .input = {{
105 .type = CX23885_VMUX_TELEVISION,
106 .vmux = CX25840_VIN7_CH3 |
107 CX25840_VIN5_CH2 |
108 CX25840_VIN2_CH1,
109 .gpio0 = 0,
110 }, {
111 .type = CX23885_VMUX_COMPOSITE1,
112 .vmux = CX25840_VIN7_CH3 |
113 CX25840_VIN4_CH2 |
114 CX25840_VIN6_CH1,
115 .gpio0 = 0,
116 }, {
117 .type = CX23885_VMUX_SVIDEO,
118 .vmux = CX25840_VIN7_CH3 |
119 CX25840_VIN4_CH2 |
120 CX25840_VIN8_CH1 |
121 CX25840_SVIDEO_ON,
122 .gpio0 = 0,
123 } },
124 },
125 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
126 .name = "Hauppauge WinTV-HVR1250",
127 .portc = CX23885_MPEG_DVB,
128 .input = {{
129 .type = CX23885_VMUX_TELEVISION,
130 .vmux = 0,
131 .gpio0 = 0xff00,
132 }, {
133 .type = CX23885_VMUX_DEBUG,
134 .vmux = 0,
135 .gpio0 = 0xff01,
136 }, {
137 .type = CX23885_VMUX_COMPOSITE1,
138 .vmux = 1,
139 .gpio0 = 0xff02,
140 }, {
141 .type = CX23885_VMUX_SVIDEO,
142 .vmux = 2,
143 .gpio0 = 0xff02,
144 } },
145 },
146 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
147 .name = "DViCO FusionHDTV5 Express",
148 .portb = CX23885_MPEG_DVB,
149 },
150 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
151 .name = "Hauppauge WinTV-HVR1500Q",
152 .portc = CX23885_MPEG_DVB,
153 },
154 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
155 .name = "Hauppauge WinTV-HVR1500",
156 .portc = CX23885_MPEG_DVB,
157 },
158 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
159 .name = "Hauppauge WinTV-HVR1200",
160 .portc = CX23885_MPEG_DVB,
161 },
162 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
163 .name = "Hauppauge WinTV-HVR1700",
164 .portc = CX23885_MPEG_DVB,
165 },
166 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
167 .name = "Hauppauge WinTV-HVR1400",
168 .portc = CX23885_MPEG_DVB,
169 },
170 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
171 .name = "DViCO FusionHDTV7 Dual Express",
172 .portb = CX23885_MPEG_DVB,
173 .portc = CX23885_MPEG_DVB,
174 },
175 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
176 .name = "DViCO FusionHDTV DVB-T Dual Express",
177 .portb = CX23885_MPEG_DVB,
178 .portc = CX23885_MPEG_DVB,
179 },
180 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
181 .name = "Leadtek Winfast PxDVR3200 H",
182 .portc = CX23885_MPEG_DVB,
183 },
184 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
185 .name = "Leadtek Winfast PxDVR3200 H XC4000",
186 .porta = CX23885_ANALOG_VIDEO,
187 .portc = CX23885_MPEG_DVB,
188 .tuner_type = TUNER_XC4000,
189 .tuner_addr = 0x61,
190 .radio_type = TUNER_XC4000,
191 .radio_addr = 0x61,
192 .input = {{
193 .type = CX23885_VMUX_TELEVISION,
194 .vmux = CX25840_VIN2_CH1 |
195 CX25840_VIN5_CH2 |
196 CX25840_NONE0_CH3,
197 }, {
198 .type = CX23885_VMUX_COMPOSITE1,
199 .vmux = CX25840_COMPOSITE1,
200 }, {
201 .type = CX23885_VMUX_SVIDEO,
202 .vmux = CX25840_SVIDEO_LUMA3 |
203 CX25840_SVIDEO_CHROMA4,
204 }, {
205 .type = CX23885_VMUX_COMPONENT,
206 .vmux = CX25840_VIN7_CH1 |
207 CX25840_VIN6_CH2 |
208 CX25840_VIN8_CH3 |
209 CX25840_COMPONENT_ON,
210 } },
211 },
212 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
213 .name = "Compro VideoMate E650F",
214 .portc = CX23885_MPEG_DVB,
215 },
216 [CX23885_BOARD_TBS_6920] = {
217 .name = "TurboSight TBS 6920",
218 .portb = CX23885_MPEG_DVB,
219 },
220 [CX23885_BOARD_TEVII_S470] = {
221 .name = "TeVii S470",
222 .portb = CX23885_MPEG_DVB,
223 },
224 [CX23885_BOARD_DVBWORLD_2005] = {
225 .name = "DVBWorld DVB-S2 2005",
226 .portb = CX23885_MPEG_DVB,
227 },
228 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
229 .ci_type = 1,
230 .name = "NetUP Dual DVB-S2 CI",
231 .portb = CX23885_MPEG_DVB,
232 .portc = CX23885_MPEG_DVB,
233 },
234 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
235 .name = "Hauppauge WinTV-HVR1270",
236 .portc = CX23885_MPEG_DVB,
237 },
238 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
239 .name = "Hauppauge WinTV-HVR1275",
240 .portc = CX23885_MPEG_DVB,
241 },
242 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
243 .name = "Hauppauge WinTV-HVR1255",
244 .portc = CX23885_MPEG_DVB,
245 },
246 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
247 .name = "Hauppauge WinTV-HVR1210",
248 .portc = CX23885_MPEG_DVB,
249 },
250 [CX23885_BOARD_MYGICA_X8506] = {
251 .name = "Mygica X8506 DMB-TH",
252 .tuner_type = TUNER_XC5000,
253 .tuner_addr = 0x61,
254 .tuner_bus = 1,
255 .porta = CX23885_ANALOG_VIDEO,
256 .portb = CX23885_MPEG_DVB,
257 .input = {
258 {
259 .type = CX23885_VMUX_TELEVISION,
260 .vmux = CX25840_COMPOSITE2,
261 },
262 {
263 .type = CX23885_VMUX_COMPOSITE1,
264 .vmux = CX25840_COMPOSITE8,
265 },
266 {
267 .type = CX23885_VMUX_SVIDEO,
268 .vmux = CX25840_SVIDEO_LUMA3 |
269 CX25840_SVIDEO_CHROMA4,
270 },
271 {
272 .type = CX23885_VMUX_COMPONENT,
273 .vmux = CX25840_COMPONENT_ON |
274 CX25840_VIN1_CH1 |
275 CX25840_VIN6_CH2 |
276 CX25840_VIN7_CH3,
277 },
278 },
279 },
280 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
281 .name = "Magic-Pro ProHDTV Extreme 2",
282 .tuner_type = TUNER_XC5000,
283 .tuner_addr = 0x61,
284 .tuner_bus = 1,
285 .porta = CX23885_ANALOG_VIDEO,
286 .portb = CX23885_MPEG_DVB,
287 .input = {
288 {
289 .type = CX23885_VMUX_TELEVISION,
290 .vmux = CX25840_COMPOSITE2,
291 },
292 {
293 .type = CX23885_VMUX_COMPOSITE1,
294 .vmux = CX25840_COMPOSITE8,
295 },
296 {
297 .type = CX23885_VMUX_SVIDEO,
298 .vmux = CX25840_SVIDEO_LUMA3 |
299 CX25840_SVIDEO_CHROMA4,
300 },
301 {
302 .type = CX23885_VMUX_COMPONENT,
303 .vmux = CX25840_COMPONENT_ON |
304 CX25840_VIN1_CH1 |
305 CX25840_VIN6_CH2 |
306 CX25840_VIN7_CH3,
307 },
308 },
309 },
310 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
311 .name = "Hauppauge WinTV-HVR1850",
312 .portb = CX23885_MPEG_ENCODER,
313 .portc = CX23885_MPEG_DVB,
314 },
315 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
316 .name = "Compro VideoMate E800",
317 .portc = CX23885_MPEG_DVB,
318 },
319 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
320 .name = "Hauppauge WinTV-HVR1290",
321 .portc = CX23885_MPEG_DVB,
322 },
323 [CX23885_BOARD_MYGICA_X8558PRO] = {
324 .name = "Mygica X8558 PRO DMB-TH",
325 .portb = CX23885_MPEG_DVB,
326 .portc = CX23885_MPEG_DVB,
327 },
328 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
329 .name = "LEADTEK WinFast PxTV1200",
330 .porta = CX23885_ANALOG_VIDEO,
331 .tuner_type = TUNER_XC2028,
332 .tuner_addr = 0x61,
333 .tuner_bus = 1,
334 .input = {{
335 .type = CX23885_VMUX_TELEVISION,
336 .vmux = CX25840_VIN2_CH1 |
337 CX25840_VIN5_CH2 |
338 CX25840_NONE0_CH3,
339 }, {
340 .type = CX23885_VMUX_COMPOSITE1,
341 .vmux = CX25840_COMPOSITE1,
342 }, {
343 .type = CX23885_VMUX_SVIDEO,
344 .vmux = CX25840_SVIDEO_LUMA3 |
345 CX25840_SVIDEO_CHROMA4,
346 }, {
347 .type = CX23885_VMUX_COMPONENT,
348 .vmux = CX25840_VIN7_CH1 |
349 CX25840_VIN6_CH2 |
350 CX25840_VIN8_CH3 |
351 CX25840_COMPONENT_ON,
352 } },
353 },
354 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
355 .name = "GoTView X5 3D Hybrid",
356 .tuner_type = TUNER_XC5000,
357 .tuner_addr = 0x64,
358 .tuner_bus = 1,
359 .porta = CX23885_ANALOG_VIDEO,
360 .portb = CX23885_MPEG_DVB,
361 .input = {{
362 .type = CX23885_VMUX_TELEVISION,
363 .vmux = CX25840_VIN2_CH1 |
364 CX25840_VIN5_CH2,
365 .gpio0 = 0x02,
366 }, {
367 .type = CX23885_VMUX_COMPOSITE1,
368 .vmux = CX23885_VMUX_COMPOSITE1,
369 }, {
370 .type = CX23885_VMUX_SVIDEO,
371 .vmux = CX25840_SVIDEO_LUMA3 |
372 CX25840_SVIDEO_CHROMA4,
373 } },
374 },
375 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
376 .ci_type = 2,
377 .name = "NetUP Dual DVB-T/C-CI RF",
378 .porta = CX23885_ANALOG_VIDEO,
379 .portb = CX23885_MPEG_DVB,
380 .portc = CX23885_MPEG_DVB,
381 .num_fds_portb = 2,
382 .num_fds_portc = 2,
383 .tuner_type = TUNER_XC5000,
384 .tuner_addr = 0x64,
385 .input = { {
386 .type = CX23885_VMUX_TELEVISION,
387 .vmux = CX25840_COMPOSITE1,
388 } },
389 },
390};
391const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
392
393/* ------------------------------------------------------------------ */
394/* PCI subsystem IDs */
395
396struct cx23885_subid cx23885_subids[] = {
397 {
398 .subvendor = 0x0070,
399 .subdevice = 0x3400,
400 .card = CX23885_BOARD_UNKNOWN,
401 }, {
402 .subvendor = 0x0070,
403 .subdevice = 0x7600,
404 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
405 }, {
406 .subvendor = 0x0070,
407 .subdevice = 0x7800,
408 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
409 }, {
410 .subvendor = 0x0070,
411 .subdevice = 0x7801,
412 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
413 }, {
414 .subvendor = 0x0070,
415 .subdevice = 0x7809,
416 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
417 }, {
418 .subvendor = 0x0070,
419 .subdevice = 0x7911,
420 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
421 }, {
422 .subvendor = 0x18ac,
423 .subdevice = 0xd500,
424 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
425 }, {
426 .subvendor = 0x0070,
427 .subdevice = 0x7790,
428 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
429 }, {
430 .subvendor = 0x0070,
431 .subdevice = 0x7797,
432 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
433 }, {
434 .subvendor = 0x0070,
435 .subdevice = 0x7710,
436 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
437 }, {
438 .subvendor = 0x0070,
439 .subdevice = 0x7717,
440 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
441 }, {
442 .subvendor = 0x0070,
443 .subdevice = 0x71d1,
444 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
445 }, {
446 .subvendor = 0x0070,
447 .subdevice = 0x71d3,
448 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
449 }, {
450 .subvendor = 0x0070,
451 .subdevice = 0x8101,
452 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
453 }, {
454 .subvendor = 0x0070,
455 .subdevice = 0x8010,
456 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
457 }, {
458 .subvendor = 0x18ac,
459 .subdevice = 0xd618,
460 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
461 }, {
462 .subvendor = 0x18ac,
463 .subdevice = 0xdb78,
464 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
465 }, {
466 .subvendor = 0x107d,
467 .subdevice = 0x6681,
468 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
469 }, {
470 .subvendor = 0x107d,
471 .subdevice = 0x6f39,
472 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
473 }, {
474 .subvendor = 0x185b,
475 .subdevice = 0xe800,
476 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
477 }, {
478 .subvendor = 0x6920,
479 .subdevice = 0x8888,
480 .card = CX23885_BOARD_TBS_6920,
481 }, {
482 .subvendor = 0xd470,
483 .subdevice = 0x9022,
484 .card = CX23885_BOARD_TEVII_S470,
485 }, {
486 .subvendor = 0x0001,
487 .subdevice = 0x2005,
488 .card = CX23885_BOARD_DVBWORLD_2005,
489 }, {
490 .subvendor = 0x1b55,
491 .subdevice = 0x2a2c,
492 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
493 }, {
494 .subvendor = 0x0070,
495 .subdevice = 0x2211,
496 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
497 }, {
498 .subvendor = 0x0070,
499 .subdevice = 0x2215,
500 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
501 }, {
502 .subvendor = 0x0070,
503 .subdevice = 0x221d,
504 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
505 }, {
506 .subvendor = 0x0070,
507 .subdevice = 0x2251,
508 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
509 }, {
510 .subvendor = 0x0070,
511 .subdevice = 0x2259,
512 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
513 }, {
514 .subvendor = 0x0070,
515 .subdevice = 0x2291,
516 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
517 }, {
518 .subvendor = 0x0070,
519 .subdevice = 0x2295,
520 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
521 }, {
522 .subvendor = 0x0070,
523 .subdevice = 0x2299,
524 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
525 }, {
526 .subvendor = 0x0070,
527 .subdevice = 0x229d,
528 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
529 }, {
530 .subvendor = 0x0070,
531 .subdevice = 0x22f0,
532 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
533 }, {
534 .subvendor = 0x0070,
535 .subdevice = 0x22f1,
536 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
537 }, {
538 .subvendor = 0x0070,
539 .subdevice = 0x22f2,
540 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
541 }, {
542 .subvendor = 0x0070,
543 .subdevice = 0x22f3,
544 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
545 }, {
546 .subvendor = 0x0070,
547 .subdevice = 0x22f4,
548 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
549 }, {
550 .subvendor = 0x0070,
551 .subdevice = 0x22f5,
552 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
553 }, {
554 .subvendor = 0x14f1,
555 .subdevice = 0x8651,
556 .card = CX23885_BOARD_MYGICA_X8506,
557 }, {
558 .subvendor = 0x14f1,
559 .subdevice = 0x8657,
560 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
561 }, {
562 .subvendor = 0x0070,
563 .subdevice = 0x8541,
564 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
565 }, {
566 .subvendor = 0x1858,
567 .subdevice = 0xe800,
568 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
569 }, {
570 .subvendor = 0x0070,
571 .subdevice = 0x8551,
572 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
573 }, {
574 .subvendor = 0x14f1,
575 .subdevice = 0x8578,
576 .card = CX23885_BOARD_MYGICA_X8558PRO,
577 }, {
578 .subvendor = 0x107d,
579 .subdevice = 0x6f22,
580 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
581 }, {
582 .subvendor = 0x5654,
583 .subdevice = 0x2390,
584 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
585 }, {
586 .subvendor = 0x1b55,
587 .subdevice = 0xe2e4,
588 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
589 },
590};
591const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
592
593void cx23885_card_list(struct cx23885_dev *dev)
594{
595 int i;
596
597 if (0 == dev->pci->subsystem_vendor &&
598 0 == dev->pci->subsystem_device) {
599 printk(KERN_INFO
600 "%s: Board has no valid PCIe Subsystem ID and can't\n"
601 "%s: be autodetected. Pass card=<n> insmod option\n"
602 "%s: to workaround that. Redirect complaints to the\n"
603 "%s: vendor of the TV card. Best regards,\n"
604 "%s: -- tux\n",
605 dev->name, dev->name, dev->name, dev->name, dev->name);
606 } else {
607 printk(KERN_INFO
608 "%s: Your board isn't known (yet) to the driver.\n"
609 "%s: Try to pick one of the existing card configs via\n"
610 "%s: card=<n> insmod option. Updating to the latest\n"
611 "%s: version might help as well.\n",
612 dev->name, dev->name, dev->name, dev->name);
613 }
614 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
615 dev->name);
616 for (i = 0; i < cx23885_bcount; i++)
617 printk(KERN_INFO "%s: card=%d -> %s\n",
618 dev->name, i, cx23885_boards[i].name);
619}
620
621static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
622{
623 struct tveeprom tv;
624
625 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
626 eeprom_data);
627
628 /* Make sure we support the board model */
629 switch (tv.model) {
630 case 22001:
631 /* WinTV-HVR1270 (PCIe, Retail, half height)
632 * ATSC/QAM and basic analog, IR Blast */
633 case 22009:
634 /* WinTV-HVR1210 (PCIe, Retail, half height)
635 * DVB-T and basic analog, IR Blast */
636 case 22011:
637 /* WinTV-HVR1270 (PCIe, Retail, half height)
638 * ATSC/QAM and basic analog, IR Recv */
639 case 22019:
640 /* WinTV-HVR1210 (PCIe, Retail, half height)
641 * DVB-T and basic analog, IR Recv */
642 case 22021:
643 /* WinTV-HVR1275 (PCIe, Retail, half height)
644 * ATSC/QAM and basic analog, IR Recv */
645 case 22029:
646 /* WinTV-HVR1210 (PCIe, Retail, half height)
647 * DVB-T and basic analog, IR Recv */
648 case 22101:
649 /* WinTV-HVR1270 (PCIe, Retail, full height)
650 * ATSC/QAM and basic analog, IR Blast */
651 case 22109:
652 /* WinTV-HVR1210 (PCIe, Retail, full height)
653 * DVB-T and basic analog, IR Blast */
654 case 22111:
655 /* WinTV-HVR1270 (PCIe, Retail, full height)
656 * ATSC/QAM and basic analog, IR Recv */
657 case 22119:
658 /* WinTV-HVR1210 (PCIe, Retail, full height)
659 * DVB-T and basic analog, IR Recv */
660 case 22121:
661 /* WinTV-HVR1275 (PCIe, Retail, full height)
662 * ATSC/QAM and basic analog, IR Recv */
663 case 22129:
664 /* WinTV-HVR1210 (PCIe, Retail, full height)
665 * DVB-T and basic analog, IR Recv */
666 case 71009:
667 /* WinTV-HVR1200 (PCIe, Retail, full height)
668 * DVB-T and basic analog */
669 case 71359:
670 /* WinTV-HVR1200 (PCIe, OEM, half height)
671 * DVB-T and basic analog */
672 case 71439:
673 /* WinTV-HVR1200 (PCIe, OEM, half height)
674 * DVB-T and basic analog */
675 case 71449:
676 /* WinTV-HVR1200 (PCIe, OEM, full height)
677 * DVB-T and basic analog */
678 case 71939:
679 /* WinTV-HVR1200 (PCIe, OEM, half height)
680 * DVB-T and basic analog */
681 case 71949:
682 /* WinTV-HVR1200 (PCIe, OEM, full height)
683 * DVB-T and basic analog */
684 case 71959:
685 /* WinTV-HVR1200 (PCIe, OEM, full height)
686 * DVB-T and basic analog */
687 case 71979:
688 /* WinTV-HVR1200 (PCIe, OEM, half height)
689 * DVB-T and basic analog */
690 case 71999:
691 /* WinTV-HVR1200 (PCIe, OEM, full height)
692 * DVB-T and basic analog */
693 case 76601:
694 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
695 channel ATSC and MPEG2 HW Encoder */
696 case 77001:
697 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
698 and Basic analog */
699 case 77011:
700 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
701 and Basic analog */
702 case 77041:
703 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
704 and Basic analog */
705 case 77051:
706 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
707 and Basic analog */
708 case 78011:
709 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
710 Dual channel ATSC and MPEG2 HW Encoder */
711 case 78501:
712 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
713 Dual channel ATSC and MPEG2 HW Encoder */
714 case 78521:
715 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
716 Dual channel ATSC and MPEG2 HW Encoder */
717 case 78531:
718 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
719 Dual channel ATSC and MPEG2 HW Encoder */
720 case 78631:
721 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
722 Dual channel ATSC and MPEG2 HW Encoder */
723 case 79001:
724 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
725 ATSC and Basic analog */
726 case 79101:
727 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
728 ATSC and Basic analog */
729 case 79501:
730 /* WinTV-HVR1250 (PCIe, No IR, half height,
731 ATSC [at least] and Basic analog) */
732 case 79561:
733 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
734 ATSC and Basic analog */
735 case 79571:
736 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
737 ATSC and Basic analog */
738 case 79671:
739 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
740 ATSC and Basic analog */
741 case 80019:
742 /* WinTV-HVR1400 (Express Card, Retail, IR,
743 * DVB-T and Basic analog */
744 case 81509:
745 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
746 * DVB-T and MPEG2 HW Encoder */
747 case 81519:
748 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
749 * DVB-T and MPEG2 HW Encoder */
750 break;
751 case 85021:
752 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
753 Dual channel ATSC and MPEG2 HW Encoder */
754 break;
755 case 85721:
756 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
757 Dual channel ATSC and Basic analog */
758 break;
759 default:
760 printk(KERN_WARNING "%s: warning: "
761 "unknown hauppauge model #%d\n",
762 dev->name, tv.model);
763 break;
764 }
765
766 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
767 dev->name, tv.model);
768}
769
770int cx23885_tuner_callback(void *priv, int component, int command, int arg)
771{
772 struct cx23885_tsport *port = priv;
773 struct cx23885_dev *dev = port->dev;
774 u32 bitmask = 0;
775
776 if (command == XC2028_RESET_CLK)
777 return 0;
778
779 if (command != 0) {
780 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
781 __func__, command);
782 return -EINVAL;
783 }
784
785 switch (dev->board) {
786 case CX23885_BOARD_HAUPPAUGE_HVR1400:
787 case CX23885_BOARD_HAUPPAUGE_HVR1500:
788 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
789 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
790 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
791 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
792 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
793 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
794 /* Tuner Reset Command */
795 bitmask = 0x04;
796 break;
797 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
798 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
799 /* Two identical tuners on two different i2c buses,
800 * we need to reset the correct gpio. */
801 if (port->nr == 1)
802 bitmask = 0x01;
803 else if (port->nr == 2)
804 bitmask = 0x04;
805 break;
806 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
807 /* Tuner Reset Command */
808 bitmask = 0x02;
809 break;
810 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
811 altera_ci_tuner_reset(dev, port->nr);
812 break;
813 }
814
815 if (bitmask) {
816 /* Drive the tuner into reset and back out */
817 cx_clear(GP0_IO, bitmask);
818 mdelay(200);
819 cx_set(GP0_IO, bitmask);
820 }
821
822 return 0;
823}
824
825void cx23885_gpio_setup(struct cx23885_dev *dev)
826{
827 switch (dev->board) {
828 case CX23885_BOARD_HAUPPAUGE_HVR1250:
829 /* GPIO-0 cx24227 demodulator reset */
830 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
831 break;
832 case CX23885_BOARD_HAUPPAUGE_HVR1500:
833 /* GPIO-0 cx24227 demodulator */
834 /* GPIO-2 xc3028 tuner */
835
836 /* Put the parts into reset */
837 cx_set(GP0_IO, 0x00050000);
838 cx_clear(GP0_IO, 0x00000005);
839 msleep(5);
840
841 /* Bring the parts out of reset */
842 cx_set(GP0_IO, 0x00050005);
843 break;
844 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
845 /* GPIO-0 cx24227 demodulator reset */
846 /* GPIO-2 xc5000 tuner reset */
847 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
848 break;
849 case CX23885_BOARD_HAUPPAUGE_HVR1800:
850 /* GPIO-0 656_CLK */
851 /* GPIO-1 656_D0 */
852 /* GPIO-2 8295A Reset */
853 /* GPIO-3-10 cx23417 data0-7 */
854 /* GPIO-11-14 cx23417 addr0-3 */
855 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
856 /* GPIO-19 IR_RX */
857
858 /* CX23417 GPIO's */
859 /* EIO15 Zilog Reset */
860 /* EIO14 S5H1409/CX24227 Reset */
861 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
862
863 /* Put the demod into reset and protect the eeprom */
864 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
865 mdelay(100);
866
867 /* Bring the demod and blaster out of reset */
868 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
869 mdelay(100);
870
871 /* Force the TDA8295A into reset and back */
872 cx23885_gpio_enable(dev, GPIO_2, 1);
873 cx23885_gpio_set(dev, GPIO_2);
874 mdelay(20);
875 cx23885_gpio_clear(dev, GPIO_2);
876 mdelay(20);
877 cx23885_gpio_set(dev, GPIO_2);
878 mdelay(20);
879 break;
880 case CX23885_BOARD_HAUPPAUGE_HVR1200:
881 /* GPIO-0 tda10048 demodulator reset */
882 /* GPIO-2 tda18271 tuner reset */
883
884 /* Put the parts into reset and back */
885 cx_set(GP0_IO, 0x00050000);
886 mdelay(20);
887 cx_clear(GP0_IO, 0x00000005);
888 mdelay(20);
889 cx_set(GP0_IO, 0x00050005);
890 break;
891 case CX23885_BOARD_HAUPPAUGE_HVR1700:
892 /* GPIO-0 TDA10048 demodulator reset */
893 /* GPIO-2 TDA8295A Reset */
894 /* GPIO-3-10 cx23417 data0-7 */
895 /* GPIO-11-14 cx23417 addr0-3 */
896 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
897
898 /* The following GPIO's are on the interna AVCore (cx25840) */
899 /* GPIO-19 IR_RX */
900 /* GPIO-20 IR_TX 416/DVBT Select */
901 /* GPIO-21 IIS DAT */
902 /* GPIO-22 IIS WCLK */
903 /* GPIO-23 IIS BCLK */
904
905 /* Put the parts into reset and back */
906 cx_set(GP0_IO, 0x00050000);
907 mdelay(20);
908 cx_clear(GP0_IO, 0x00000005);
909 mdelay(20);
910 cx_set(GP0_IO, 0x00050005);
911 break;
912 case CX23885_BOARD_HAUPPAUGE_HVR1400:
913 /* GPIO-0 Dibcom7000p demodulator reset */
914 /* GPIO-2 xc3028L tuner reset */
915 /* GPIO-13 LED */
916
917 /* Put the parts into reset and back */
918 cx_set(GP0_IO, 0x00050000);
919 mdelay(20);
920 cx_clear(GP0_IO, 0x00000005);
921 mdelay(20);
922 cx_set(GP0_IO, 0x00050005);
923 break;
924 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
925 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
926 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
927 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
928 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
929
930 /* Put the parts into reset and back */
931 cx_set(GP0_IO, 0x000f0000);
932 mdelay(20);
933 cx_clear(GP0_IO, 0x0000000f);
934 mdelay(20);
935 cx_set(GP0_IO, 0x000f000f);
936 break;
937 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
938 /* GPIO-0 portb xc3028 reset */
939 /* GPIO-1 portb zl10353 reset */
940 /* GPIO-2 portc xc3028 reset */
941 /* GPIO-3 portc zl10353 reset */
942
943 /* Put the parts into reset and back */
944 cx_set(GP0_IO, 0x000f0000);
945 mdelay(20);
946 cx_clear(GP0_IO, 0x0000000f);
947 mdelay(20);
948 cx_set(GP0_IO, 0x000f000f);
949 break;
950 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
951 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
952 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
953 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
954 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
955 /* GPIO-2 xc3028 tuner reset */
956
957 /* The following GPIO's are on the internal AVCore (cx25840) */
958 /* GPIO-? zl10353 demod reset */
959
960 /* Put the parts into reset and back */
961 cx_set(GP0_IO, 0x00040000);
962 mdelay(20);
963 cx_clear(GP0_IO, 0x00000004);
964 mdelay(20);
965 cx_set(GP0_IO, 0x00040004);
966 break;
967 case CX23885_BOARD_TBS_6920:
968 cx_write(MC417_CTL, 0x00000036);
969 cx_write(MC417_OEN, 0x00001000);
970 cx_set(MC417_RWD, 0x00000002);
971 mdelay(200);
972 cx_clear(MC417_RWD, 0x00000800);
973 mdelay(200);
974 cx_set(MC417_RWD, 0x00000800);
975 mdelay(200);
976 break;
977 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
978 /* GPIO-0 INTA from CiMax1
979 GPIO-1 INTB from CiMax2
980 GPIO-2 reset chips
981 GPIO-3 to GPIO-10 data/addr for CA
982 GPIO-11 ~CS0 to CiMax1
983 GPIO-12 ~CS1 to CiMax2
984 GPIO-13 ADL0 load LSB addr
985 GPIO-14 ADL1 load MSB addr
986 GPIO-15 ~RDY from CiMax
987 GPIO-17 ~RD to CiMax
988 GPIO-18 ~WR to CiMax
989 */
990 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
991 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
992 cx_clear(GP0_IO, 0x00030004);
993 mdelay(100);/* reset delay */
994 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
995 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
996 /* GPIO-15 IN as ~ACK, rest as OUT */
997 cx_write(MC417_OEN, 0x00001000);
998 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
999 cx_write(MC417_RWD, 0x0000c300);
1000 /* enable irq */
1001 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1002 break;
1003 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1004 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1005 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1006 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1007 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1008 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1009 /* GPIO-9 Demod reset */
1010
1011 /* Put the parts into reset and back */
1012 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1013 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1014 cx23885_gpio_clear(dev, GPIO_9);
1015 mdelay(20);
1016 cx23885_gpio_set(dev, GPIO_9);
1017 break;
1018 case CX23885_BOARD_MYGICA_X8506:
1019 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1020 /* GPIO-0 (0)Analog / (1)Digital TV */
1021 /* GPIO-1 reset XC5000 */
1022 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
1023 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1024 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1025 mdelay(100);
1026 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1027 mdelay(100);
1028 break;
1029 case CX23885_BOARD_MYGICA_X8558PRO:
1030 /* GPIO-0 reset first ATBM8830 */
1031 /* GPIO-1 reset second ATBM8830 */
1032 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1033 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1034 mdelay(100);
1035 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1036 mdelay(100);
1037 break;
1038 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1039 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1040 /* GPIO-0 656_CLK */
1041 /* GPIO-1 656_D0 */
1042 /* GPIO-2 Wake# */
1043 /* GPIO-3-10 cx23417 data0-7 */
1044 /* GPIO-11-14 cx23417 addr0-3 */
1045 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1046 /* GPIO-19 IR_RX */
1047 /* GPIO-20 C_IR_TX */
1048 /* GPIO-21 I2S DAT */
1049 /* GPIO-22 I2S WCLK */
1050 /* GPIO-23 I2S BCLK */
1051 /* ALT GPIO: EXP GPIO LATCH */
1052
1053 /* CX23417 GPIO's */
1054 /* GPIO-14 S5H1411/CX24228 Reset */
1055 /* GPIO-13 EEPROM write protect */
1056 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1057
1058 /* Put the demod into reset and protect the eeprom */
1059 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1060 mdelay(100);
1061
1062 /* Bring the demod out of reset */
1063 mc417_gpio_set(dev, GPIO_14);
1064 mdelay(100);
1065
1066 /* CX24228 GPIO */
1067 /* Connected to IF / Mux */
1068 break;
1069 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1070 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1071 break;
1072 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1073 /* GPIO-0 ~INT in
1074 GPIO-1 TMS out
1075 GPIO-2 ~reset chips out
1076 GPIO-3 to GPIO-10 data/addr for CA in/out
1077 GPIO-11 ~CS out
1078 GPIO-12 ADDR out
1079 GPIO-13 ~WR out
1080 GPIO-14 ~RD out
1081 GPIO-15 ~RDY in
1082 GPIO-16 TCK out
1083 GPIO-17 TDO in
1084 GPIO-18 TDI out
1085 */
1086 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1087 /* GPIO-0 as INT, reset & TMS low */
1088 cx_clear(GP0_IO, 0x00010006);
1089 mdelay(100);/* reset delay */
1090 cx_set(GP0_IO, 0x00000004); /* reset high */
1091 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1092 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1093 cx_write(MC417_OEN, 0x00005000);
1094 /* ~RD, ~WR high; ADDR low; ~CS high */
1095 cx_write(MC417_RWD, 0x00000d00);
1096 /* enable irq */
1097 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1098 break;
1099 }
1100}
1101
1102int cx23885_ir_init(struct cx23885_dev *dev)
1103{
1104 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1105 {
1106 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1107 .pin = CX23885_PIN_IR_RX_GPIO19,
1108 .function = CX23885_PAD_IR_RX,
1109 .value = 0,
1110 .strength = CX25840_PIN_DRIVE_MEDIUM,
1111 }, {
1112 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1113 .pin = CX23885_PIN_IR_TX_GPIO20,
1114 .function = CX23885_PAD_IR_TX,
1115 .value = 0,
1116 .strength = CX25840_PIN_DRIVE_MEDIUM,
1117 }
1118 };
1119 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1120
1121 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1122 {
1123 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1124 .pin = CX23885_PIN_IR_RX_GPIO19,
1125 .function = CX23885_PAD_IR_RX,
1126 .value = 0,
1127 .strength = CX25840_PIN_DRIVE_MEDIUM,
1128 }
1129 };
1130 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1131
1132 struct v4l2_subdev_ir_parameters params;
1133 int ret = 0;
1134 switch (dev->board) {
1135 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1136 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1137 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1138 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1139 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1140 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1141 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1142 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1143 /* FIXME: Implement me */
1144 break;
1145 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1146 ret = cx23888_ir_probe(dev);
1147 if (ret)
1148 break;
1149 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1150 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1151 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1152 break;
1153 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1154 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1155 ret = cx23888_ir_probe(dev);
1156 if (ret)
1157 break;
1158 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1159 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1160 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1161 /*
1162 * For these boards we need to invert the Tx output via the
1163 * IR controller to have the LED off while idle
1164 */
1165 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1166 params.enable = false;
1167 params.shutdown = false;
1168 params.invert_level = true;
1169 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1170 params.shutdown = true;
1171 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1172 break;
1173 case CX23885_BOARD_TEVII_S470:
1174 if (!enable_885_ir)
1175 break;
1176 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1177 if (dev->sd_ir == NULL) {
1178 ret = -ENODEV;
1179 break;
1180 }
1181 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1182 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1183 break;
1184 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1185 if (!enable_885_ir)
1186 break;
1187 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1188 if (dev->sd_ir == NULL) {
1189 ret = -ENODEV;
1190 break;
1191 }
1192 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1193 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1194 break;
1195 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1196 request_module("ir-kbd-i2c");
1197 break;
1198 }
1199
1200 return ret;
1201}
1202
1203void cx23885_ir_fini(struct cx23885_dev *dev)
1204{
1205 switch (dev->board) {
1206 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1207 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1208 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1209 cx23885_irq_remove(dev, PCI_MSK_IR);
1210 cx23888_ir_remove(dev);
1211 dev->sd_ir = NULL;
1212 break;
1213 case CX23885_BOARD_TEVII_S470:
1214 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1215 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1216 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1217 dev->sd_ir = NULL;
1218 break;
1219 }
1220}
1221
1222int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1223{
1224 int data;
1225 int tdo = 0;
1226 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1227 /*TMS*/
1228 data = ((cx_read(GP0_IO)) & (~0x00000002));
1229 data |= (tms ? 0x00020002 : 0x00020000);
1230 cx_write(GP0_IO, data);
1231
1232 /*TDI*/
1233 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1234 data |= (tdi ? 0x00008000 : 0);
1235 cx_write(MC417_RWD, data);
1236 if (read_tdo)
1237 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1238
1239 cx_write(MC417_RWD, data | 0x00002000);
1240 udelay(1);
1241 /*TCK*/
1242 cx_write(MC417_RWD, data);
1243
1244 return tdo;
1245}
1246
1247void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1248{
1249 switch (dev->board) {
1250 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1251 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1252 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1253 if (dev->sd_ir)
1254 cx23885_irq_add_enable(dev, PCI_MSK_IR);
1255 break;
1256 case CX23885_BOARD_TEVII_S470:
1257 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1258 if (dev->sd_ir)
1259 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1260 break;
1261 }
1262}
1263
1264void cx23885_card_setup(struct cx23885_dev *dev)
1265{
1266 struct cx23885_tsport *ts1 = &dev->ts1;
1267 struct cx23885_tsport *ts2 = &dev->ts2;
1268
1269 static u8 eeprom[256];
1270
1271 if (dev->i2c_bus[0].i2c_rc == 0) {
1272 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1273 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1274 eeprom, sizeof(eeprom));
1275 }
1276
1277 switch (dev->board) {
1278 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1279 if (dev->i2c_bus[0].i2c_rc == 0) {
1280 if (eeprom[0x80] != 0x84)
1281 hauppauge_eeprom(dev, eeprom+0xc0);
1282 else
1283 hauppauge_eeprom(dev, eeprom+0x80);
1284 }
1285 break;
1286 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1287 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1288 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1289 if (dev->i2c_bus[0].i2c_rc == 0)
1290 hauppauge_eeprom(dev, eeprom+0x80);
1291 break;
1292 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1293 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1294 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1295 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1296 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1297 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1298 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1299 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1300 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1301 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1302 if (dev->i2c_bus[0].i2c_rc == 0)
1303 hauppauge_eeprom(dev, eeprom+0xc0);
1304 break;
1305 }
1306
1307 switch (dev->board) {
1308 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1309 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1310 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1311 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1312 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1313 /* break omitted intentionally */
1314 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1315 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1316 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1317 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1318 break;
1319 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1320 /* Defaults for VID B - Analog encoder */
1321 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1322 ts1->gen_ctrl_val = 0x10e;
1323 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1324 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1325
1326 /* APB_TSVALERR_POL (active low)*/
1327 ts1->vld_misc_val = 0x2000;
1328 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1329
1330 /* Defaults for VID C */
1331 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1332 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1333 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1334 break;
1335 case CX23885_BOARD_TBS_6920:
1336 ts1->gen_ctrl_val = 0x4; /* Parallel */
1337 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1338 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1339 break;
1340 case CX23885_BOARD_TEVII_S470:
1341 case CX23885_BOARD_DVBWORLD_2005:
1342 ts1->gen_ctrl_val = 0x5; /* Parallel */
1343 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1344 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1345 break;
1346 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1347 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1348 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1349 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1350 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1351 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1352 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1353 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1354 break;
1355 case CX23885_BOARD_MYGICA_X8506:
1356 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1357 ts1->gen_ctrl_val = 0x5; /* Parallel */
1358 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1359 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1360 break;
1361 case CX23885_BOARD_MYGICA_X8558PRO:
1362 ts1->gen_ctrl_val = 0x5; /* Parallel */
1363 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1364 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1365 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1366 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1367 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1368 break;
1369 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1370 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1371 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1372 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1373 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1374 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1375 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1376 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1377 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1378 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1379 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1380 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1381 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1382 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1383 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1384 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1385 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1386 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1387 default:
1388 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1389 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1390 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1391 }
1392
1393 /* Certain boards support analog, or require the avcore to be
1394 * loaded, ensure this happens.
1395 */
1396 switch (dev->board) {
1397 case CX23885_BOARD_TEVII_S470:
1398 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1399 /* Currently only enabled for the integrated IR controller */
1400 if (!enable_885_ir)
1401 break;
1402 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1403 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1404 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1405 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1406 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1407 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1408 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1409 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1410 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1411 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1412 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1413 case CX23885_BOARD_MYGICA_X8506:
1414 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1415 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1416 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1417 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1418 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1419 &dev->i2c_bus[2].i2c_adap,
1420 "cx25840", 0x88 >> 1, NULL);
1421 if (dev->sd_cx25840) {
1422 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1423 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1424 }
1425 break;
1426 }
1427
1428 /* AUX-PLL 27MHz CLK */
1429 switch (dev->board) {
1430 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1431 netup_initialize(dev);
1432 break;
1433 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1434 int ret;
1435 const struct firmware *fw;
1436 const char *filename = "dvb-netup-altera-01.fw";
1437 char *action = "configure";
1438 static struct netup_card_info cinfo;
1439 struct altera_config netup_config = {
1440 .dev = dev,
1441 .action = action,
1442 .jtag_io = netup_jtag_io,
1443 };
1444
1445 netup_initialize(dev);
1446
1447 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1448 if (netup_card_rev)
1449 cinfo.rev = netup_card_rev;
1450
1451 switch (cinfo.rev) {
1452 case 0x4:
1453 filename = "dvb-netup-altera-04.fw";
1454 break;
1455 default:
1456 filename = "dvb-netup-altera-01.fw";
1457 break;
1458 }
1459 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
1460 cinfo.rev, filename);
1461
1462 ret = request_firmware(&fw, filename, &dev->pci->dev);
1463 if (ret != 0)
1464 printk(KERN_ERR "did not find the firmware file. (%s) "
1465 "Please see linux/Documentation/dvb/ for more details "
1466 "on firmware-problems.", filename);
1467 else
1468 altera_init(&netup_config, fw);
1469
1470 release_firmware(fw);
1471 break;
1472 }
1473 }
1474}
1475
1476/* ------------------------------------------------------------------ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-23 05:49:09 -0400