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-rw-r--r--drivers/media/dvb/pt1/Kconfig12
-rw-r--r--drivers/media/dvb/pt1/Makefile5
-rw-r--r--drivers/media/dvb/pt1/pt1.c1209
-rw-r--r--drivers/media/dvb/pt1/va1j5jf8007s.c735
-rw-r--r--drivers/media/dvb/pt1/va1j5jf8007s.h46
-rw-r--r--drivers/media/dvb/pt1/va1j5jf8007t.c536
-rw-r--r--drivers/media/dvb/pt1/va1j5jf8007t.h46
7 files changed, 2589 insertions, 0 deletions
diff --git a/drivers/media/dvb/pt1/Kconfig b/drivers/media/dvb/pt1/Kconfig
new file mode 100644
index 00000000000..24501d5bf70
--- /dev/null
+++ b/drivers/media/dvb/pt1/Kconfig
@@ -0,0 +1,12 @@
1config DVB_PT1
2 tristate "PT1 cards"
3 depends on DVB_CORE && PCI && I2C
4 help
5 Support for Earthsoft PT1 PCI cards.
6
7 Since these cards have no MPEG decoder onboard, they transmit
8 only compressed MPEG data over the PCI bus, so you need
9 an external software decoder to watch TV on your computer.
10
11 Say Y or M if you own such a device and want to use it.
12
diff --git a/drivers/media/dvb/pt1/Makefile b/drivers/media/dvb/pt1/Makefile
new file mode 100644
index 00000000000..a66da17bbe3
--- /dev/null
+++ b/drivers/media/dvb/pt1/Makefile
@@ -0,0 +1,5 @@
1earth-pt1-objs := pt1.o va1j5jf8007s.o va1j5jf8007t.o
2
3obj-$(CONFIG_DVB_PT1) += earth-pt1.o
4
5EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core -Idrivers/media/dvb/frontends
diff --git a/drivers/media/dvb/pt1/pt1.c b/drivers/media/dvb/pt1/pt1.c
new file mode 100644
index 00000000000..b81df5fafe2
--- /dev/null
+++ b/drivers/media/dvb/pt1/pt1.c
@@ -0,0 +1,1209 @@
1/*
2 * driver for Earthsoft PT1/PT2
3 *
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
5 *
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/slab.h>
27#include <linux/vmalloc.h>
28#include <linux/pci.h>
29#include <linux/kthread.h>
30#include <linux/freezer.h>
31
32#include "dvbdev.h"
33#include "dvb_demux.h"
34#include "dmxdev.h"
35#include "dvb_net.h"
36#include "dvb_frontend.h"
37
38#include "va1j5jf8007t.h"
39#include "va1j5jf8007s.h"
40
41#define DRIVER_NAME "earth-pt1"
42
43#define PT1_PAGE_SHIFT 12
44#define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
45#define PT1_NR_UPACKETS 1024
46#define PT1_NR_BUFS 511
47
48struct pt1_buffer_page {
49 __le32 upackets[PT1_NR_UPACKETS];
50};
51
52struct pt1_table_page {
53 __le32 next_pfn;
54 __le32 buf_pfns[PT1_NR_BUFS];
55};
56
57struct pt1_buffer {
58 struct pt1_buffer_page *page;
59 dma_addr_t addr;
60};
61
62struct pt1_table {
63 struct pt1_table_page *page;
64 dma_addr_t addr;
65 struct pt1_buffer bufs[PT1_NR_BUFS];
66};
67
68#define PT1_NR_ADAPS 4
69
70struct pt1_adapter;
71
72struct pt1 {
73 struct pci_dev *pdev;
74 void __iomem *regs;
75 struct i2c_adapter i2c_adap;
76 int i2c_running;
77 struct pt1_adapter *adaps[PT1_NR_ADAPS];
78 struct pt1_table *tables;
79 struct task_struct *kthread;
80
81 struct mutex lock;
82 int power;
83 int reset;
84};
85
86struct pt1_adapter {
87 struct pt1 *pt1;
88 int index;
89
90 u8 *buf;
91 int upacket_count;
92 int packet_count;
93
94 struct dvb_adapter adap;
95 struct dvb_demux demux;
96 int users;
97 struct dmxdev dmxdev;
98 struct dvb_net net;
99 struct dvb_frontend *fe;
100 int (*orig_set_voltage)(struct dvb_frontend *fe,
101 fe_sec_voltage_t voltage);
102 int (*orig_sleep)(struct dvb_frontend *fe);
103 int (*orig_init)(struct dvb_frontend *fe);
104
105 fe_sec_voltage_t voltage;
106 int sleep;
107};
108
109#define pt1_printk(level, pt1, format, arg...) \
110 dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
111
112static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
113{
114 writel(data, pt1->regs + reg * 4);
115}
116
117static u32 pt1_read_reg(struct pt1 *pt1, int reg)
118{
119 return readl(pt1->regs + reg * 4);
120}
121
122static int pt1_nr_tables = 64;
123module_param_named(nr_tables, pt1_nr_tables, int, 0);
124
125static void pt1_increment_table_count(struct pt1 *pt1)
126{
127 pt1_write_reg(pt1, 0, 0x00000020);
128}
129
130static void pt1_init_table_count(struct pt1 *pt1)
131{
132 pt1_write_reg(pt1, 0, 0x00000010);
133}
134
135static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
136{
137 pt1_write_reg(pt1, 5, first_pfn);
138 pt1_write_reg(pt1, 0, 0x0c000040);
139}
140
141static void pt1_unregister_tables(struct pt1 *pt1)
142{
143 pt1_write_reg(pt1, 0, 0x08080000);
144}
145
146static int pt1_sync(struct pt1 *pt1)
147{
148 int i;
149 for (i = 0; i < 57; i++) {
150 if (pt1_read_reg(pt1, 0) & 0x20000000)
151 return 0;
152 pt1_write_reg(pt1, 0, 0x00000008);
153 }
154 pt1_printk(KERN_ERR, pt1, "could not sync\n");
155 return -EIO;
156}
157
158static u64 pt1_identify(struct pt1 *pt1)
159{
160 int i;
161 u64 id;
162 id = 0;
163 for (i = 0; i < 57; i++) {
164 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
165 pt1_write_reg(pt1, 0, 0x00000008);
166 }
167 return id;
168}
169
170static int pt1_unlock(struct pt1 *pt1)
171{
172 int i;
173 pt1_write_reg(pt1, 0, 0x00000008);
174 for (i = 0; i < 3; i++) {
175 if (pt1_read_reg(pt1, 0) & 0x80000000)
176 return 0;
177 schedule_timeout_uninterruptible((HZ + 999) / 1000);
178 }
179 pt1_printk(KERN_ERR, pt1, "could not unlock\n");
180 return -EIO;
181}
182
183static int pt1_reset_pci(struct pt1 *pt1)
184{
185 int i;
186 pt1_write_reg(pt1, 0, 0x01010000);
187 pt1_write_reg(pt1, 0, 0x01000000);
188 for (i = 0; i < 10; i++) {
189 if (pt1_read_reg(pt1, 0) & 0x00000001)
190 return 0;
191 schedule_timeout_uninterruptible((HZ + 999) / 1000);
192 }
193 pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
194 return -EIO;
195}
196
197static int pt1_reset_ram(struct pt1 *pt1)
198{
199 int i;
200 pt1_write_reg(pt1, 0, 0x02020000);
201 pt1_write_reg(pt1, 0, 0x02000000);
202 for (i = 0; i < 10; i++) {
203 if (pt1_read_reg(pt1, 0) & 0x00000002)
204 return 0;
205 schedule_timeout_uninterruptible((HZ + 999) / 1000);
206 }
207 pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
208 return -EIO;
209}
210
211static int pt1_do_enable_ram(struct pt1 *pt1)
212{
213 int i, j;
214 u32 status;
215 status = pt1_read_reg(pt1, 0) & 0x00000004;
216 pt1_write_reg(pt1, 0, 0x00000002);
217 for (i = 0; i < 10; i++) {
218 for (j = 0; j < 1024; j++) {
219 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
220 return 0;
221 }
222 schedule_timeout_uninterruptible((HZ + 999) / 1000);
223 }
224 pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
225 return -EIO;
226}
227
228static int pt1_enable_ram(struct pt1 *pt1)
229{
230 int i, ret;
231 int phase;
232 schedule_timeout_uninterruptible((HZ + 999) / 1000);
233 phase = pt1->pdev->device == 0x211a ? 128 : 166;
234 for (i = 0; i < phase; i++) {
235 ret = pt1_do_enable_ram(pt1);
236 if (ret < 0)
237 return ret;
238 }
239 return 0;
240}
241
242static void pt1_disable_ram(struct pt1 *pt1)
243{
244 pt1_write_reg(pt1, 0, 0x0b0b0000);
245}
246
247static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
248{
249 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
250}
251
252static void pt1_init_streams(struct pt1 *pt1)
253{
254 int i;
255 for (i = 0; i < PT1_NR_ADAPS; i++)
256 pt1_set_stream(pt1, i, 0);
257}
258
259static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
260{
261 u32 upacket;
262 int i;
263 int index;
264 struct pt1_adapter *adap;
265 int offset;
266 u8 *buf;
267
268 if (!page->upackets[PT1_NR_UPACKETS - 1])
269 return 0;
270
271 for (i = 0; i < PT1_NR_UPACKETS; i++) {
272 upacket = le32_to_cpu(page->upackets[i]);
273 index = (upacket >> 29) - 1;
274 if (index < 0 || index >= PT1_NR_ADAPS)
275 continue;
276
277 adap = pt1->adaps[index];
278 if (upacket >> 25 & 1)
279 adap->upacket_count = 0;
280 else if (!adap->upacket_count)
281 continue;
282
283 buf = adap->buf;
284 offset = adap->packet_count * 188 + adap->upacket_count * 3;
285 buf[offset] = upacket >> 16;
286 buf[offset + 1] = upacket >> 8;
287 if (adap->upacket_count != 62)
288 buf[offset + 2] = upacket;
289
290 if (++adap->upacket_count >= 63) {
291 adap->upacket_count = 0;
292 if (++adap->packet_count >= 21) {
293 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
294 adap->packet_count = 0;
295 }
296 }
297 }
298
299 page->upackets[PT1_NR_UPACKETS - 1] = 0;
300 return 1;
301}
302
303static int pt1_thread(void *data)
304{
305 struct pt1 *pt1;
306 int table_index;
307 int buf_index;
308 struct pt1_buffer_page *page;
309
310 pt1 = data;
311 set_freezable();
312
313 table_index = 0;
314 buf_index = 0;
315
316 while (!kthread_should_stop()) {
317 try_to_freeze();
318
319 page = pt1->tables[table_index].bufs[buf_index].page;
320 if (!pt1_filter(pt1, page)) {
321 schedule_timeout_interruptible((HZ + 999) / 1000);
322 continue;
323 }
324
325 if (++buf_index >= PT1_NR_BUFS) {
326 pt1_increment_table_count(pt1);
327 buf_index = 0;
328 if (++table_index >= pt1_nr_tables)
329 table_index = 0;
330 }
331 }
332
333 return 0;
334}
335
336static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
337{
338 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
339}
340
341static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
342{
343 void *page;
344 dma_addr_t addr;
345
346 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
347 GFP_KERNEL);
348 if (page == NULL)
349 return NULL;
350
351 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
352 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
353
354 *addrp = addr;
355 *pfnp = addr >> PT1_PAGE_SHIFT;
356 return page;
357}
358
359static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
360{
361 pt1_free_page(pt1, buf->page, buf->addr);
362}
363
364static int
365pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
366{
367 struct pt1_buffer_page *page;
368 dma_addr_t addr;
369
370 page = pt1_alloc_page(pt1, &addr, pfnp);
371 if (page == NULL)
372 return -ENOMEM;
373
374 page->upackets[PT1_NR_UPACKETS - 1] = 0;
375
376 buf->page = page;
377 buf->addr = addr;
378 return 0;
379}
380
381static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
382{
383 int i;
384
385 for (i = 0; i < PT1_NR_BUFS; i++)
386 pt1_cleanup_buffer(pt1, &table->bufs[i]);
387
388 pt1_free_page(pt1, table->page, table->addr);
389}
390
391static int
392pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
393{
394 struct pt1_table_page *page;
395 dma_addr_t addr;
396 int i, ret;
397 u32 buf_pfn;
398
399 page = pt1_alloc_page(pt1, &addr, pfnp);
400 if (page == NULL)
401 return -ENOMEM;
402
403 for (i = 0; i < PT1_NR_BUFS; i++) {
404 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
405 if (ret < 0)
406 goto err;
407
408 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
409 }
410
411 pt1_increment_table_count(pt1);
412 table->page = page;
413 table->addr = addr;
414 return 0;
415
416err:
417 while (i--)
418 pt1_cleanup_buffer(pt1, &table->bufs[i]);
419
420 pt1_free_page(pt1, page, addr);
421 return ret;
422}
423
424static void pt1_cleanup_tables(struct pt1 *pt1)
425{
426 struct pt1_table *tables;
427 int i;
428
429 tables = pt1->tables;
430 pt1_unregister_tables(pt1);
431
432 for (i = 0; i < pt1_nr_tables; i++)
433 pt1_cleanup_table(pt1, &tables[i]);
434
435 vfree(tables);
436}
437
438static int pt1_init_tables(struct pt1 *pt1)
439{
440 struct pt1_table *tables;
441 int i, ret;
442 u32 first_pfn, pfn;
443
444 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
445 if (tables == NULL)
446 return -ENOMEM;
447
448 pt1_init_table_count(pt1);
449
450 i = 0;
451 if (pt1_nr_tables) {
452 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
453 if (ret)
454 goto err;
455 i++;
456 }
457
458 while (i < pt1_nr_tables) {
459 ret = pt1_init_table(pt1, &tables[i], &pfn);
460 if (ret)
461 goto err;
462 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
463 i++;
464 }
465
466 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
467
468 pt1_register_tables(pt1, first_pfn);
469 pt1->tables = tables;
470 return 0;
471
472err:
473 while (i--)
474 pt1_cleanup_table(pt1, &tables[i]);
475
476 vfree(tables);
477 return ret;
478}
479
480static int pt1_start_feed(struct dvb_demux_feed *feed)
481{
482 struct pt1_adapter *adap;
483 adap = container_of(feed->demux, struct pt1_adapter, demux);
484 if (!adap->users++)
485 pt1_set_stream(adap->pt1, adap->index, 1);
486 return 0;
487}
488
489static int pt1_stop_feed(struct dvb_demux_feed *feed)
490{
491 struct pt1_adapter *adap;
492 adap = container_of(feed->demux, struct pt1_adapter, demux);
493 if (!--adap->users)
494 pt1_set_stream(adap->pt1, adap->index, 0);
495 return 0;
496}
497
498static void
499pt1_update_power(struct pt1 *pt1)
500{
501 int bits;
502 int i;
503 struct pt1_adapter *adap;
504 static const int sleep_bits[] = {
505 1 << 4,
506 1 << 6 | 1 << 7,
507 1 << 5,
508 1 << 6 | 1 << 8,
509 };
510
511 bits = pt1->power | !pt1->reset << 3;
512 mutex_lock(&pt1->lock);
513 for (i = 0; i < PT1_NR_ADAPS; i++) {
514 adap = pt1->adaps[i];
515 switch (adap->voltage) {
516 case SEC_VOLTAGE_13: /* actually 11V */
517 bits |= 1 << 1;
518 break;
519 case SEC_VOLTAGE_18: /* actually 15V */
520 bits |= 1 << 1 | 1 << 2;
521 break;
522 default:
523 break;
524 }
525
526 /* XXX: The bits should be changed depending on adap->sleep. */
527 bits |= sleep_bits[i];
528 }
529 pt1_write_reg(pt1, 1, bits);
530 mutex_unlock(&pt1->lock);
531}
532
533static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
534{
535 struct pt1_adapter *adap;
536
537 adap = container_of(fe->dvb, struct pt1_adapter, adap);
538 adap->voltage = voltage;
539 pt1_update_power(adap->pt1);
540
541 if (adap->orig_set_voltage)
542 return adap->orig_set_voltage(fe, voltage);
543 else
544 return 0;
545}
546
547static int pt1_sleep(struct dvb_frontend *fe)
548{
549 struct pt1_adapter *adap;
550
551 adap = container_of(fe->dvb, struct pt1_adapter, adap);
552 adap->sleep = 1;
553 pt1_update_power(adap->pt1);
554
555 if (adap->orig_sleep)
556 return adap->orig_sleep(fe);
557 else
558 return 0;
559}
560
561static int pt1_wakeup(struct dvb_frontend *fe)
562{
563 struct pt1_adapter *adap;
564
565 adap = container_of(fe->dvb, struct pt1_adapter, adap);
566 adap->sleep = 0;
567 pt1_update_power(adap->pt1);
568 schedule_timeout_uninterruptible((HZ + 999) / 1000);
569
570 if (adap->orig_init)
571 return adap->orig_init(fe);
572 else
573 return 0;
574}
575
576static void pt1_free_adapter(struct pt1_adapter *adap)
577{
578 dvb_net_release(&adap->net);
579 adap->demux.dmx.close(&adap->demux.dmx);
580 dvb_dmxdev_release(&adap->dmxdev);
581 dvb_dmx_release(&adap->demux);
582 dvb_unregister_adapter(&adap->adap);
583 free_page((unsigned long)adap->buf);
584 kfree(adap);
585}
586
587DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
588
589static struct pt1_adapter *
590pt1_alloc_adapter(struct pt1 *pt1)
591{
592 struct pt1_adapter *adap;
593 void *buf;
594 struct dvb_adapter *dvb_adap;
595 struct dvb_demux *demux;
596 struct dmxdev *dmxdev;
597 int ret;
598
599 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
600 if (!adap) {
601 ret = -ENOMEM;
602 goto err;
603 }
604
605 adap->pt1 = pt1;
606
607 adap->voltage = SEC_VOLTAGE_OFF;
608 adap->sleep = 1;
609
610 buf = (u8 *)__get_free_page(GFP_KERNEL);
611 if (!buf) {
612 ret = -ENOMEM;
613 goto err_kfree;
614 }
615
616 adap->buf = buf;
617 adap->upacket_count = 0;
618 adap->packet_count = 0;
619
620 dvb_adap = &adap->adap;
621 dvb_adap->priv = adap;
622 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
623 &pt1->pdev->dev, adapter_nr);
624 if (ret < 0)
625 goto err_free_page;
626
627 demux = &adap->demux;
628 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
629 demux->priv = adap;
630 demux->feednum = 256;
631 demux->filternum = 256;
632 demux->start_feed = pt1_start_feed;
633 demux->stop_feed = pt1_stop_feed;
634 demux->write_to_decoder = NULL;
635 ret = dvb_dmx_init(demux);
636 if (ret < 0)
637 goto err_unregister_adapter;
638
639 dmxdev = &adap->dmxdev;
640 dmxdev->filternum = 256;
641 dmxdev->demux = &demux->dmx;
642 dmxdev->capabilities = 0;
643 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
644 if (ret < 0)
645 goto err_dmx_release;
646
647 dvb_net_init(dvb_adap, &adap->net, &demux->dmx);
648
649 return adap;
650
651err_dmx_release:
652 dvb_dmx_release(demux);
653err_unregister_adapter:
654 dvb_unregister_adapter(dvb_adap);
655err_free_page:
656 free_page((unsigned long)buf);
657err_kfree:
658 kfree(adap);
659err:
660 return ERR_PTR(ret);
661}
662
663static void pt1_cleanup_adapters(struct pt1 *pt1)
664{
665 int i;
666 for (i = 0; i < PT1_NR_ADAPS; i++)
667 pt1_free_adapter(pt1->adaps[i]);
668}
669
670static int pt1_init_adapters(struct pt1 *pt1)
671{
672 int i;
673 struct pt1_adapter *adap;
674 int ret;
675
676 for (i = 0; i < PT1_NR_ADAPS; i++) {
677 adap = pt1_alloc_adapter(pt1);
678 if (IS_ERR(adap)) {
679 ret = PTR_ERR(adap);
680 goto err;
681 }
682
683 adap->index = i;
684 pt1->adaps[i] = adap;
685 }
686 return 0;
687
688err:
689 while (i--)
690 pt1_free_adapter(pt1->adaps[i]);
691
692 return ret;
693}
694
695static void pt1_cleanup_frontend(struct pt1_adapter *adap)
696{
697 dvb_unregister_frontend(adap->fe);
698}
699
700static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
701{
702 int ret;
703
704 adap->orig_set_voltage = fe->ops.set_voltage;
705 adap->orig_sleep = fe->ops.sleep;
706 adap->orig_init = fe->ops.init;
707 fe->ops.set_voltage = pt1_set_voltage;
708 fe->ops.sleep = pt1_sleep;
709 fe->ops.init = pt1_wakeup;
710
711 ret = dvb_register_frontend(&adap->adap, fe);
712 if (ret < 0)
713 return ret;
714
715 adap->fe = fe;
716 return 0;
717}
718
719static void pt1_cleanup_frontends(struct pt1 *pt1)
720{
721 int i;
722 for (i = 0; i < PT1_NR_ADAPS; i++)
723 pt1_cleanup_frontend(pt1->adaps[i]);
724}
725
726struct pt1_config {
727 struct va1j5jf8007s_config va1j5jf8007s_config;
728 struct va1j5jf8007t_config va1j5jf8007t_config;
729};
730
731static const struct pt1_config pt1_configs[2] = {
732 {
733 {
734 .demod_address = 0x1b,
735 .frequency = VA1J5JF8007S_20MHZ,
736 },
737 {
738 .demod_address = 0x1a,
739 .frequency = VA1J5JF8007T_20MHZ,
740 },
741 }, {
742 {
743 .demod_address = 0x19,
744 .frequency = VA1J5JF8007S_20MHZ,
745 },
746 {
747 .demod_address = 0x18,
748 .frequency = VA1J5JF8007T_20MHZ,
749 },
750 },
751};
752
753static const struct pt1_config pt2_configs[2] = {
754 {
755 {
756 .demod_address = 0x1b,
757 .frequency = VA1J5JF8007S_25MHZ,
758 },
759 {
760 .demod_address = 0x1a,
761 .frequency = VA1J5JF8007T_25MHZ,
762 },
763 }, {
764 {
765 .demod_address = 0x19,
766 .frequency = VA1J5JF8007S_25MHZ,
767 },
768 {
769 .demod_address = 0x18,
770 .frequency = VA1J5JF8007T_25MHZ,
771 },
772 },
773};
774
775static int pt1_init_frontends(struct pt1 *pt1)
776{
777 int i, j;
778 struct i2c_adapter *i2c_adap;
779 const struct pt1_config *configs, *config;
780 struct dvb_frontend *fe[4];
781 int ret;
782
783 i = 0;
784 j = 0;
785
786 i2c_adap = &pt1->i2c_adap;
787 configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
788 do {
789 config = &configs[i / 2];
790
791 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
792 i2c_adap);
793 if (!fe[i]) {
794 ret = -ENODEV; /* This does not sound nice... */
795 goto err;
796 }
797 i++;
798
799 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
800 i2c_adap);
801 if (!fe[i]) {
802 ret = -ENODEV;
803 goto err;
804 }
805 i++;
806
807 ret = va1j5jf8007s_prepare(fe[i - 2]);
808 if (ret < 0)
809 goto err;
810
811 ret = va1j5jf8007t_prepare(fe[i - 1]);
812 if (ret < 0)
813 goto err;
814
815 } while (i < 4);
816
817 do {
818 ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
819 if (ret < 0)
820 goto err;
821 } while (++j < 4);
822
823 return 0;
824
825err:
826 while (i-- > j)
827 fe[i]->ops.release(fe[i]);
828
829 while (j--)
830 dvb_unregister_frontend(fe[j]);
831
832 return ret;
833}
834
835static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
836 int clock, int data, int next_addr)
837{
838 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
839 !clock << 11 | !data << 10 | next_addr);
840}
841
842static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
843{
844 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
845 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
846 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
847 *addrp = addr + 3;
848}
849
850static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
851{
852 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
853 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
854 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
855 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
856 *addrp = addr + 4;
857}
858
859static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
860{
861 int i;
862 for (i = 0; i < 8; i++)
863 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
864 pt1_i2c_write_bit(pt1, addr, &addr, 1);
865 *addrp = addr;
866}
867
868static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
869{
870 int i;
871 for (i = 0; i < 8; i++)
872 pt1_i2c_read_bit(pt1, addr, &addr);
873 pt1_i2c_write_bit(pt1, addr, &addr, last);
874 *addrp = addr;
875}
876
877static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
878{
879 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
880 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
881 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
882 *addrp = addr + 3;
883}
884
885static void
886pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
887{
888 int i;
889 pt1_i2c_prepare(pt1, addr, &addr);
890 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
891 for (i = 0; i < msg->len; i++)
892 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
893 *addrp = addr;
894}
895
896static void
897pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
898{
899 int i;
900 pt1_i2c_prepare(pt1, addr, &addr);
901 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
902 for (i = 0; i < msg->len; i++)
903 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
904 *addrp = addr;
905}
906
907static int pt1_i2c_end(struct pt1 *pt1, int addr)
908{
909 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
910 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
911 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
912
913 pt1_write_reg(pt1, 0, 0x00000004);
914 do {
915 if (signal_pending(current))
916 return -EINTR;
917 schedule_timeout_interruptible((HZ + 999) / 1000);
918 } while (pt1_read_reg(pt1, 0) & 0x00000080);
919 return 0;
920}
921
922static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
923{
924 int addr;
925 addr = 0;
926
927 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
928 addr = addr + 1;
929
930 if (!pt1->i2c_running) {
931 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
932 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
933 addr = addr + 2;
934 pt1->i2c_running = 1;
935 }
936 *addrp = addr;
937}
938
939static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
940{
941 struct pt1 *pt1;
942 int i;
943 struct i2c_msg *msg, *next_msg;
944 int addr, ret;
945 u16 len;
946 u32 word;
947
948 pt1 = i2c_get_adapdata(adap);
949
950 for (i = 0; i < num; i++) {
951 msg = &msgs[i];
952 if (msg->flags & I2C_M_RD)
953 return -ENOTSUPP;
954
955 if (i + 1 < num)
956 next_msg = &msgs[i + 1];
957 else
958 next_msg = NULL;
959
960 if (next_msg && next_msg->flags & I2C_M_RD) {
961 i++;
962
963 len = next_msg->len;
964 if (len > 4)
965 return -ENOTSUPP;
966
967 pt1_i2c_begin(pt1, &addr);
968 pt1_i2c_write_msg(pt1, addr, &addr, msg);
969 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
970 ret = pt1_i2c_end(pt1, addr);
971 if (ret < 0)
972 return ret;
973
974 word = pt1_read_reg(pt1, 2);
975 while (len--) {
976 next_msg->buf[len] = word;
977 word >>= 8;
978 }
979 } else {
980 pt1_i2c_begin(pt1, &addr);
981 pt1_i2c_write_msg(pt1, addr, &addr, msg);
982 ret = pt1_i2c_end(pt1, addr);
983 if (ret < 0)
984 return ret;
985 }
986 }
987
988 return num;
989}
990
991static u32 pt1_i2c_func(struct i2c_adapter *adap)
992{
993 return I2C_FUNC_I2C;
994}
995
996static const struct i2c_algorithm pt1_i2c_algo = {
997 .master_xfer = pt1_i2c_xfer,
998 .functionality = pt1_i2c_func,
999};
1000
1001static void pt1_i2c_wait(struct pt1 *pt1)
1002{
1003 int i;
1004 for (i = 0; i < 128; i++)
1005 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1006}
1007
1008static void pt1_i2c_init(struct pt1 *pt1)
1009{
1010 int i;
1011 for (i = 0; i < 1024; i++)
1012 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1013}
1014
1015static void __devexit pt1_remove(struct pci_dev *pdev)
1016{
1017 struct pt1 *pt1;
1018 void __iomem *regs;
1019
1020 pt1 = pci_get_drvdata(pdev);
1021 regs = pt1->regs;
1022
1023 kthread_stop(pt1->kthread);
1024 pt1_cleanup_tables(pt1);
1025 pt1_cleanup_frontends(pt1);
1026 pt1_disable_ram(pt1);
1027 pt1->power = 0;
1028 pt1->reset = 1;
1029 pt1_update_power(pt1);
1030 pt1_cleanup_adapters(pt1);
1031 i2c_del_adapter(&pt1->i2c_adap);
1032 pci_set_drvdata(pdev, NULL);
1033 kfree(pt1);
1034 pci_iounmap(pdev, regs);
1035 pci_release_regions(pdev);
1036 pci_disable_device(pdev);
1037}
1038
1039static int __devinit
1040pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1041{
1042 int ret;
1043 void __iomem *regs;
1044 struct pt1 *pt1;
1045 struct i2c_adapter *i2c_adap;
1046 struct task_struct *kthread;
1047
1048 ret = pci_enable_device(pdev);
1049 if (ret < 0)
1050 goto err;
1051
1052 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1053 if (ret < 0)
1054 goto err_pci_disable_device;
1055
1056 pci_set_master(pdev);
1057
1058 ret = pci_request_regions(pdev, DRIVER_NAME);
1059 if (ret < 0)
1060 goto err_pci_disable_device;
1061
1062 regs = pci_iomap(pdev, 0, 0);
1063 if (!regs) {
1064 ret = -EIO;
1065 goto err_pci_release_regions;
1066 }
1067
1068 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1069 if (!pt1) {
1070 ret = -ENOMEM;
1071 goto err_pci_iounmap;
1072 }
1073
1074 mutex_init(&pt1->lock);
1075 pt1->pdev = pdev;
1076 pt1->regs = regs;
1077 pci_set_drvdata(pdev, pt1);
1078
1079 ret = pt1_init_adapters(pt1);
1080 if (ret < 0)
1081 goto err_kfree;
1082
1083 mutex_init(&pt1->lock);
1084
1085 pt1->power = 0;
1086 pt1->reset = 1;
1087 pt1_update_power(pt1);
1088
1089 i2c_adap = &pt1->i2c_adap;
1090 i2c_adap->algo = &pt1_i2c_algo;
1091 i2c_adap->algo_data = NULL;
1092 i2c_adap->dev.parent = &pdev->dev;
1093 strcpy(i2c_adap->name, DRIVER_NAME);
1094 i2c_set_adapdata(i2c_adap, pt1);
1095 ret = i2c_add_adapter(i2c_adap);
1096 if (ret < 0)
1097 goto err_pt1_cleanup_adapters;
1098
1099 pt1_i2c_init(pt1);
1100 pt1_i2c_wait(pt1);
1101
1102 ret = pt1_sync(pt1);
1103 if (ret < 0)
1104 goto err_i2c_del_adapter;
1105
1106 pt1_identify(pt1);
1107
1108 ret = pt1_unlock(pt1);
1109 if (ret < 0)
1110 goto err_i2c_del_adapter;
1111
1112 ret = pt1_reset_pci(pt1);
1113 if (ret < 0)
1114 goto err_i2c_del_adapter;
1115
1116 ret = pt1_reset_ram(pt1);
1117 if (ret < 0)
1118 goto err_i2c_del_adapter;
1119
1120 ret = pt1_enable_ram(pt1);
1121 if (ret < 0)
1122 goto err_i2c_del_adapter;
1123
1124 pt1_init_streams(pt1);
1125
1126 pt1->power = 1;
1127 pt1_update_power(pt1);
1128 schedule_timeout_uninterruptible((HZ + 49) / 50);
1129
1130 pt1->reset = 0;
1131 pt1_update_power(pt1);
1132 schedule_timeout_uninterruptible((HZ + 999) / 1000);
1133
1134 ret = pt1_init_frontends(pt1);
1135 if (ret < 0)
1136 goto err_pt1_disable_ram;
1137
1138 ret = pt1_init_tables(pt1);
1139 if (ret < 0)
1140 goto err_pt1_cleanup_frontends;
1141
1142 kthread = kthread_run(pt1_thread, pt1, "pt1");
1143 if (IS_ERR(kthread)) {
1144 ret = PTR_ERR(kthread);
1145 goto err_pt1_cleanup_tables;
1146 }
1147
1148 pt1->kthread = kthread;
1149 return 0;
1150
1151err_pt1_cleanup_tables:
1152 pt1_cleanup_tables(pt1);
1153err_pt1_cleanup_frontends:
1154 pt1_cleanup_frontends(pt1);
1155err_pt1_disable_ram:
1156 pt1_disable_ram(pt1);
1157 pt1->power = 0;
1158 pt1->reset = 1;
1159 pt1_update_power(pt1);
1160err_i2c_del_adapter:
1161 i2c_del_adapter(i2c_adap);
1162err_pt1_cleanup_adapters:
1163 pt1_cleanup_adapters(pt1);
1164err_kfree:
1165 pci_set_drvdata(pdev, NULL);
1166 kfree(pt1);
1167err_pci_iounmap:
1168 pci_iounmap(pdev, regs);
1169err_pci_release_regions:
1170 pci_release_regions(pdev);
1171err_pci_disable_device:
1172 pci_disable_device(pdev);
1173err:
1174 return ret;
1175
1176}
1177
1178static struct pci_device_id pt1_id_table[] = {
1179 { PCI_DEVICE(0x10ee, 0x211a) },
1180 { PCI_DEVICE(0x10ee, 0x222a) },
1181 { },
1182};
1183MODULE_DEVICE_TABLE(pci, pt1_id_table);
1184
1185static struct pci_driver pt1_driver = {
1186 .name = DRIVER_NAME,
1187 .probe = pt1_probe,
1188 .remove = __devexit_p(pt1_remove),
1189 .id_table = pt1_id_table,
1190};
1191
1192
1193static int __init pt1_init(void)
1194{
1195 return pci_register_driver(&pt1_driver);
1196}
1197
1198
1199static void __exit pt1_cleanup(void)
1200{
1201 pci_unregister_driver(&pt1_driver);
1202}
1203
1204module_init(pt1_init);
1205module_exit(pt1_cleanup);
1206
1207MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1208MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1209MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/pt1/va1j5jf8007s.c b/drivers/media/dvb/pt1/va1j5jf8007s.c
new file mode 100644
index 00000000000..451641c0c1d
--- /dev/null
+++ b/drivers/media/dvb/pt1/va1j5jf8007s.c
@@ -0,0 +1,735 @@
1/*
2 * ISDB-S driver for VA1J5JF8007/VA1J5JF8011
3 *
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
5 *
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/slab.h>
27#include <linux/i2c.h>
28#include "dvb_frontend.h"
29#include "va1j5jf8007s.h"
30
31enum va1j5jf8007s_tune_state {
32 VA1J5JF8007S_IDLE,
33 VA1J5JF8007S_SET_FREQUENCY_1,
34 VA1J5JF8007S_SET_FREQUENCY_2,
35 VA1J5JF8007S_SET_FREQUENCY_3,
36 VA1J5JF8007S_CHECK_FREQUENCY,
37 VA1J5JF8007S_SET_MODULATION,
38 VA1J5JF8007S_CHECK_MODULATION,
39 VA1J5JF8007S_SET_TS_ID,
40 VA1J5JF8007S_CHECK_TS_ID,
41 VA1J5JF8007S_TRACK,
42};
43
44struct va1j5jf8007s_state {
45 const struct va1j5jf8007s_config *config;
46 struct i2c_adapter *adap;
47 struct dvb_frontend fe;
48 enum va1j5jf8007s_tune_state tune_state;
49};
50
51static int va1j5jf8007s_read_snr(struct dvb_frontend *fe, u16 *snr)
52{
53 struct va1j5jf8007s_state *state;
54 u8 addr;
55 int i;
56 u8 write_buf[1], read_buf[1];
57 struct i2c_msg msgs[2];
58 s32 word, x1, x2, x3, x4, x5, y;
59
60 state = fe->demodulator_priv;
61 addr = state->config->demod_address;
62
63 word = 0;
64 for (i = 0; i < 2; i++) {
65 write_buf[0] = 0xbc + i;
66
67 msgs[0].addr = addr;
68 msgs[0].flags = 0;
69 msgs[0].len = sizeof(write_buf);
70 msgs[0].buf = write_buf;
71
72 msgs[1].addr = addr;
73 msgs[1].flags = I2C_M_RD;
74 msgs[1].len = sizeof(read_buf);
75 msgs[1].buf = read_buf;
76
77 if (i2c_transfer(state->adap, msgs, 2) != 2)
78 return -EREMOTEIO;
79
80 word <<= 8;
81 word |= read_buf[0];
82 }
83
84 word -= 3000;
85 if (word < 0)
86 word = 0;
87
88 x1 = int_sqrt(word << 16) * ((15625ll << 21) / 1000000);
89 x2 = (s64)x1 * x1 >> 31;
90 x3 = (s64)x2 * x1 >> 31;
91 x4 = (s64)x2 * x2 >> 31;
92 x5 = (s64)x4 * x1 >> 31;
93
94 y = (58857ll << 23) / 1000;
95 y -= (s64)x1 * ((89565ll << 24) / 1000) >> 30;
96 y += (s64)x2 * ((88977ll << 24) / 1000) >> 28;
97 y -= (s64)x3 * ((50259ll << 25) / 1000) >> 27;
98 y += (s64)x4 * ((14341ll << 27) / 1000) >> 27;
99 y -= (s64)x5 * ((16346ll << 30) / 10000) >> 28;
100
101 *snr = y < 0 ? 0 : y >> 15;
102 return 0;
103}
104
105static int va1j5jf8007s_get_frontend_algo(struct dvb_frontend *fe)
106{
107 return DVBFE_ALGO_HW;
108}
109
110static int
111va1j5jf8007s_read_status(struct dvb_frontend *fe, fe_status_t *status)
112{
113 struct va1j5jf8007s_state *state;
114
115 state = fe->demodulator_priv;
116
117 switch (state->tune_state) {
118 case VA1J5JF8007S_IDLE:
119 case VA1J5JF8007S_SET_FREQUENCY_1:
120 case VA1J5JF8007S_SET_FREQUENCY_2:
121 case VA1J5JF8007S_SET_FREQUENCY_3:
122 case VA1J5JF8007S_CHECK_FREQUENCY:
123 *status = 0;
124 return 0;
125
126
127 case VA1J5JF8007S_SET_MODULATION:
128 case VA1J5JF8007S_CHECK_MODULATION:
129 *status |= FE_HAS_SIGNAL;
130 return 0;
131
132 case VA1J5JF8007S_SET_TS_ID:
133 case VA1J5JF8007S_CHECK_TS_ID:
134 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
135 return 0;
136
137 case VA1J5JF8007S_TRACK:
138 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
139 return 0;
140 }
141
142 BUG();
143}
144
145struct va1j5jf8007s_cb_map {
146 u32 frequency;
147 u8 cb;
148};
149
150static const struct va1j5jf8007s_cb_map va1j5jf8007s_cb_maps[] = {
151 { 986000, 0xb2 },
152 { 1072000, 0xd2 },
153 { 1154000, 0xe2 },
154 { 1291000, 0x20 },
155 { 1447000, 0x40 },
156 { 1615000, 0x60 },
157 { 1791000, 0x80 },
158 { 1972000, 0xa0 },
159};
160
161static u8 va1j5jf8007s_lookup_cb(u32 frequency)
162{
163 int i;
164 const struct va1j5jf8007s_cb_map *map;
165
166 for (i = 0; i < ARRAY_SIZE(va1j5jf8007s_cb_maps); i++) {
167 map = &va1j5jf8007s_cb_maps[i];
168 if (frequency < map->frequency)
169 return map->cb;
170 }
171 return 0xc0;
172}
173
174static int va1j5jf8007s_set_frequency_1(struct va1j5jf8007s_state *state)
175{
176 u32 frequency;
177 u16 word;
178 u8 buf[6];
179 struct i2c_msg msg;
180
181 frequency = state->fe.dtv_property_cache.frequency;
182
183 word = (frequency + 500) / 1000;
184 if (frequency < 1072000)
185 word = (word << 1 & ~0x1f) | (word & 0x0f);
186
187 buf[0] = 0xfe;
188 buf[1] = 0xc0;
189 buf[2] = 0x40 | word >> 8;
190 buf[3] = word;
191 buf[4] = 0xe0;
192 buf[5] = va1j5jf8007s_lookup_cb(frequency);
193
194 msg.addr = state->config->demod_address;
195 msg.flags = 0;
196 msg.len = sizeof(buf);
197 msg.buf = buf;
198
199 if (i2c_transfer(state->adap, &msg, 1) != 1)
200 return -EREMOTEIO;
201
202 return 0;
203}
204
205static int va1j5jf8007s_set_frequency_2(struct va1j5jf8007s_state *state)
206{
207 u8 buf[3];
208 struct i2c_msg msg;
209
210 buf[0] = 0xfe;
211 buf[1] = 0xc0;
212 buf[2] = 0xe4;
213
214 msg.addr = state->config->demod_address;
215 msg.flags = 0;
216 msg.len = sizeof(buf);
217 msg.buf = buf;
218
219 if (i2c_transfer(state->adap, &msg, 1) != 1)
220 return -EREMOTEIO;
221
222 return 0;
223}
224
225static int va1j5jf8007s_set_frequency_3(struct va1j5jf8007s_state *state)
226{
227 u32 frequency;
228 u8 buf[4];
229 struct i2c_msg msg;
230
231 frequency = state->fe.dtv_property_cache.frequency;
232
233 buf[0] = 0xfe;
234 buf[1] = 0xc0;
235 buf[2] = 0xf4;
236 buf[3] = va1j5jf8007s_lookup_cb(frequency) | 0x4;
237
238 msg.addr = state->config->demod_address;
239 msg.flags = 0;
240 msg.len = sizeof(buf);
241 msg.buf = buf;
242
243 if (i2c_transfer(state->adap, &msg, 1) != 1)
244 return -EREMOTEIO;
245
246 return 0;
247}
248
249static int
250va1j5jf8007s_check_frequency(struct va1j5jf8007s_state *state, int *lock)
251{
252 u8 addr;
253 u8 write_buf[2], read_buf[1];
254 struct i2c_msg msgs[2];
255
256 addr = state->config->demod_address;
257
258 write_buf[0] = 0xfe;
259 write_buf[1] = 0xc1;
260
261 msgs[0].addr = addr;
262 msgs[0].flags = 0;
263 msgs[0].len = sizeof(write_buf);
264 msgs[0].buf = write_buf;
265
266 msgs[1].addr = addr;
267 msgs[1].flags = I2C_M_RD;
268 msgs[1].len = sizeof(read_buf);
269 msgs[1].buf = read_buf;
270
271 if (i2c_transfer(state->adap, msgs, 2) != 2)
272 return -EREMOTEIO;
273
274 *lock = read_buf[0] & 0x40;
275 return 0;
276}
277
278static int va1j5jf8007s_set_modulation(struct va1j5jf8007s_state *state)
279{
280 u8 buf[2];
281 struct i2c_msg msg;
282
283 buf[0] = 0x03;
284 buf[1] = 0x01;
285
286 msg.addr = state->config->demod_address;
287 msg.flags = 0;
288 msg.len = sizeof(buf);
289 msg.buf = buf;
290
291 if (i2c_transfer(state->adap, &msg, 1) != 1)
292 return -EREMOTEIO;
293
294 return 0;
295}
296
297static int
298va1j5jf8007s_check_modulation(struct va1j5jf8007s_state *state, int *lock)
299{
300 u8 addr;
301 u8 write_buf[1], read_buf[1];
302 struct i2c_msg msgs[2];
303
304 addr = state->config->demod_address;
305
306 write_buf[0] = 0xc3;
307
308 msgs[0].addr = addr;
309 msgs[0].flags = 0;
310 msgs[0].len = sizeof(write_buf);
311 msgs[0].buf = write_buf;
312
313 msgs[1].addr = addr;
314 msgs[1].flags = I2C_M_RD;
315 msgs[1].len = sizeof(read_buf);
316 msgs[1].buf = read_buf;
317
318 if (i2c_transfer(state->adap, msgs, 2) != 2)
319 return -EREMOTEIO;
320
321 *lock = !(read_buf[0] & 0x10);
322 return 0;
323}
324
325static int
326va1j5jf8007s_set_ts_id(struct va1j5jf8007s_state *state)
327{
328 u32 ts_id;
329 u8 buf[3];
330 struct i2c_msg msg;
331
332 ts_id = state->fe.dtv_property_cache.isdbs_ts_id;
333 if (!ts_id)
334 return 0;
335
336 buf[0] = 0x8f;
337 buf[1] = ts_id >> 8;
338 buf[2] = ts_id;
339
340 msg.addr = state->config->demod_address;
341 msg.flags = 0;
342 msg.len = sizeof(buf);
343 msg.buf = buf;
344
345 if (i2c_transfer(state->adap, &msg, 1) != 1)
346 return -EREMOTEIO;
347
348 return 0;
349}
350
351static int
352va1j5jf8007s_check_ts_id(struct va1j5jf8007s_state *state, int *lock)
353{
354 u8 addr;
355 u8 write_buf[1], read_buf[2];
356 struct i2c_msg msgs[2];
357 u32 ts_id;
358
359 ts_id = state->fe.dtv_property_cache.isdbs_ts_id;
360 if (!ts_id) {
361 *lock = 1;
362 return 0;
363 }
364
365 addr = state->config->demod_address;
366
367 write_buf[0] = 0xe6;
368
369 msgs[0].addr = addr;
370 msgs[0].flags = 0;
371 msgs[0].len = sizeof(write_buf);
372 msgs[0].buf = write_buf;
373
374 msgs[1].addr = addr;
375 msgs[1].flags = I2C_M_RD;
376 msgs[1].len = sizeof(read_buf);
377 msgs[1].buf = read_buf;
378
379 if (i2c_transfer(state->adap, msgs, 2) != 2)
380 return -EREMOTEIO;
381
382 *lock = (read_buf[0] << 8 | read_buf[1]) == ts_id;
383 return 0;
384}
385
386static int
387va1j5jf8007s_tune(struct dvb_frontend *fe,
388 struct dvb_frontend_parameters *params,
389 unsigned int mode_flags, unsigned int *delay,
390 fe_status_t *status)
391{
392 struct va1j5jf8007s_state *state;
393 int ret;
394 int lock = 0;
395
396 state = fe->demodulator_priv;
397
398 if (params != NULL)
399 state->tune_state = VA1J5JF8007S_SET_FREQUENCY_1;
400
401 switch (state->tune_state) {
402 case VA1J5JF8007S_IDLE:
403 *delay = 3 * HZ;
404 *status = 0;
405 return 0;
406
407 case VA1J5JF8007S_SET_FREQUENCY_1:
408 ret = va1j5jf8007s_set_frequency_1(state);
409 if (ret < 0)
410 return ret;
411
412 state->tune_state = VA1J5JF8007S_SET_FREQUENCY_2;
413 *delay = 0;
414 *status = 0;
415 return 0;
416
417 case VA1J5JF8007S_SET_FREQUENCY_2:
418 ret = va1j5jf8007s_set_frequency_2(state);
419 if (ret < 0)
420 return ret;
421
422 state->tune_state = VA1J5JF8007S_SET_FREQUENCY_3;
423 *delay = (HZ + 99) / 100;
424 *status = 0;
425 return 0;
426
427 case VA1J5JF8007S_SET_FREQUENCY_3:
428 ret = va1j5jf8007s_set_frequency_3(state);
429 if (ret < 0)
430 return ret;
431
432 state->tune_state = VA1J5JF8007S_CHECK_FREQUENCY;
433 *delay = 0;
434 *status = 0;
435 return 0;
436
437 case VA1J5JF8007S_CHECK_FREQUENCY:
438 ret = va1j5jf8007s_check_frequency(state, &lock);
439 if (ret < 0)
440 return ret;
441
442 if (!lock) {
443 *delay = (HZ + 999) / 1000;
444 *status = 0;
445 return 0;
446 }
447
448 state->tune_state = VA1J5JF8007S_SET_MODULATION;
449 *delay = 0;
450 *status = FE_HAS_SIGNAL;
451 return 0;
452
453 case VA1J5JF8007S_SET_MODULATION:
454 ret = va1j5jf8007s_set_modulation(state);
455 if (ret < 0)
456 return ret;
457
458 state->tune_state = VA1J5JF8007S_CHECK_MODULATION;
459 *delay = 0;
460 *status = FE_HAS_SIGNAL;
461 return 0;
462
463 case VA1J5JF8007S_CHECK_MODULATION:
464 ret = va1j5jf8007s_check_modulation(state, &lock);
465 if (ret < 0)
466 return ret;
467
468 if (!lock) {
469 *delay = (HZ + 49) / 50;
470 *status = FE_HAS_SIGNAL;
471 return 0;
472 }
473
474 state->tune_state = VA1J5JF8007S_SET_TS_ID;
475 *delay = 0;
476 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
477 return 0;
478
479 case VA1J5JF8007S_SET_TS_ID:
480 ret = va1j5jf8007s_set_ts_id(state);
481 if (ret < 0)
482 return ret;
483
484 state->tune_state = VA1J5JF8007S_CHECK_TS_ID;
485 return 0;
486
487 case VA1J5JF8007S_CHECK_TS_ID:
488 ret = va1j5jf8007s_check_ts_id(state, &lock);
489 if (ret < 0)
490 return ret;
491
492 if (!lock) {
493 *delay = (HZ + 99) / 100;
494 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
495 return 0;
496 }
497
498 state->tune_state = VA1J5JF8007S_TRACK;
499 /* fall through */
500
501 case VA1J5JF8007S_TRACK:
502 *delay = 3 * HZ;
503 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
504 return 0;
505 }
506
507 BUG();
508}
509
510static int va1j5jf8007s_init_frequency(struct va1j5jf8007s_state *state)
511{
512 u8 buf[4];
513 struct i2c_msg msg;
514
515 buf[0] = 0xfe;
516 buf[1] = 0xc0;
517 buf[2] = 0xf0;
518 buf[3] = 0x04;
519
520 msg.addr = state->config->demod_address;
521 msg.flags = 0;
522 msg.len = sizeof(buf);
523 msg.buf = buf;
524
525 if (i2c_transfer(state->adap, &msg, 1) != 1)
526 return -EREMOTEIO;
527
528 return 0;
529}
530
531static int va1j5jf8007s_set_sleep(struct va1j5jf8007s_state *state, int sleep)
532{
533 u8 buf[2];
534 struct i2c_msg msg;
535
536 buf[0] = 0x17;
537 buf[1] = sleep ? 0x01 : 0x00;
538
539 msg.addr = state->config->demod_address;
540 msg.flags = 0;
541 msg.len = sizeof(buf);
542 msg.buf = buf;
543
544 if (i2c_transfer(state->adap, &msg, 1) != 1)
545 return -EREMOTEIO;
546
547 return 0;
548}
549
550static int va1j5jf8007s_sleep(struct dvb_frontend *fe)
551{
552 struct va1j5jf8007s_state *state;
553 int ret;
554
555 state = fe->demodulator_priv;
556
557 ret = va1j5jf8007s_init_frequency(state);
558 if (ret < 0)
559 return ret;
560
561 return va1j5jf8007s_set_sleep(state, 1);
562}
563
564static int va1j5jf8007s_init(struct dvb_frontend *fe)
565{
566 struct va1j5jf8007s_state *state;
567
568 state = fe->demodulator_priv;
569 state->tune_state = VA1J5JF8007S_IDLE;
570
571 return va1j5jf8007s_set_sleep(state, 0);
572}
573
574static void va1j5jf8007s_release(struct dvb_frontend *fe)
575{
576 struct va1j5jf8007s_state *state;
577 state = fe->demodulator_priv;
578 kfree(state);
579}
580
581static struct dvb_frontend_ops va1j5jf8007s_ops = {
582 .info = {
583 .name = "VA1J5JF8007/VA1J5JF8011 ISDB-S",
584 .type = FE_QPSK,
585 .frequency_min = 950000,
586 .frequency_max = 2150000,
587 .frequency_stepsize = 1000,
588 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_FEC_AUTO |
589 FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
590 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO,
591 },
592
593 .read_snr = va1j5jf8007s_read_snr,
594 .get_frontend_algo = va1j5jf8007s_get_frontend_algo,
595 .read_status = va1j5jf8007s_read_status,
596 .tune = va1j5jf8007s_tune,
597 .sleep = va1j5jf8007s_sleep,
598 .init = va1j5jf8007s_init,
599 .release = va1j5jf8007s_release,
600};
601
602static int va1j5jf8007s_prepare_1(struct va1j5jf8007s_state *state)
603{
604 u8 addr;
605 u8 write_buf[1], read_buf[1];
606 struct i2c_msg msgs[2];
607
608 addr = state->config->demod_address;
609
610 write_buf[0] = 0x07;
611
612 msgs[0].addr = addr;
613 msgs[0].flags = 0;
614 msgs[0].len = sizeof(write_buf);
615 msgs[0].buf = write_buf;
616
617 msgs[1].addr = addr;
618 msgs[1].flags = I2C_M_RD;
619 msgs[1].len = sizeof(read_buf);
620 msgs[1].buf = read_buf;
621
622 if (i2c_transfer(state->adap, msgs, 2) != 2)
623 return -EREMOTEIO;
624
625 if (read_buf[0] != 0x41)
626 return -EIO;
627
628 return 0;
629}
630
631static const u8 va1j5jf8007s_20mhz_prepare_bufs[][2] = {
632 {0x04, 0x02}, {0x0d, 0x55}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01},
633 {0x1c, 0x0a}, {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0},
634 {0x52, 0x89}, {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69},
635 {0x87, 0x04}, {0x8e, 0x02}, {0xa3, 0xf7}, {0xa5, 0xc0},
636};
637
638static const u8 va1j5jf8007s_25mhz_prepare_bufs[][2] = {
639 {0x04, 0x02}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01}, {0x1c, 0x0a},
640 {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0}, {0x52, 0x89},
641 {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69}, {0x87, 0x04},
642 {0x8e, 0x26}, {0xa3, 0xf7}, {0xa5, 0xc0},
643};
644
645static int va1j5jf8007s_prepare_2(struct va1j5jf8007s_state *state)
646{
647 const u8 (*bufs)[2];
648 int size;
649 u8 addr;
650 u8 buf[2];
651 struct i2c_msg msg;
652 int i;
653
654 switch (state->config->frequency) {
655 case VA1J5JF8007S_20MHZ:
656 bufs = va1j5jf8007s_20mhz_prepare_bufs;
657 size = ARRAY_SIZE(va1j5jf8007s_20mhz_prepare_bufs);
658 break;
659 case VA1J5JF8007S_25MHZ:
660 bufs = va1j5jf8007s_25mhz_prepare_bufs;
661 size = ARRAY_SIZE(va1j5jf8007s_25mhz_prepare_bufs);
662 break;
663 default:
664 return -EINVAL;
665 }
666
667 addr = state->config->demod_address;
668
669 msg.addr = addr;
670 msg.flags = 0;
671 msg.len = 2;
672 msg.buf = buf;
673 for (i = 0; i < size; i++) {
674 memcpy(buf, bufs[i], sizeof(buf));
675 if (i2c_transfer(state->adap, &msg, 1) != 1)
676 return -EREMOTEIO;
677 }
678
679 return 0;
680}
681
682/* must be called after va1j5jf8007t_attach */
683int va1j5jf8007s_prepare(struct dvb_frontend *fe)
684{
685 struct va1j5jf8007s_state *state;
686 int ret;
687
688 state = fe->demodulator_priv;
689
690 ret = va1j5jf8007s_prepare_1(state);
691 if (ret < 0)
692 return ret;
693
694 ret = va1j5jf8007s_prepare_2(state);
695 if (ret < 0)
696 return ret;
697
698 return va1j5jf8007s_init_frequency(state);
699}
700
701struct dvb_frontend *
702va1j5jf8007s_attach(const struct va1j5jf8007s_config *config,
703 struct i2c_adapter *adap)
704{
705 struct va1j5jf8007s_state *state;
706 struct dvb_frontend *fe;
707 u8 buf[2];
708 struct i2c_msg msg;
709
710 state = kzalloc(sizeof(struct va1j5jf8007s_state), GFP_KERNEL);
711 if (!state)
712 return NULL;
713
714 state->config = config;
715 state->adap = adap;
716
717 fe = &state->fe;
718 memcpy(&fe->ops, &va1j5jf8007s_ops, sizeof(struct dvb_frontend_ops));
719 fe->demodulator_priv = state;
720
721 buf[0] = 0x01;
722 buf[1] = 0x80;
723
724 msg.addr = state->config->demod_address;
725 msg.flags = 0;
726 msg.len = sizeof(buf);
727 msg.buf = buf;
728
729 if (i2c_transfer(state->adap, &msg, 1) != 1) {
730 kfree(state);
731 return NULL;
732 }
733
734 return fe;
735}
diff --git a/drivers/media/dvb/pt1/va1j5jf8007s.h b/drivers/media/dvb/pt1/va1j5jf8007s.h
new file mode 100644
index 00000000000..b7d6f05a0e0
--- /dev/null
+++ b/drivers/media/dvb/pt1/va1j5jf8007s.h
@@ -0,0 +1,46 @@
1/*
2 * ISDB-S driver for VA1J5JF8007/VA1J5JF8011
3 *
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
5 *
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#ifndef VA1J5JF8007S_H
25#define VA1J5JF8007S_H
26
27enum va1j5jf8007s_frequency {
28 VA1J5JF8007S_20MHZ,
29 VA1J5JF8007S_25MHZ,
30};
31
32struct va1j5jf8007s_config {
33 u8 demod_address;
34 enum va1j5jf8007s_frequency frequency;
35};
36
37struct i2c_adapter;
38
39struct dvb_frontend *
40va1j5jf8007s_attach(const struct va1j5jf8007s_config *config,
41 struct i2c_adapter *adap);
42
43/* must be called after va1j5jf8007t_attach */
44int va1j5jf8007s_prepare(struct dvb_frontend *fe);
45
46#endif
diff --git a/drivers/media/dvb/pt1/va1j5jf8007t.c b/drivers/media/dvb/pt1/va1j5jf8007t.c
new file mode 100644
index 00000000000..0f085c3e571
--- /dev/null
+++ b/drivers/media/dvb/pt1/va1j5jf8007t.c
@@ -0,0 +1,536 @@
1/*
2 * ISDB-T driver for VA1J5JF8007/VA1J5JF8011
3 *
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
5 *
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/slab.h>
27#include <linux/i2c.h>
28#include "dvb_frontend.h"
29#include "dvb_math.h"
30#include "va1j5jf8007t.h"
31
32enum va1j5jf8007t_tune_state {
33 VA1J5JF8007T_IDLE,
34 VA1J5JF8007T_SET_FREQUENCY,
35 VA1J5JF8007T_CHECK_FREQUENCY,
36 VA1J5JF8007T_SET_MODULATION,
37 VA1J5JF8007T_CHECK_MODULATION,
38 VA1J5JF8007T_TRACK,
39 VA1J5JF8007T_ABORT,
40};
41
42struct va1j5jf8007t_state {
43 const struct va1j5jf8007t_config *config;
44 struct i2c_adapter *adap;
45 struct dvb_frontend fe;
46 enum va1j5jf8007t_tune_state tune_state;
47};
48
49static int va1j5jf8007t_read_snr(struct dvb_frontend *fe, u16 *snr)
50{
51 struct va1j5jf8007t_state *state;
52 u8 addr;
53 int i;
54 u8 write_buf[1], read_buf[1];
55 struct i2c_msg msgs[2];
56 s32 word, x, y;
57
58 state = fe->demodulator_priv;
59 addr = state->config->demod_address;
60
61 word = 0;
62 for (i = 0; i < 3; i++) {
63 write_buf[0] = 0x8b + i;
64
65 msgs[0].addr = addr;
66 msgs[0].flags = 0;
67 msgs[0].len = sizeof(write_buf);
68 msgs[0].buf = write_buf;
69
70 msgs[1].addr = addr;
71 msgs[1].flags = I2C_M_RD;
72 msgs[1].len = sizeof(read_buf);
73 msgs[1].buf = read_buf;
74
75 if (i2c_transfer(state->adap, msgs, 2) != 2)
76 return -EREMOTEIO;
77
78 word <<= 8;
79 word |= read_buf[0];
80 }
81
82 if (!word)
83 return -EIO;
84
85 x = 10 * (intlog10(0x540000 * 100 / word) - (2 << 24));
86 y = (24ll << 46) / 1000000;
87 y = ((s64)y * x >> 30) - (16ll << 40) / 10000;
88 y = ((s64)y * x >> 29) + (398ll << 35) / 10000;
89 y = ((s64)y * x >> 30) + (5491ll << 29) / 10000;
90 y = ((s64)y * x >> 30) + (30965ll << 23) / 10000;
91 *snr = y >> 15;
92 return 0;
93}
94
95static int va1j5jf8007t_get_frontend_algo(struct dvb_frontend *fe)
96{
97 return DVBFE_ALGO_HW;
98}
99
100static int
101va1j5jf8007t_read_status(struct dvb_frontend *fe, fe_status_t *status)
102{
103 struct va1j5jf8007t_state *state;
104
105 state = fe->demodulator_priv;
106
107 switch (state->tune_state) {
108 case VA1J5JF8007T_IDLE:
109 case VA1J5JF8007T_SET_FREQUENCY:
110 case VA1J5JF8007T_CHECK_FREQUENCY:
111 *status = 0;
112 return 0;
113
114
115 case VA1J5JF8007T_SET_MODULATION:
116 case VA1J5JF8007T_CHECK_MODULATION:
117 case VA1J5JF8007T_ABORT:
118 *status |= FE_HAS_SIGNAL;
119 return 0;
120
121 case VA1J5JF8007T_TRACK:
122 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
123 return 0;
124 }
125
126 BUG();
127}
128
129struct va1j5jf8007t_cb_map {
130 u32 frequency;
131 u8 cb;
132};
133
134static const struct va1j5jf8007t_cb_map va1j5jf8007t_cb_maps[] = {
135 { 90000000, 0x80 },
136 { 140000000, 0x81 },
137 { 170000000, 0xa1 },
138 { 220000000, 0x62 },
139 { 330000000, 0xa2 },
140 { 402000000, 0xe2 },
141 { 450000000, 0x64 },
142 { 550000000, 0x84 },
143 { 600000000, 0xa4 },
144 { 700000000, 0xc4 },
145};
146
147static u8 va1j5jf8007t_lookup_cb(u32 frequency)
148{
149 int i;
150 const struct va1j5jf8007t_cb_map *map;
151
152 for (i = 0; i < ARRAY_SIZE(va1j5jf8007t_cb_maps); i++) {
153 map = &va1j5jf8007t_cb_maps[i];
154 if (frequency < map->frequency)
155 return map->cb;
156 }
157 return 0xe4;
158}
159
160static int va1j5jf8007t_set_frequency(struct va1j5jf8007t_state *state)
161{
162 u32 frequency;
163 u16 word;
164 u8 buf[6];
165 struct i2c_msg msg;
166
167 frequency = state->fe.dtv_property_cache.frequency;
168
169 word = (frequency + 71428) / 142857 + 399;
170 buf[0] = 0xfe;
171 buf[1] = 0xc2;
172 buf[2] = word >> 8;
173 buf[3] = word;
174 buf[4] = 0x80;
175 buf[5] = va1j5jf8007t_lookup_cb(frequency);
176
177 msg.addr = state->config->demod_address;
178 msg.flags = 0;
179 msg.len = sizeof(buf);
180 msg.buf = buf;
181
182 if (i2c_transfer(state->adap, &msg, 1) != 1)
183 return -EREMOTEIO;
184
185 return 0;
186}
187
188static int
189va1j5jf8007t_check_frequency(struct va1j5jf8007t_state *state, int *lock)
190{
191 u8 addr;
192 u8 write_buf[2], read_buf[1];
193 struct i2c_msg msgs[2];
194
195 addr = state->config->demod_address;
196
197 write_buf[0] = 0xfe;
198 write_buf[1] = 0xc3;
199
200 msgs[0].addr = addr;
201 msgs[0].flags = 0;
202 msgs[0].len = sizeof(write_buf);
203 msgs[0].buf = write_buf;
204
205 msgs[1].addr = addr;
206 msgs[1].flags = I2C_M_RD;
207 msgs[1].len = sizeof(read_buf);
208 msgs[1].buf = read_buf;
209
210 if (i2c_transfer(state->adap, msgs, 2) != 2)
211 return -EREMOTEIO;
212
213 *lock = read_buf[0] & 0x40;
214 return 0;
215}
216
217static int va1j5jf8007t_set_modulation(struct va1j5jf8007t_state *state)
218{
219 u8 buf[2];
220 struct i2c_msg msg;
221
222 buf[0] = 0x01;
223 buf[1] = 0x40;
224
225 msg.addr = state->config->demod_address;
226 msg.flags = 0;
227 msg.len = sizeof(buf);
228 msg.buf = buf;
229
230 if (i2c_transfer(state->adap, &msg, 1) != 1)
231 return -EREMOTEIO;
232
233 return 0;
234}
235
236static int va1j5jf8007t_check_modulation(struct va1j5jf8007t_state *state,
237 int *lock, int *retry)
238{
239 u8 addr;
240 u8 write_buf[1], read_buf[1];
241 struct i2c_msg msgs[2];
242
243 addr = state->config->demod_address;
244
245 write_buf[0] = 0x80;
246
247 msgs[0].addr = addr;
248 msgs[0].flags = 0;
249 msgs[0].len = sizeof(write_buf);
250 msgs[0].buf = write_buf;
251
252 msgs[1].addr = addr;
253 msgs[1].flags = I2C_M_RD;
254 msgs[1].len = sizeof(read_buf);
255 msgs[1].buf = read_buf;
256
257 if (i2c_transfer(state->adap, msgs, 2) != 2)
258 return -EREMOTEIO;
259
260 *lock = !(read_buf[0] & 0x10);
261 *retry = read_buf[0] & 0x80;
262 return 0;
263}
264
265static int
266va1j5jf8007t_tune(struct dvb_frontend *fe,
267 struct dvb_frontend_parameters *params,
268 unsigned int mode_flags, unsigned int *delay,
269 fe_status_t *status)
270{
271 struct va1j5jf8007t_state *state;
272 int ret;
273 int lock = 0, retry = 0;
274
275 state = fe->demodulator_priv;
276
277 if (params != NULL)
278 state->tune_state = VA1J5JF8007T_SET_FREQUENCY;
279
280 switch (state->tune_state) {
281 case VA1J5JF8007T_IDLE:
282 *delay = 3 * HZ;
283 *status = 0;
284 return 0;
285
286 case VA1J5JF8007T_SET_FREQUENCY:
287 ret = va1j5jf8007t_set_frequency(state);
288 if (ret < 0)
289 return ret;
290
291 state->tune_state = VA1J5JF8007T_CHECK_FREQUENCY;
292 *delay = 0;
293 *status = 0;
294 return 0;
295
296 case VA1J5JF8007T_CHECK_FREQUENCY:
297 ret = va1j5jf8007t_check_frequency(state, &lock);
298 if (ret < 0)
299 return ret;
300
301 if (!lock) {
302 *delay = (HZ + 999) / 1000;
303 *status = 0;
304 return 0;
305 }
306
307 state->tune_state = VA1J5JF8007T_SET_MODULATION;
308 *delay = 0;
309 *status = FE_HAS_SIGNAL;
310 return 0;
311
312 case VA1J5JF8007T_SET_MODULATION:
313 ret = va1j5jf8007t_set_modulation(state);
314 if (ret < 0)
315 return ret;
316
317 state->tune_state = VA1J5JF8007T_CHECK_MODULATION;
318 *delay = 0;
319 *status = FE_HAS_SIGNAL;
320 return 0;
321
322 case VA1J5JF8007T_CHECK_MODULATION:
323 ret = va1j5jf8007t_check_modulation(state, &lock, &retry);
324 if (ret < 0)
325 return ret;
326
327 if (!lock) {
328 if (!retry) {
329 state->tune_state = VA1J5JF8007T_ABORT;
330 *delay = 3 * HZ;
331 *status = FE_HAS_SIGNAL;
332 return 0;
333 }
334 *delay = (HZ + 999) / 1000;
335 *status = FE_HAS_SIGNAL;
336 return 0;
337 }
338
339 state->tune_state = VA1J5JF8007T_TRACK;
340 /* fall through */
341
342 case VA1J5JF8007T_TRACK:
343 *delay = 3 * HZ;
344 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
345 return 0;
346
347 case VA1J5JF8007T_ABORT:
348 *delay = 3 * HZ;
349 *status = FE_HAS_SIGNAL;
350 return 0;
351 }
352
353 BUG();
354}
355
356static int va1j5jf8007t_init_frequency(struct va1j5jf8007t_state *state)
357{
358 u8 buf[7];
359 struct i2c_msg msg;
360
361 buf[0] = 0xfe;
362 buf[1] = 0xc2;
363 buf[2] = 0x01;
364 buf[3] = 0x8f;
365 buf[4] = 0xc1;
366 buf[5] = 0x80;
367 buf[6] = 0x80;
368
369 msg.addr = state->config->demod_address;
370 msg.flags = 0;
371 msg.len = sizeof(buf);
372 msg.buf = buf;
373
374 if (i2c_transfer(state->adap, &msg, 1) != 1)
375 return -EREMOTEIO;
376
377 return 0;
378}
379
380static int va1j5jf8007t_set_sleep(struct va1j5jf8007t_state *state, int sleep)
381{
382 u8 buf[2];
383 struct i2c_msg msg;
384
385 buf[0] = 0x03;
386 buf[1] = sleep ? 0x90 : 0x80;
387
388 msg.addr = state->config->demod_address;
389 msg.flags = 0;
390 msg.len = sizeof(buf);
391 msg.buf = buf;
392
393 if (i2c_transfer(state->adap, &msg, 1) != 1)
394 return -EREMOTEIO;
395
396 return 0;
397}
398
399static int va1j5jf8007t_sleep(struct dvb_frontend *fe)
400{
401 struct va1j5jf8007t_state *state;
402 int ret;
403
404 state = fe->demodulator_priv;
405
406 ret = va1j5jf8007t_init_frequency(state);
407 if (ret < 0)
408 return ret;
409
410 return va1j5jf8007t_set_sleep(state, 1);
411}
412
413static int va1j5jf8007t_init(struct dvb_frontend *fe)
414{
415 struct va1j5jf8007t_state *state;
416
417 state = fe->demodulator_priv;
418 state->tune_state = VA1J5JF8007T_IDLE;
419
420 return va1j5jf8007t_set_sleep(state, 0);
421}
422
423static void va1j5jf8007t_release(struct dvb_frontend *fe)
424{
425 struct va1j5jf8007t_state *state;
426 state = fe->demodulator_priv;
427 kfree(state);
428}
429
430static struct dvb_frontend_ops va1j5jf8007t_ops = {
431 .info = {
432 .name = "VA1J5JF8007/VA1J5JF8011 ISDB-T",
433 .type = FE_OFDM,
434 .frequency_min = 90000000,
435 .frequency_max = 770000000,
436 .frequency_stepsize = 142857,
437 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_FEC_AUTO |
438 FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
439 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO,
440 },
441
442 .read_snr = va1j5jf8007t_read_snr,
443 .get_frontend_algo = va1j5jf8007t_get_frontend_algo,
444 .read_status = va1j5jf8007t_read_status,
445 .tune = va1j5jf8007t_tune,
446 .sleep = va1j5jf8007t_sleep,
447 .init = va1j5jf8007t_init,
448 .release = va1j5jf8007t_release,
449};
450
451static const u8 va1j5jf8007t_20mhz_prepare_bufs[][2] = {
452 {0x03, 0x90}, {0x14, 0x8f}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2},
453 {0x22, 0x83}, {0x31, 0x0d}, {0x32, 0xe0}, {0x39, 0xd3}, {0x3a, 0x00},
454 {0x5c, 0x40}, {0x5f, 0x80}, {0x75, 0x02}, {0x76, 0x4e}, {0x77, 0x03},
455 {0xef, 0x01}
456};
457
458static const u8 va1j5jf8007t_25mhz_prepare_bufs[][2] = {
459 {0x03, 0x90}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2}, {0x22, 0x83},
460 {0x3a, 0x00}, {0x5c, 0x40}, {0x5f, 0x80}, {0x75, 0x0a}, {0x76, 0x4c},
461 {0x77, 0x03}, {0xef, 0x01}
462};
463
464int va1j5jf8007t_prepare(struct dvb_frontend *fe)
465{
466 struct va1j5jf8007t_state *state;
467 const u8 (*bufs)[2];
468 int size;
469 u8 buf[2];
470 struct i2c_msg msg;
471 int i;
472
473 state = fe->demodulator_priv;
474
475 switch (state->config->frequency) {
476 case VA1J5JF8007T_20MHZ:
477 bufs = va1j5jf8007t_20mhz_prepare_bufs;
478 size = ARRAY_SIZE(va1j5jf8007t_20mhz_prepare_bufs);
479 break;
480 case VA1J5JF8007T_25MHZ:
481 bufs = va1j5jf8007t_25mhz_prepare_bufs;
482 size = ARRAY_SIZE(va1j5jf8007t_25mhz_prepare_bufs);
483 break;
484 default:
485 return -EINVAL;
486 }
487
488 msg.addr = state->config->demod_address;
489 msg.flags = 0;
490 msg.len = sizeof(buf);
491 msg.buf = buf;
492
493 for (i = 0; i < size; i++) {
494 memcpy(buf, bufs[i], sizeof(buf));
495 if (i2c_transfer(state->adap, &msg, 1) != 1)
496 return -EREMOTEIO;
497 }
498
499 return va1j5jf8007t_init_frequency(state);
500}
501
502struct dvb_frontend *
503va1j5jf8007t_attach(const struct va1j5jf8007t_config *config,
504 struct i2c_adapter *adap)
505{
506 struct va1j5jf8007t_state *state;
507 struct dvb_frontend *fe;
508 u8 buf[2];
509 struct i2c_msg msg;
510
511 state = kzalloc(sizeof(struct va1j5jf8007t_state), GFP_KERNEL);
512 if (!state)
513 return NULL;
514
515 state->config = config;
516 state->adap = adap;
517
518 fe = &state->fe;
519 memcpy(&fe->ops, &va1j5jf8007t_ops, sizeof(struct dvb_frontend_ops));
520 fe->demodulator_priv = state;
521
522 buf[0] = 0x01;
523 buf[1] = 0x80;
524
525 msg.addr = state->config->demod_address;
526 msg.flags = 0;
527 msg.len = sizeof(buf);
528 msg.buf = buf;
529
530 if (i2c_transfer(state->adap, &msg, 1) != 1) {
531 kfree(state);
532 return NULL;
533 }
534
535 return fe;
536}
diff --git a/drivers/media/dvb/pt1/va1j5jf8007t.h b/drivers/media/dvb/pt1/va1j5jf8007t.h
new file mode 100644
index 00000000000..2903be519ef
--- /dev/null
+++ b/drivers/media/dvb/pt1/va1j5jf8007t.h
@@ -0,0 +1,46 @@
1/*
2 * ISDB-T driver for VA1J5JF8007/VA1J5JF8011
3 *
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
5 *
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#ifndef VA1J5JF8007T_H
25#define VA1J5JF8007T_H
26
27enum va1j5jf8007t_frequency {
28 VA1J5JF8007T_20MHZ,
29 VA1J5JF8007T_25MHZ,
30};
31
32struct va1j5jf8007t_config {
33 u8 demod_address;
34 enum va1j5jf8007t_frequency frequency;
35};
36
37struct i2c_adapter;
38
39struct dvb_frontend *
40va1j5jf8007t_attach(const struct va1j5jf8007t_config *config,
41 struct i2c_adapter *adap);
42
43/* must be called after va1j5jf8007s_attach */
44int va1j5jf8007t_prepare(struct dvb_frontend *fe);
45
46#endif
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-20 11:54:18 -0500