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path: root/drivers/ide/slc90e66.c
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Diffstat (limited to 'drivers/ide/slc90e66.c')
-rw-r--r--drivers/ide/slc90e66.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/ide/slc90e66.c b/drivers/ide/slc90e66.c
index 1ccfb40e721..864ffe0e26d 100644
--- a/drivers/ide/slc90e66.c
+++ b/drivers/ide/slc90e66.c
@@ -18,9 +18,8 @@
18 18
19static DEFINE_SPINLOCK(slc90e66_lock); 19static DEFINE_SPINLOCK(slc90e66_lock);
20 20
21static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) 21static void slc90e66_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
22{ 22{
23 ide_hwif_t *hwif = drive->hwif;
24 struct pci_dev *dev = to_pci_dev(hwif->dev); 23 struct pci_dev *dev = to_pci_dev(hwif->dev);
25 int is_slave = drive->dn & 1; 24 int is_slave = drive->dn & 1;
26 int master_port = hwif->channel ? 0x42 : 0x40; 25 int master_port = hwif->channel ? 0x42 : 0x40;
@@ -29,6 +28,8 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
29 u16 master_data; 28 u16 master_data;
30 u8 slave_data; 29 u8 slave_data;
31 int control = 0; 30 int control = 0;
31 const u8 pio = drive->pio_mode - XFER_PIO_0;
32
32 /* ISP RTC */ 33 /* ISP RTC */
33 static const u8 timings[][2] = { 34 static const u8 timings[][2] = {
34 { 0, 0 }, 35 { 0, 0 },
@@ -71,14 +72,14 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
71 spin_unlock_irqrestore(&slc90e66_lock, flags); 72 spin_unlock_irqrestore(&slc90e66_lock, flags);
72} 73}
73 74
74static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) 75static void slc90e66_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
75{ 76{
76 ide_hwif_t *hwif = drive->hwif;
77 struct pci_dev *dev = to_pci_dev(hwif->dev); 77 struct pci_dev *dev = to_pci_dev(hwif->dev);
78 u8 maslave = hwif->channel ? 0x42 : 0x40; 78 u8 maslave = hwif->channel ? 0x42 : 0x40;
79 int sitre = 0, a_speed = 7 << (drive->dn * 4); 79 int sitre = 0, a_speed = 7 << (drive->dn * 4);
80 int u_speed = 0, u_flag = 1 << drive->dn; 80 int u_speed = 0, u_flag = 1 << drive->dn;
81 u16 reg4042, reg44, reg48, reg4a; 81 u16 reg4042, reg44, reg48, reg4a;
82 const u8 speed = drive->dma_mode;
82 83
83 pci_read_config_word(dev, maslave, &reg4042); 84 pci_read_config_word(dev, maslave, &reg4042);
84 sitre = (reg4042 & 0x4000) ? 1 : 0; 85 sitre = (reg4042 & 0x4000) ? 1 : 0;
@@ -98,7 +99,6 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
98 } 99 }
99 } else { 100 } else {
100 const u8 mwdma_to_pio[] = { 0, 3, 4 }; 101 const u8 mwdma_to_pio[] = { 0, 3, 4 };
101 u8 pio;
102 102
103 if (reg48 & u_flag) 103 if (reg48 & u_flag)
104 pci_write_config_word(dev, 0x48, reg48 & ~u_flag); 104 pci_write_config_word(dev, 0x48, reg48 & ~u_flag);
@@ -106,11 +106,12 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
106 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); 106 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
107 107
108 if (speed >= XFER_MW_DMA_0) 108 if (speed >= XFER_MW_DMA_0)
109 pio = mwdma_to_pio[speed - XFER_MW_DMA_0]; 109 drive->pio_mode =
110 mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
110 else 111 else
111 pio = 2; /* only SWDMA2 is allowed */ 112 drive->pio_mode = XFER_PIO_2; /* for SWDMA2 */
112 113
113 slc90e66_set_pio_mode(drive, pio); 114 slc90e66_set_pio_mode(hwif, drive);
114 } 115 }
115} 116}
116 117