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-rw-r--r--drivers/gpu/drm/radeon/r100.c65
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c23
2 files changed, 65 insertions, 23 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index c0d4650cdb7..38209a61e51 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1800,6 +1800,9 @@ int r100_gpu_reset(struct radeon_device *rdev)
1800 1800
1801void r100_set_common_regs(struct radeon_device *rdev) 1801void r100_set_common_regs(struct radeon_device *rdev)
1802{ 1802{
1803 struct drm_device *dev = rdev->ddev;
1804 bool force_dac2 = false;
1805
1803 /* set these so they don't interfere with anything */ 1806 /* set these so they don't interfere with anything */
1804 WREG32(RADEON_OV0_SCALE_CNTL, 0); 1807 WREG32(RADEON_OV0_SCALE_CNTL, 0);
1805 WREG32(RADEON_SUBPIC_CNTL, 0); 1808 WREG32(RADEON_SUBPIC_CNTL, 0);
@@ -1808,6 +1811,68 @@ void r100_set_common_regs(struct radeon_device *rdev)
1808 WREG32(RADEON_DVI_I2C_CNTL_1, 0); 1811 WREG32(RADEON_DVI_I2C_CNTL_1, 0);
1809 WREG32(RADEON_CAP0_TRIG_CNTL, 0); 1812 WREG32(RADEON_CAP0_TRIG_CNTL, 0);
1810 WREG32(RADEON_CAP1_TRIG_CNTL, 0); 1813 WREG32(RADEON_CAP1_TRIG_CNTL, 0);
1814
1815 /* always set up dac2 on rn50 and some rv100 as lots
1816 * of servers seem to wire it up to a VGA port but
1817 * don't report it in the bios connector
1818 * table.
1819 */
1820 switch (dev->pdev->device) {
1821 /* RN50 */
1822 case 0x515e:
1823 case 0x5969:
1824 force_dac2 = true;
1825 break;
1826 /* RV100*/
1827 case 0x5159:
1828 case 0x515a:
1829 /* DELL triple head servers */
1830 if ((dev->pdev->subsystem_vendor == 0x1028 /* DELL */) &&
1831 ((dev->pdev->subsystem_device == 0x016c) ||
1832 (dev->pdev->subsystem_device == 0x016d) ||
1833 (dev->pdev->subsystem_device == 0x016e) ||
1834 (dev->pdev->subsystem_device == 0x016f) ||
1835 (dev->pdev->subsystem_device == 0x0170) ||
1836 (dev->pdev->subsystem_device == 0x017d) ||
1837 (dev->pdev->subsystem_device == 0x017e) ||
1838 (dev->pdev->subsystem_device == 0x0183) ||
1839 (dev->pdev->subsystem_device == 0x018a) ||
1840 (dev->pdev->subsystem_device == 0x019a)))
1841 force_dac2 = true;
1842 break;
1843 }
1844
1845 if (force_dac2) {
1846 u32 disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG);
1847 u32 tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);
1848 u32 dac2_cntl = RREG32(RADEON_DAC_CNTL2);
1849
1850 /* For CRT on DAC2, don't turn it on if BIOS didn't
1851 enable it, even it's detected.
1852 */
1853
1854 /* force it to crtc0 */
1855 dac2_cntl &= ~RADEON_DAC2_DAC_CLK_SEL;
1856 dac2_cntl |= RADEON_DAC2_DAC2_CLK_SEL;
1857 disp_hw_debug |= RADEON_CRT2_DISP1_SEL;
1858
1859 /* set up the TV DAC */
1860 tv_dac_cntl &= ~(RADEON_TV_DAC_PEDESTAL |
1861 RADEON_TV_DAC_STD_MASK |
1862 RADEON_TV_DAC_RDACPD |
1863 RADEON_TV_DAC_GDACPD |
1864 RADEON_TV_DAC_BDACPD |
1865 RADEON_TV_DAC_BGADJ_MASK |
1866 RADEON_TV_DAC_DACADJ_MASK);
1867 tv_dac_cntl |= (RADEON_TV_DAC_NBLANK |
1868 RADEON_TV_DAC_NHOLD |
1869 RADEON_TV_DAC_STD_PS2 |
1870 (0x58 << 16));
1871
1872 WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
1873 WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);
1874 WREG32(RADEON_DAC_CNTL2, dac2_cntl);
1875 }
1811} 1876}
1812 1877
1813/* 1878/*
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index b6d8081e124..d6d69bb2ece 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -582,29 +582,6 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
582 ? RADEON_CRTC_V_SYNC_POL 582 ? RADEON_CRTC_V_SYNC_POL
583 : 0)); 583 : 0));
584 584
585 /* TODO -> Dell Server */
586 if (0) {
587 uint32_t disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG);
588 uint32_t tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);
589 uint32_t dac2_cntl = RREG32(RADEON_DAC_CNTL2);
590 uint32_t crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
591
592 dac2_cntl &= ~RADEON_DAC2_DAC_CLK_SEL;
593 dac2_cntl |= RADEON_DAC2_DAC2_CLK_SEL;
594
595 /* For CRT on DAC2, don't turn it on if BIOS didn't
596 enable it, even it's detected.
597 */
598 disp_hw_debug |= RADEON_CRT2_DISP1_SEL;
599 tv_dac_cntl &= ~((1<<2) | (3<<8) | (7<<24) | (0xff<<16));
600 tv_dac_cntl |= (0x03 | (2<<8) | (0x58<<16));
601
602 WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
603 WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);
604 WREG32(RADEON_DAC_CNTL2, dac2_cntl);
605 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
606 }
607
608 if (radeon_crtc->crtc_id) { 585 if (radeon_crtc->crtc_id) {
609 uint32_t crtc2_gen_cntl; 586 uint32_t crtc2_gen_cntl;
610 uint32_t disp2_merge_cntl; 587 uint32_t disp2_merge_cntl;