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path: root/drivers/gpu/drm/radeon
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-rw-r--r--drivers/gpu/drm/radeon/radeon.h47
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h52
2 files changed, 48 insertions, 51 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index a8552eec064..bd63f537070 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -730,8 +730,6 @@ int radeon_debugfs_add_files(struct radeon_device *rdev,
730 struct drm_info_list *files, 730 struct drm_info_list *files,
731 unsigned nfiles); 731 unsigned nfiles);
732int radeon_debugfs_fence_init(struct radeon_device *rdev); 732int radeon_debugfs_fence_init(struct radeon_device *rdev);
733int r100_debugfs_rbbm_init(struct radeon_device *rdev);
734int r100_debugfs_cp_init(struct radeon_device *rdev);
735 733
736 734
737/* 735/*
@@ -1195,51 +1193,6 @@ extern int radeon_resume_kms(struct drm_device *dev);
1195extern int radeon_suspend_kms(struct drm_device *dev, pm_message_t state); 1193extern int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
1196 1194
1197/* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */ 1195/* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */
1198struct r100_mc_save {
1199 u32 GENMO_WT;
1200 u32 CRTC_EXT_CNTL;
1201 u32 CRTC_GEN_CNTL;
1202 u32 CRTC2_GEN_CNTL;
1203 u32 CUR_OFFSET;
1204 u32 CUR2_OFFSET;
1205};
1206extern void r100_cp_disable(struct radeon_device *rdev);
1207extern int r100_cp_init(struct radeon_device *rdev, unsigned ring_size);
1208extern void r100_cp_fini(struct radeon_device *rdev);
1209extern void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
1210extern int r100_pci_gart_init(struct radeon_device *rdev);
1211extern void r100_pci_gart_fini(struct radeon_device *rdev);
1212extern int r100_pci_gart_enable(struct radeon_device *rdev);
1213extern void r100_pci_gart_disable(struct radeon_device *rdev);
1214extern int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
1215extern int r100_debugfs_mc_info_init(struct radeon_device *rdev);
1216extern int r100_gui_wait_for_idle(struct radeon_device *rdev);
1217extern void r100_ib_fini(struct radeon_device *rdev);
1218extern int r100_ib_init(struct radeon_device *rdev);
1219extern void r100_irq_disable(struct radeon_device *rdev);
1220extern int r100_irq_set(struct radeon_device *rdev);
1221extern void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save);
1222extern void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save);
1223extern void r100_vram_init_sizes(struct radeon_device *rdev);
1224extern void r100_wb_disable(struct radeon_device *rdev);
1225extern void r100_wb_fini(struct radeon_device *rdev);
1226extern int r100_wb_init(struct radeon_device *rdev);
1227extern void r100_hdp_reset(struct radeon_device *rdev);
1228extern int r100_rb2d_reset(struct radeon_device *rdev);
1229extern int r100_cp_reset(struct radeon_device *rdev);
1230extern void r100_vga_render_disable(struct radeon_device *rdev);
1231extern int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
1232 struct radeon_cs_packet *pkt,
1233 struct radeon_bo *robj);
1234extern int r100_cs_parse_packet0(struct radeon_cs_parser *p,
1235 struct radeon_cs_packet *pkt,
1236 const unsigned *auth, unsigned n,
1237 radeon_packet0_check_t check);
1238extern int r100_cs_packet_parse(struct radeon_cs_parser *p,
1239 struct radeon_cs_packet *pkt,
1240 unsigned idx);
1241extern void r100_enable_bm(struct radeon_device *rdev);
1242extern void r100_set_common_regs(struct radeon_device *rdev);
1243 1196
1244/* rv200,rv250,rv280 */ 1197/* rv200,rv250,rv280 */
1245extern void r200_set_safe_registers(struct radeon_device *rdev); 1198extern void r200_set_safe_registers(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 4c0d3dab794..a0b8280663d 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -45,10 +45,18 @@ void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
45/* 45/*
46 * r100,rv100,rs100,rv200,rs200 46 * r100,rv100,rs100,rv200,rs200
47 */ 47 */
48extern int r100_init(struct radeon_device *rdev); 48struct r100_mc_save {
49extern void r100_fini(struct radeon_device *rdev); 49 u32 GENMO_WT;
50extern int r100_suspend(struct radeon_device *rdev); 50 u32 CRTC_EXT_CNTL;
51extern int r100_resume(struct radeon_device *rdev); 51 u32 CRTC_GEN_CNTL;
52 u32 CRTC2_GEN_CNTL;
53 u32 CUR_OFFSET;
54 u32 CUR2_OFFSET;
55};
56int r100_init(struct radeon_device *rdev);
57void r100_fini(struct radeon_device *rdev);
58int r100_suspend(struct radeon_device *rdev);
59int r100_resume(struct radeon_device *rdev);
52uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg); 60uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg);
53void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 61void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
54void r100_vga_set_state(struct radeon_device *rdev, bool state); 62void r100_vga_set_state(struct radeon_device *rdev, bool state);
@@ -82,6 +90,42 @@ void r100_hpd_fini(struct radeon_device *rdev);
82bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); 90bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
83void r100_hpd_set_polarity(struct radeon_device *rdev, 91void r100_hpd_set_polarity(struct radeon_device *rdev,
84 enum radeon_hpd_id hpd); 92 enum radeon_hpd_id hpd);
93int r100_debugfs_rbbm_init(struct radeon_device *rdev);
94int r100_debugfs_cp_init(struct radeon_device *rdev);
95void r100_cp_disable(struct radeon_device *rdev);
96int r100_cp_init(struct radeon_device *rdev, unsigned ring_size);
97void r100_cp_fini(struct radeon_device *rdev);
98int r100_pci_gart_init(struct radeon_device *rdev);
99void r100_pci_gart_fini(struct radeon_device *rdev);
100int r100_pci_gart_enable(struct radeon_device *rdev);
101void r100_pci_gart_disable(struct radeon_device *rdev);
102int r100_debugfs_mc_info_init(struct radeon_device *rdev);
103int r100_gui_wait_for_idle(struct radeon_device *rdev);
104void r100_ib_fini(struct radeon_device *rdev);
105int r100_ib_init(struct radeon_device *rdev);
106void r100_irq_disable(struct radeon_device *rdev);
107void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save);
108void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save);
109void r100_vram_init_sizes(struct radeon_device *rdev);
110void r100_wb_disable(struct radeon_device *rdev);
111void r100_wb_fini(struct radeon_device *rdev);
112int r100_wb_init(struct radeon_device *rdev);
113void r100_hdp_reset(struct radeon_device *rdev);
114int r100_rb2d_reset(struct radeon_device *rdev);
115int r100_cp_reset(struct radeon_device *rdev);
116void r100_vga_render_disable(struct radeon_device *rdev);
117int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
118 struct radeon_cs_packet *pkt,
119 struct radeon_bo *robj);
120int r100_cs_parse_packet0(struct radeon_cs_parser *p,
121 struct radeon_cs_packet *pkt,
122 const unsigned *auth, unsigned n,
123 radeon_packet0_check_t check);
124int r100_cs_packet_parse(struct radeon_cs_parser *p,
125 struct radeon_cs_packet *pkt,
126 unsigned idx);
127void r100_enable_bm(struct radeon_device *rdev);
128void r100_set_common_regs(struct radeon_device *rdev);
85 129
86/* 130/*
87 * r200,rv250,rs300,rv280 131 * r200,rv250,rs300,rv280
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-22 09:34:38 -0400