1 files changed, 51 insertions, 43 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 400b26df652..c93bc64707e 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -701,16 +701,21 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                        return r;
                }
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                if (p->keep_tiling_flags) {
-                        tile_flags |= R300_TXO_MACRO_TILE;
+                        ib[idx] = (idx_value & 31) | /* keep the 1st 5 bits */
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                                  ((idx_value & ~31) + (u32)reloc->lobj.gpu_offset);
-                        tile_flags |= R300_TXO_MICRO_TILE;
+                } else {
-                else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
+                        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
-                        tile_flags |= R300_TXO_MICRO_TILE_SQUARE;
+                                tile_flags |= R300_TXO_MACRO_TILE;
+                        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
-                tmp = idx_value + ((u32)reloc->lobj.gpu_offset);
+                                tile_flags |= R300_TXO_MICRO_TILE;
-                tmp |= tile_flags;
+                        else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
-                ib[idx] = tmp;
+                                tile_flags |= R300_TXO_MICRO_TILE_SQUARE;
+                        tmp = idx_value + ((u32)reloc->lobj.gpu_offset);
+                        tmp |= tile_flags;
+                        ib[idx] = tmp;
+                }
                track->textures[i].robj = reloc->robj;
                track->tex_dirty = true;
                break;
@@ -760,24 +765,26 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                /* RB3D_COLORPITCH1 */
                /* RB3D_COLORPITCH2 */
                /* RB3D_COLORPITCH3 */
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (!p->keep_tiling_flags) {
-                if (r) {
+                        r = r100_cs_packet_next_reloc(p, &reloc);
-                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                        if (r) {
-                                  idx, reg);
+                                DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
-                        r100_cs_dump_packet(p, pkt);
+                                          idx, reg);
-                        return r;
+                                r100_cs_dump_packet(p, pkt);
-                }
+                                return r;
+                        }
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
-                        tile_flags |= R300_COLOR_TILE_ENABLE;
+                                tile_flags |= R300_COLOR_TILE_ENABLE;
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
-                        tile_flags |= R300_COLOR_MICROTILE_ENABLE;
+                                tile_flags |= R300_COLOR_MICROTILE_ENABLE;
-                else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
+                        else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
-                        tile_flags |= R300_COLOR_MICROTILE_SQUARE_ENABLE;
+                                tile_flags |= R300_COLOR_MICROTILE_SQUARE_ENABLE;
-                tmp = idx_value & ~(0x7 << 16);
+                        tmp = idx_value & ~(0x7 << 16);
-                tmp |= tile_flags;
+                        tmp |= tile_flags;
-                ib[idx] = tmp;
+                        ib[idx] = tmp;
+                }
                i = (reg - 0x4E38) >> 2;
                track->cb[i].pitch = idx_value & 0x3FFE;
                switch (((idx_value >> 21) & 0xF)) {
@@ -843,25 +850,26 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                break;
        case 0x4F24:
                /* ZB_DEPTHPITCH */
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (!p->keep_tiling_flags) {
-                if (r) {
+                        r = r100_cs_packet_next_reloc(p, &reloc);
-                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                        if (r) {
-                                  idx, reg);
+                                DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
-                        r100_cs_dump_packet(p, pkt);
+                                          idx, reg);
-                        return r;
+                                r100_cs_dump_packet(p, pkt);
-                }
+                                return r;
+                        }
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
-                        tile_flags |= R300_DEPTHMACROTILE_ENABLE;
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
-                        tile_flags |= R300_DEPTHMICROTILE_TILED;
-                else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
-                        tile_flags |= R300_DEPTHMICROTILE_TILED_SQUARE;
-                tmp = idx_value & ~(0x7 << 16);
+                        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
-                tmp |= tile_flags;
+                                tile_flags |= R300_DEPTHMACROTILE_ENABLE;
-                ib[idx] = tmp;
+                        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                                tile_flags |= R300_DEPTHMICROTILE_TILED;
+                        else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
+                                tile_flags |= R300_DEPTHMICROTILE_TILED_SQUARE;
+                        tmp = idx_value & ~(0x7 << 16);
+                        tmp |= tile_flags;
+                        ib[idx] = tmp;
+                }
                track->zb.pitch = idx_value & 0x3FFC;
                track->zb_dirty = true;
                break;

diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 400b26df652..c93bc64707e 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c
@@ -701,16 +701,21 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
701	return r;	701	return r;
702	}	702	}
703		703
704	if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)	704	if (p->keep_tiling_flags) {
705	tile_flags \|= R300_TXO_MACRO_TILE;	705	ib[idx] = (idx_value & 31) \| /* keep the 1st 5 bits */
706	if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)	706	((idx_value & ~31) + (u32)reloc->lobj.gpu_offset);
707	tile_flags \|= R300_TXO_MICRO_TILE;	707	} else {
708	else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)	708	if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
709	tile_flags \|= R300_TXO_MICRO_TILE_SQUARE;	709	tile_flags \|= R300_TXO_MACRO_TILE;
710		710	if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
711	tmp = idx_value + ((u32)reloc->lobj.gpu_offset);	711	tile_flags \|= R300_TXO_MICRO_TILE;
712	tmp \|= tile_flags;	712	else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
713	ib[idx] = tmp;	713	tile_flags \|= R300_TXO_MICRO_TILE_SQUARE;
		714
		715	tmp = idx_value + ((u32)reloc->lobj.gpu_offset);
		716	tmp \|= tile_flags;
		717	ib[idx] = tmp;
		718	}
714	track->textures[i].robj = reloc->robj;	719	track->textures[i].robj = reloc->robj;
715	track->tex_dirty = true;	720	track->tex_dirty = true;
716	break;	721	break;
@@ -760,24 +765,26 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
760	/* RB3D_COLORPITCH1 */	765	/* RB3D_COLORPITCH1 */
761	/* RB3D_COLORPITCH2 */	766	/* RB3D_COLORPITCH2 */
762	/* RB3D_COLORPITCH3 */	767	/* RB3D_COLORPITCH3 */
763	r = r100_cs_packet_next_reloc(p, &reloc);	768	if (!p->keep_tiling_flags) {
764	if (r) {	769	r = r100_cs_packet_next_reloc(p, &reloc);
765	DRM_ERROR("No reloc for ib[%d]=0x%04X\n",	770	if (r) {
766	idx, reg);	771	DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
767	r100_cs_dump_packet(p, pkt);	772	idx, reg);
768	return r;	773	r100_cs_dump_packet(p, pkt);
769	}	774	return r;
		775	}
770		776
771	if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)	777	if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
772	tile_flags \|= R300_COLOR_TILE_ENABLE;	778	tile_flags \|= R300_COLOR_TILE_ENABLE;
773	if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)	779	if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
774	tile_flags \|= R300_COLOR_MICROTILE_ENABLE;	780	tile_flags \|= R300_COLOR_MICROTILE_ENABLE;
775	else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)	781	else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
776	tile_flags \|= R300_COLOR_MICROTILE_SQUARE_ENABLE;	782	tile_flags \|= R300_COLOR_MICROTILE_SQUARE_ENABLE;
777		783
778	tmp = idx_value & ~(0x7 << 16);	784	tmp = idx_value & ~(0x7 << 16);
779	tmp \|= tile_flags;	785	tmp \|= tile_flags;
780	ib[idx] = tmp;	786	ib[idx] = tmp;
		787	}
781	i = (reg - 0x4E38) >> 2;	788	i = (reg - 0x4E38) >> 2;
782	track->cb[i].pitch = idx_value & 0x3FFE;	789	track->cb[i].pitch = idx_value & 0x3FFE;
783	switch (((idx_value >> 21) & 0xF)) {	790	switch (((idx_value >> 21) & 0xF)) {
@@ -843,25 +850,26 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
843	break;	850	break;
844	case 0x4F24:	851	case 0x4F24:
845	/* ZB_DEPTHPITCH */	852	/* ZB_DEPTHPITCH */
846	r = r100_cs_packet_next_reloc(p, &reloc);	853	if (!p->keep_tiling_flags) {
847	if (r) {	854	r = r100_cs_packet_next_reloc(p, &reloc);
848	DRM_ERROR("No reloc for ib[%d]=0x%04X\n",	855	if (r) {
849	idx, reg);	856	DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
850	r100_cs_dump_packet(p, pkt);	857	idx, reg);
851	return r;	858	r100_cs_dump_packet(p, pkt);
852	}	859	return r;
853		860	}
854	if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
855	tile_flags \|= R300_DEPTHMACROTILE_ENABLE;
856	if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
857	tile_flags \|= R300_DEPTHMICROTILE_TILED;
858	else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
859	tile_flags \|= R300_DEPTHMICROTILE_TILED_SQUARE;
860		861
861	tmp = idx_value & ~(0x7 << 16);	862	if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
862	tmp \|= tile_flags;	863	tile_flags \|= R300_DEPTHMACROTILE_ENABLE;
863	ib[idx] = tmp;	864	if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
		865	tile_flags \|= R300_DEPTHMICROTILE_TILED;
		866	else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO_SQUARE)
		867	tile_flags \|= R300_DEPTHMICROTILE_TILED_SQUARE;
864		868
		869	tmp = idx_value & ~(0x7 << 16);
		870	tmp \|= tile_flags;
		871	ib[idx] = tmp;
		872	}
865	track->zb.pitch = idx_value & 0x3FFC;	873	track->zb.pitch = idx_value & 0x3FFC;
866	track->zb_dirty = true;	874	track->zb_dirty = true;
867	break;	875	break;