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path: root/drivers/gpu/drm/nouveau/nv17_tv_modes.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nv17_tv_modes.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv17_tv_modes.c48
1 files changed, 29 insertions, 19 deletions
diff --git a/drivers/gpu/drm/nouveau/nv17_tv_modes.c b/drivers/gpu/drm/nouveau/nv17_tv_modes.c
index d64683d97e0..9d3893c50a4 100644
--- a/drivers/gpu/drm/nouveau/nv17_tv_modes.c
+++ b/drivers/gpu/drm/nouveau/nv17_tv_modes.c
@@ -336,12 +336,17 @@ static void tv_setup_filter(struct drm_encoder *encoder)
336 struct filter_params *p = &fparams[k][j]; 336 struct filter_params *p = &fparams[k][j];
337 337
338 for (i = 0; i < 7; i++) { 338 for (i = 0; i < 7; i++) {
339 int64_t c = (p->k1 + p->ki*i + p->ki2*i*i + p->ki3*i*i*i) 339 int64_t c = (p->k1 + p->ki*i + p->ki2*i*i +
340 + (p->kr + p->kir*i + p->ki2r*i*i + p->ki3r*i*i*i)*rs[k] 340 p->ki3*i*i*i)
341 + (p->kf + p->kif*i + p->ki2f*i*i + p->ki3f*i*i*i)*flicker 341 + (p->kr + p->kir*i + p->ki2r*i*i +
342 + (p->krf + p->kirf*i + p->ki2rf*i*i + p->ki3rf*i*i*i)*flicker*rs[k]; 342 p->ki3r*i*i*i) * rs[k]
343 343 + (p->kf + p->kif*i + p->ki2f*i*i +
344 (*filters[k])[j][i] = (c + id5/2) >> 39 & (0x1 << 31 | 0x7f << 9); 344 p->ki3f*i*i*i) * flicker
345 + (p->krf + p->kirf*i + p->ki2rf*i*i +
346 p->ki3rf*i*i*i) * flicker * rs[k];
347
348 (*filters[k])[j][i] = (c + id5/2) >> 39
349 & (0x1 << 31 | 0x7f << 9);
345 } 350 }
346 } 351 }
347 } 352 }
@@ -349,7 +354,8 @@ static void tv_setup_filter(struct drm_encoder *encoder)
349 354
350/* Hardware state saving/restoring */ 355/* Hardware state saving/restoring */
351 356
352static void tv_save_filter(struct drm_device *dev, uint32_t base, uint32_t regs[4][7]) 357static void tv_save_filter(struct drm_device *dev, uint32_t base,
358 uint32_t regs[4][7])
353{ 359{
354 int i, j; 360 int i, j;
355 uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c }; 361 uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c };
@@ -360,7 +366,8 @@ static void tv_save_filter(struct drm_device *dev, uint32_t base, uint32_t regs[
360 } 366 }
361} 367}
362 368
363static void tv_load_filter(struct drm_device *dev, uint32_t base, uint32_t regs[4][7]) 369static void tv_load_filter(struct drm_device *dev, uint32_t base,
370 uint32_t regs[4][7])
364{ 371{
365 int i, j; 372 int i, j;
366 uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c }; 373 uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c };
@@ -504,10 +511,10 @@ void nv17_tv_update_properties(struct drm_encoder *encoder)
504 break; 511 break;
505 } 512 }
506 513
507 regs->tv_enc[0x20] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x20], 255, 514 regs->tv_enc[0x20] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x20],
508 tv_enc->saturation); 515 255, tv_enc->saturation);
509 regs->tv_enc[0x22] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x22], 255, 516 regs->tv_enc[0x22] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x22],
510 tv_enc->saturation); 517 255, tv_enc->saturation);
511 regs->tv_enc[0x25] = tv_enc->hue * 255 / 100; 518 regs->tv_enc[0x25] = tv_enc->hue * 255 / 100;
512 519
513 nv_load_ptv(dev, regs, 204); 520 nv_load_ptv(dev, regs, 204);
@@ -541,7 +548,8 @@ void nv17_ctv_update_rescaler(struct drm_encoder *encoder)
541 int head = nouveau_crtc(encoder->crtc)->index; 548 int head = nouveau_crtc(encoder->crtc)->index;
542 struct nv04_crtc_reg *regs = &dev_priv->mode_reg.crtc_reg[head]; 549 struct nv04_crtc_reg *regs = &dev_priv->mode_reg.crtc_reg[head];
543 struct drm_display_mode *crtc_mode = &encoder->crtc->mode; 550 struct drm_display_mode *crtc_mode = &encoder->crtc->mode;
544 struct drm_display_mode *output_mode = &get_tv_norm(encoder)->ctv_enc_mode.mode; 551 struct drm_display_mode *output_mode =
552 &get_tv_norm(encoder)->ctv_enc_mode.mode;
545 int overscan, hmargin, vmargin, hratio, vratio; 553 int overscan, hmargin, vmargin, hratio, vratio;
546 554
547 /* The rescaler doesn't do the right thing for interlaced modes. */ 555 /* The rescaler doesn't do the right thing for interlaced modes. */
@@ -553,13 +561,15 @@ void nv17_ctv_update_rescaler(struct drm_encoder *encoder)
553 hmargin = (output_mode->hdisplay - crtc_mode->hdisplay) / 2; 561 hmargin = (output_mode->hdisplay - crtc_mode->hdisplay) / 2;
554 vmargin = (output_mode->vdisplay - crtc_mode->vdisplay) / 2; 562 vmargin = (output_mode->vdisplay - crtc_mode->vdisplay) / 2;
555 563
556 hmargin = interpolate(0, min(hmargin, output_mode->hdisplay/20), hmargin, 564 hmargin = interpolate(0, min(hmargin, output_mode->hdisplay/20),
557 overscan); 565 hmargin, overscan);
558 vmargin = interpolate(0, min(vmargin, output_mode->vdisplay/20), vmargin, 566 vmargin = interpolate(0, min(vmargin, output_mode->vdisplay/20),
559 overscan); 567 vmargin, overscan);
560 568
561 hratio = crtc_mode->hdisplay * 0x800 / (output_mode->hdisplay - 2*hmargin); 569 hratio = crtc_mode->hdisplay * 0x800 /
562 vratio = crtc_mode->vdisplay * 0x800 / (output_mode->vdisplay - 2*vmargin) & ~3; 570 (output_mode->hdisplay - 2*hmargin);
571 vratio = crtc_mode->vdisplay * 0x800 /
572 (output_mode->vdisplay - 2*vmargin) & ~3;
563 573
564 regs->fp_horiz_regs[FP_VALID_START] = hmargin; 574 regs->fp_horiz_regs[FP_VALID_START] = hmargin;
565 regs->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - hmargin - 1; 575 regs->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - hmargin - 1;