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path: root/drivers/gpu/drm/nouveau/nouveau_drv.h
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drv.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h59
1 files changed, 34 insertions, 25 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index ce0475ead38..8b524d894f1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -66,10 +66,11 @@ struct nouveau_grctx;
66#define NV50_VM_VRAM_NR (NV50_VM_MAX_VRAM / NV50_VM_BLOCK) 66#define NV50_VM_VRAM_NR (NV50_VM_MAX_VRAM / NV50_VM_BLOCK)
67 67
68struct nouveau_tile_reg { 68struct nouveau_tile_reg {
69 struct nouveau_fence *fence;
70 uint32_t addr;
71 uint32_t size;
72 bool used; 69 bool used;
70 uint32_t addr;
71 uint32_t limit;
72 uint32_t pitch;
73 struct nouveau_fence *fence;
73}; 74};
74 75
75struct nouveau_bo { 76struct nouveau_bo {
@@ -309,8 +310,11 @@ struct nouveau_fb_engine {
309 int (*init)(struct drm_device *dev); 310 int (*init)(struct drm_device *dev);
310 void (*takedown)(struct drm_device *dev); 311 void (*takedown)(struct drm_device *dev);
311 312
312 void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr, 313 void (*init_tile_region)(struct drm_device *dev, int i,
313 uint32_t size, uint32_t pitch); 314 uint32_t addr, uint32_t size,
315 uint32_t pitch, uint32_t flags);
316 void (*set_tile_region)(struct drm_device *dev, int i);
317 void (*free_tile_region)(struct drm_device *dev, int i);
314}; 318};
315 319
316struct nouveau_fifo_engine { 320struct nouveau_fifo_engine {
@@ -356,8 +360,7 @@ struct nouveau_pgraph_engine {
356 int (*unload_context)(struct drm_device *); 360 int (*unload_context)(struct drm_device *);
357 void (*tlb_flush)(struct drm_device *dev); 361 void (*tlb_flush)(struct drm_device *dev);
358 362
359 void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr, 363 void (*set_tile_region)(struct drm_device *dev, int i);
360 uint32_t size, uint32_t pitch);
361}; 364};
362 365
363struct nouveau_display_engine { 366struct nouveau_display_engine {
@@ -668,7 +671,10 @@ struct drm_nouveau_private {
668 } gart_info; 671 } gart_info;
669 672
670 /* nv10-nv40 tiling regions */ 673 /* nv10-nv40 tiling regions */
671 struct nouveau_tile_reg tile[NOUVEAU_MAX_TILE_NR]; 674 struct {
675 struct nouveau_tile_reg reg[NOUVEAU_MAX_TILE_NR];
676 spinlock_t lock;
677 } tile;
672 678
673 /* VRAM/fb configuration */ 679 /* VRAM/fb configuration */
674 uint64_t vram_size; 680 uint64_t vram_size;
@@ -798,13 +804,12 @@ extern void nouveau_mem_gart_fini(struct drm_device *);
798extern int nouveau_mem_init_agp(struct drm_device *); 804extern int nouveau_mem_init_agp(struct drm_device *);
799extern int nouveau_mem_reset_agp(struct drm_device *); 805extern int nouveau_mem_reset_agp(struct drm_device *);
800extern void nouveau_mem_close(struct drm_device *); 806extern void nouveau_mem_close(struct drm_device *);
801extern struct nouveau_tile_reg *nv10_mem_set_tiling(struct drm_device *dev, 807extern struct nouveau_tile_reg *nv10_mem_set_tiling(
802 uint32_t addr, 808 struct drm_device *dev, uint32_t addr, uint32_t size,
803 uint32_t size, 809 uint32_t pitch, uint32_t flags);
804 uint32_t pitch); 810extern void nv10_mem_put_tile_region(struct drm_device *dev,
805extern void nv10_mem_expire_tiling(struct drm_device *dev, 811 struct nouveau_tile_reg *tile,
806 struct nouveau_tile_reg *tile, 812 struct nouveau_fence *fence);
807 struct nouveau_fence *fence);
808extern int nv50_mem_vm_bind_linear(struct drm_device *, uint64_t virt, 813extern int nv50_mem_vm_bind_linear(struct drm_device *, uint64_t virt,
809 uint32_t size, uint32_t flags, 814 uint32_t size, uint32_t flags,
810 uint64_t phys); 815 uint64_t phys);
@@ -1011,18 +1016,25 @@ extern void nv04_fb_takedown(struct drm_device *);
1011/* nv10_fb.c */ 1016/* nv10_fb.c */
1012extern int nv10_fb_init(struct drm_device *); 1017extern int nv10_fb_init(struct drm_device *);
1013extern void nv10_fb_takedown(struct drm_device *); 1018extern void nv10_fb_takedown(struct drm_device *);
1014extern void nv10_fb_set_region_tiling(struct drm_device *, int, uint32_t, 1019extern void nv10_fb_init_tile_region(struct drm_device *dev, int i,
1015 uint32_t, uint32_t); 1020 uint32_t addr, uint32_t size,
1021 uint32_t pitch, uint32_t flags);
1022extern void nv10_fb_set_tile_region(struct drm_device *dev, int i);
1023extern void nv10_fb_free_tile_region(struct drm_device *dev, int i);
1016 1024
1017/* nv30_fb.c */ 1025/* nv30_fb.c */
1018extern int nv30_fb_init(struct drm_device *); 1026extern int nv30_fb_init(struct drm_device *);
1019extern void nv30_fb_takedown(struct drm_device *); 1027extern void nv30_fb_takedown(struct drm_device *);
1028extern void nv30_fb_init_tile_region(struct drm_device *dev, int i,
1029 uint32_t addr, uint32_t size,
1030 uint32_t pitch, uint32_t flags);
1031extern void nv30_fb_free_tile_region(struct drm_device *dev, int i);
1020 1032
1021/* nv40_fb.c */ 1033/* nv40_fb.c */
1022extern int nv40_fb_init(struct drm_device *); 1034extern int nv40_fb_init(struct drm_device *);
1023extern void nv40_fb_takedown(struct drm_device *); 1035extern void nv40_fb_takedown(struct drm_device *);
1024extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t, 1036extern void nv40_fb_set_tile_region(struct drm_device *dev, int i);
1025 uint32_t, uint32_t); 1037
1026/* nv50_fb.c */ 1038/* nv50_fb.c */
1027extern int nv50_fb_init(struct drm_device *); 1039extern int nv50_fb_init(struct drm_device *);
1028extern void nv50_fb_takedown(struct drm_device *); 1040extern void nv50_fb_takedown(struct drm_device *);
@@ -1102,8 +1114,7 @@ extern void nv10_graph_destroy_context(struct nouveau_channel *);
1102extern int nv10_graph_load_context(struct nouveau_channel *); 1114extern int nv10_graph_load_context(struct nouveau_channel *);
1103extern int nv10_graph_unload_context(struct drm_device *); 1115extern int nv10_graph_unload_context(struct drm_device *);
1104extern void nv10_graph_context_switch(struct drm_device *); 1116extern void nv10_graph_context_switch(struct drm_device *);
1105extern void nv10_graph_set_region_tiling(struct drm_device *, int, uint32_t, 1117extern void nv10_graph_set_tile_region(struct drm_device *dev, int i);
1106 uint32_t, uint32_t);
1107 1118
1108/* nv20_graph.c */ 1119/* nv20_graph.c */
1109extern int nv20_graph_create_context(struct nouveau_channel *); 1120extern int nv20_graph_create_context(struct nouveau_channel *);
@@ -1113,8 +1124,7 @@ extern int nv20_graph_unload_context(struct drm_device *);
1113extern int nv20_graph_init(struct drm_device *); 1124extern int nv20_graph_init(struct drm_device *);
1114extern void nv20_graph_takedown(struct drm_device *); 1125extern void nv20_graph_takedown(struct drm_device *);
1115extern int nv30_graph_init(struct drm_device *); 1126extern int nv30_graph_init(struct drm_device *);
1116extern void nv20_graph_set_region_tiling(struct drm_device *, int, uint32_t, 1127extern void nv20_graph_set_tile_region(struct drm_device *dev, int i);
1117 uint32_t, uint32_t);
1118 1128
1119/* nv40_graph.c */ 1129/* nv40_graph.c */
1120extern int nv40_graph_init(struct drm_device *); 1130extern int nv40_graph_init(struct drm_device *);
@@ -1125,8 +1135,7 @@ extern void nv40_graph_destroy_context(struct nouveau_channel *);
1125extern int nv40_graph_load_context(struct nouveau_channel *); 1135extern int nv40_graph_load_context(struct nouveau_channel *);
1126extern int nv40_graph_unload_context(struct drm_device *); 1136extern int nv40_graph_unload_context(struct drm_device *);
1127extern void nv40_grctx_init(struct nouveau_grctx *); 1137extern void nv40_grctx_init(struct nouveau_grctx *);
1128extern void nv40_graph_set_region_tiling(struct drm_device *, int, uint32_t, 1138extern void nv40_graph_set_tile_region(struct drm_device *dev, int i);
1129 uint32_t, uint32_t);
1130 1139
1131/* nv50_graph.c */ 1140/* nv50_graph.c */
1132extern int nv50_graph_init(struct drm_device *); 1141extern int nv50_graph_init(struct drm_device *);