4 files changed, 61 insertions, 171 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c
index e1f013d3976..9ca90613306 100644
--- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c
+++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c
@@ -28,37 +28,39 @@
 #include <subdev/fb.h>
 #include <engine/dmaobj.h>
-int
+static int
-nouveau_dmaobj_create_(struct nouveau_object *parent,
+nouveau_dmaobj_ctor(struct nouveau_object *parent,
-                       struct nouveau_object *engine,
+                    struct nouveau_object *engine,
-                       struct nouveau_oclass *oclass,
+                    struct nouveau_oclass *oclass, void *data, u32 size,
-                       void *data, u32 size, int len, void **pobject)
+                    struct nouveau_object **pobject)
 {
+        struct nouveau_dmaeng *dmaeng = (void *)engine;
+        struct nouveau_dmaobj *dmaobj;
+        struct nouveau_gpuobj *gpuobj;
        struct nv_dma_class *args = data;
-        struct nouveau_dmaobj *object;
        int ret;
        if (size < sizeof(*args))
                return -EINVAL;
-        ret = nouveau_object_create_(parent, engine, oclass, 0, len, pobject);
+        ret = nouveau_object_create(parent, engine, oclass, 0, &dmaobj);
-        object = *pobject;
+        *pobject = nv_object(dmaobj);
        if (ret)
                return ret;
        switch (args->flags & NV_DMA_TARGET_MASK) {
        case NV_DMA_TARGET_VM:
-                object->target = NV_MEM_TARGET_VM;
+                dmaobj->target = NV_MEM_TARGET_VM;
                break;
        case NV_DMA_TARGET_VRAM:
-                object->target = NV_MEM_TARGET_VRAM;
+                dmaobj->target = NV_MEM_TARGET_VRAM;
                break;
        case NV_DMA_TARGET_PCI:
-                object->target = NV_MEM_TARGET_PCI;
+                dmaobj->target = NV_MEM_TARGET_PCI;
                break;
        case NV_DMA_TARGET_PCI_US:
        case NV_DMA_TARGET_AGP:
-                object->target = NV_MEM_TARGET_PCI_NOSNOOP;
+                dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
                break;
        default:
                return -EINVAL;
@@ -66,22 +68,58 @@ nouveau_dmaobj_create_(struct nouveau_object *parent,
        switch (args->flags & NV_DMA_ACCESS_MASK) {
        case NV_DMA_ACCESS_VM:
-                object->access = NV_MEM_ACCESS_VM;
+                dmaobj->access = NV_MEM_ACCESS_VM;
                break;
        case NV_DMA_ACCESS_RD:
-                object->access = NV_MEM_ACCESS_RO;
+                dmaobj->access = NV_MEM_ACCESS_RO;
                break;
        case NV_DMA_ACCESS_WR:
-                object->access = NV_MEM_ACCESS_WO;
+                dmaobj->access = NV_MEM_ACCESS_WO;
                break;
        case NV_DMA_ACCESS_RDWR:
-                object->access = NV_MEM_ACCESS_RW;
+                dmaobj->access = NV_MEM_ACCESS_RW;
                break;
        default:
                return -EINVAL;
        }
-        object->start = args->start;
+        dmaobj->start = args->start;
-        object->limit = args->limit;
+        dmaobj->limit = args->limit;
-        return 0;
+        switch (nv_mclass(parent)) {
+        case NV_DEVICE_CLASS:
+                break;
+        case NV03_CHANNEL_DMA_CLASS:
+        case NV10_CHANNEL_DMA_CLASS:
+        case NV17_CHANNEL_DMA_CLASS:
+        case NV40_CHANNEL_DMA_CLASS:
+        case NV50_CHANNEL_DMA_CLASS:
+        case NV84_CHANNEL_DMA_CLASS:
+        case NV50_CHANNEL_IND_CLASS:
+        case NV84_CHANNEL_IND_CLASS:
+                ret = dmaeng->bind(dmaeng, *pobject, dmaobj, &gpuobj);
+                nouveau_object_ref(NULL, pobject);
+                *pobject = nv_object(gpuobj);
+                break;
+        default:
+                return -EINVAL;
+        }
+        return ret;
 }
+static struct nouveau_ofuncs
+nouveau_dmaobj_ofuncs = {
+        .ctor = nouveau_dmaobj_ctor,
+        .dtor = nouveau_object_destroy,
+        .init = nouveau_object_init,
+        .fini = nouveau_object_fini,
+};
+struct nouveau_oclass
+nouveau_dmaobj_sclass[] = {
+        { NV_DMA_FROM_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
+        { NV_DMA_TO_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
+        { NV_DMA_IN_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
+        {}
+};
diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
index 9f4cc2f3199..89238732766 100644
--- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
@@ -34,10 +34,6 @@ struct nv04_dmaeng_priv {
        struct nouveau_dmaeng base;
 };
-struct nv04_dmaobj_priv {
-        struct nouveau_dmaobj base;
-};
 static int
 nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
                 struct nouveau_object *parent,
@@ -106,56 +102,6 @@ nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
 }
 static int
-nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                 struct nouveau_oclass *oclass, void *data, u32 size,
-                 struct nouveau_object **pobject)
-{
-        struct nouveau_dmaeng *dmaeng = (void *)engine;
-        struct nv04_dmaobj_priv *dmaobj;
-        struct nouveau_gpuobj *gpuobj;
-        int ret;
-        ret = nouveau_dmaobj_create(parent, engine, oclass,
-                                    data, size, &dmaobj);
-        *pobject = nv_object(dmaobj);
-        if (ret)
-                return ret;
-        switch (nv_mclass(parent)) {
-        case NV_DEVICE_CLASS:
-                break;
-        case NV03_CHANNEL_DMA_CLASS:
-        case NV10_CHANNEL_DMA_CLASS:
-        case NV17_CHANNEL_DMA_CLASS:
-        case NV40_CHANNEL_DMA_CLASS:
-                ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
-                nouveau_object_ref(NULL, pobject);
-                *pobject = nv_object(gpuobj);
-                break;
-        default:
-                return -EINVAL;
-        }
-        return ret;
-}
-static struct nouveau_ofuncs
-nv04_dmaobj_ofuncs = {
-        .ctor = nv04_dmaobj_ctor,
-        .dtor = _nouveau_dmaobj_dtor,
-        .init = _nouveau_dmaobj_init,
-        .fini = _nouveau_dmaobj_fini,
-};
-static struct nouveau_oclass
-nv04_dmaobj_sclass[] = {
-        { 0x0002, &nv04_dmaobj_ofuncs },
-        { 0x0003, &nv04_dmaobj_ofuncs },
-        { 0x003d, &nv04_dmaobj_ofuncs },
-        {}
-};
-static int
 nv04_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                 struct nouveau_oclass *oclass, void *data, u32 size,
                 struct nouveau_object **pobject)
@@ -168,7 +114,7 @@ nv04_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        if (ret)
                return ret;
-        priv->base.base.sclass = nv04_dmaobj_sclass;
+        nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
        priv->base.bind = nv04_dmaobj_bind;
        return 0;
 }
diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
index 045d2565e28..58876f53b3a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
@@ -32,10 +32,6 @@ struct nv50_dmaeng_priv {
        struct nouveau_dmaeng base;
 };
-struct nv50_dmaobj_priv {
-        struct nouveau_dmaobj base;
-};
 static int
 nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
                 struct nouveau_object *parent,
@@ -94,56 +90,6 @@ nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
 }
 static int
-nv50_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                 struct nouveau_oclass *oclass, void *data, u32 size,
-                 struct nouveau_object **pobject)
-{
-        struct nouveau_dmaeng *dmaeng = (void *)engine;
-        struct nv50_dmaobj_priv *dmaobj;
-        struct nouveau_gpuobj *gpuobj;
-        int ret;
-        ret = nouveau_dmaobj_create(parent, engine, oclass,
-                                    data, size, &dmaobj);
-        *pobject = nv_object(dmaobj);
-        if (ret)
-                return ret;
-        switch (nv_mclass(parent)) {
-        case NV_DEVICE_CLASS:
-                break;
-        case NV50_CHANNEL_DMA_CLASS:
-        case NV84_CHANNEL_DMA_CLASS:
-        case NV50_CHANNEL_IND_CLASS:
-        case NV84_CHANNEL_IND_CLASS:
-                ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
-                nouveau_object_ref(NULL, pobject);
-                *pobject = nv_object(gpuobj);
-                break;
-        default:
-                return -EINVAL;
-        }
-        return ret;
-}
-static struct nouveau_ofuncs
-nv50_dmaobj_ofuncs = {
-        .ctor = nv50_dmaobj_ctor,
-        .dtor = _nouveau_dmaobj_dtor,
-        .init = _nouveau_dmaobj_init,
-        .fini = _nouveau_dmaobj_fini,
-};
-static struct nouveau_oclass
-nv50_dmaobj_sclass[] = {
-        { 0x0002, &nv50_dmaobj_ofuncs },
-        { 0x0003, &nv50_dmaobj_ofuncs },
-        { 0x003d, &nv50_dmaobj_ofuncs },
-        {}
-};
-static int
 nv50_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                 struct nouveau_oclass *oclass, void *data, u32 size,
                 struct nouveau_object **pobject)
@@ -156,7 +102,7 @@ nv50_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        if (ret)
                return ret;
-        priv->base.base.sclass = nv50_dmaobj_sclass;
+        nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
        priv->base.bind = nv50_dmaobj_bind;
        return 0;
 }
diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c
index 5baa0869553..36de4491629 100644
--- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c
@@ -22,54 +22,14 @@
 * Authors: Ben Skeggs
 */
-#include <core/gpuobj.h>
+#include <core/device.h>
-#include <subdev/fb.h>
 #include <engine/dmaobj.h>
 struct nvc0_dmaeng_priv {
        struct nouveau_dmaeng base;
 };
-struct nvc0_dmaobj_priv {
-        struct nouveau_dmaobj base;
-};
-static int
-nvc0_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                 struct nouveau_oclass *oclass, void *data, u32 size,
-                 struct nouveau_object **pobject)
-{
-        struct nvc0_dmaobj_priv *dmaobj;
-        int ret;
-        ret = nouveau_dmaobj_create(parent, engine, oclass, data, size, &dmaobj);
-        *pobject = nv_object(dmaobj);
-        if (ret)
-                return ret;
-        if (dmaobj->base.target != NV_MEM_TARGET_VM || dmaobj->base.start)
-                return -EINVAL;
-        return 0;
-}
-static struct nouveau_ofuncs
-nvc0_dmaobj_ofuncs = {
-        .ctor = nvc0_dmaobj_ctor,
-        .dtor = _nouveau_dmaobj_dtor,
-        .init = _nouveau_dmaobj_init,
-        .fini = _nouveau_dmaobj_fini,
-};
-static struct nouveau_oclass
-nvc0_dmaobj_sclass[] = {
-        { 0x0002, &nvc0_dmaobj_ofuncs },
-        { 0x0003, &nvc0_dmaobj_ofuncs },
-        { 0x003d, &nvc0_dmaobj_ofuncs },
-        {}
-};
 static int
 nvc0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                 struct nouveau_oclass *oclass, void *data, u32 size,
@@ -83,7 +43,7 @@ nvc0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        if (ret)
                return ret;
-        priv->base.base.sclass = nvc0_dmaobj_sclass;
+        nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
        return 0;
 }

diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c index e1f013d3976..9ca90613306 100644 --- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c +++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c
@@ -28,37 +28,39 @@
28	#include <subdev/fb.h>	28	#include <subdev/fb.h>
29	#include <engine/dmaobj.h>	29	#include <engine/dmaobj.h>
30		30
31	int	31	static int
32	nouveau_dmaobj_create_(struct nouveau_object *parent,	32	nouveau_dmaobj_ctor(struct nouveau_object *parent,
33	struct nouveau_object *engine,	33	struct nouveau_object *engine,
34	struct nouveau_oclass *oclass,	34	struct nouveau_oclass oclass, void data, u32 size,
35	void data, u32 size, int len, void *pobject)	35	struct nouveau_object **pobject)
36	{	36	{
		37	struct nouveau_dmaeng dmaeng = (void )engine;
		38	struct nouveau_dmaobj *dmaobj;
		39	struct nouveau_gpuobj *gpuobj;
37	struct nv_dma_class *args = data;	40	struct nv_dma_class *args = data;
38	struct nouveau_dmaobj *object;
39	int ret;	41	int ret;
40		42
41	if (size < sizeof(*args))	43	if (size < sizeof(*args))
42	return -EINVAL;	44	return -EINVAL;
43		45
44	ret = nouveau_object_create_(parent, engine, oclass, 0, len, pobject);	46	ret = nouveau_object_create(parent, engine, oclass, 0, &dmaobj);
45	object = *pobject;	47	*pobject = nv_object(dmaobj);
46	if (ret)	48	if (ret)
47	return ret;	49	return ret;
48		50
49	switch (args->flags & NV_DMA_TARGET_MASK) {	51	switch (args->flags & NV_DMA_TARGET_MASK) {
50	case NV_DMA_TARGET_VM:	52	case NV_DMA_TARGET_VM:
51	object->target = NV_MEM_TARGET_VM;	53	dmaobj->target = NV_MEM_TARGET_VM;
52	break;	54	break;
53	case NV_DMA_TARGET_VRAM:	55	case NV_DMA_TARGET_VRAM:
54	object->target = NV_MEM_TARGET_VRAM;	56	dmaobj->target = NV_MEM_TARGET_VRAM;
55	break;	57	break;
56	case NV_DMA_TARGET_PCI:	58	case NV_DMA_TARGET_PCI:
57	object->target = NV_MEM_TARGET_PCI;	59	dmaobj->target = NV_MEM_TARGET_PCI;
58	break;	60	break;
59	case NV_DMA_TARGET_PCI_US:	61	case NV_DMA_TARGET_PCI_US:
60	case NV_DMA_TARGET_AGP:	62	case NV_DMA_TARGET_AGP:
61	object->target = NV_MEM_TARGET_PCI_NOSNOOP;	63	dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
62	break;	64	break;
63	default:	65	default:
64	return -EINVAL;	66	return -EINVAL;
@@ -66,22 +68,58 @@ nouveau_dmaobj_create_(struct nouveau_object *parent,
66		68
67	switch (args->flags & NV_DMA_ACCESS_MASK) {	69	switch (args->flags & NV_DMA_ACCESS_MASK) {
68	case NV_DMA_ACCESS_VM:	70	case NV_DMA_ACCESS_VM:
69	object->access = NV_MEM_ACCESS_VM;	71	dmaobj->access = NV_MEM_ACCESS_VM;
70	break;	72	break;
71	case NV_DMA_ACCESS_RD:	73	case NV_DMA_ACCESS_RD:
72	object->access = NV_MEM_ACCESS_RO;	74	dmaobj->access = NV_MEM_ACCESS_RO;
73	break;	75	break;
74	case NV_DMA_ACCESS_WR:	76	case NV_DMA_ACCESS_WR:
75	object->access = NV_MEM_ACCESS_WO;	77	dmaobj->access = NV_MEM_ACCESS_WO;
76	break;	78	break;
77	case NV_DMA_ACCESS_RDWR:	79	case NV_DMA_ACCESS_RDWR:
78	object->access = NV_MEM_ACCESS_RW;	80	dmaobj->access = NV_MEM_ACCESS_RW;
79	break;	81	break;
80	default:	82	default:
81	return -EINVAL;	83	return -EINVAL;
82	}	84	}
83		85
84	object->start = args->start;	86	dmaobj->start = args->start;
85	object->limit = args->limit;	87	dmaobj->limit = args->limit;
86	return 0;	88
		89	switch (nv_mclass(parent)) {
		90	case NV_DEVICE_CLASS:
		91	break;
		92	case NV03_CHANNEL_DMA_CLASS:
		93	case NV10_CHANNEL_DMA_CLASS:
		94	case NV17_CHANNEL_DMA_CLASS:
		95	case NV40_CHANNEL_DMA_CLASS:
		96	case NV50_CHANNEL_DMA_CLASS:
		97	case NV84_CHANNEL_DMA_CLASS:
		98	case NV50_CHANNEL_IND_CLASS:
		99	case NV84_CHANNEL_IND_CLASS:
		100	ret = dmaeng->bind(dmaeng, *pobject, dmaobj, &gpuobj);
		101	nouveau_object_ref(NULL, pobject);
		102	*pobject = nv_object(gpuobj);
		103	break;
		104	default:
		105	return -EINVAL;
		106	}
		107
		108	return ret;
87	}	109	}
		110
		111	static struct nouveau_ofuncs
		112	nouveau_dmaobj_ofuncs = {
		113	.ctor = nouveau_dmaobj_ctor,
		114	.dtor = nouveau_object_destroy,
		115	.init = nouveau_object_init,
		116	.fini = nouveau_object_fini,
		117	};
		118
		119	struct nouveau_oclass
		120	nouveau_dmaobj_sclass[] = {
		121	{ NV_DMA_FROM_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
		122	{ NV_DMA_TO_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
		123	{ NV_DMA_IN_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
		124	{}
		125	};


diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c index 9f4cc2f3199..89238732766 100644 --- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c +++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
@@ -34,10 +34,6 @@ struct nv04_dmaeng_priv {
34	struct nouveau_dmaeng base;	34	struct nouveau_dmaeng base;
35	};	35	};
36		36
37	struct nv04_dmaobj_priv {
38	struct nouveau_dmaobj base;
39	};
40
41	static int	37	static int
42	nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng,	38	nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
43	struct nouveau_object *parent,	39	struct nouveau_object *parent,
@@ -106,56 +102,6 @@ nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
106	}	102	}
107		103
108	static int	104	static int
109	nv04_dmaobj_ctor(struct nouveau_object parent, struct nouveau_object engine,
110	struct nouveau_oclass oclass, void data, u32 size,
111	struct nouveau_object **pobject)
112	{
113	struct nouveau_dmaeng dmaeng = (void )engine;
114	struct nv04_dmaobj_priv *dmaobj;
115	struct nouveau_gpuobj *gpuobj;
116	int ret;
117
118	ret = nouveau_dmaobj_create(parent, engine, oclass,
119	data, size, &dmaobj);
120	*pobject = nv_object(dmaobj);
121	if (ret)
122	return ret;
123
124	switch (nv_mclass(parent)) {
125	case NV_DEVICE_CLASS:
126	break;
127	case NV03_CHANNEL_DMA_CLASS:
128	case NV10_CHANNEL_DMA_CLASS:
129	case NV17_CHANNEL_DMA_CLASS:
130	case NV40_CHANNEL_DMA_CLASS:
131	ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
132	nouveau_object_ref(NULL, pobject);
133	*pobject = nv_object(gpuobj);
134	break;
135	default:
136	return -EINVAL;
137	}
138
139	return ret;
140	}
141
142	static struct nouveau_ofuncs
143	nv04_dmaobj_ofuncs = {
144	.ctor = nv04_dmaobj_ctor,
145	.dtor = _nouveau_dmaobj_dtor,
146	.init = _nouveau_dmaobj_init,
147	.fini = _nouveau_dmaobj_fini,
148	};
149
150	static struct nouveau_oclass
151	nv04_dmaobj_sclass[] = {
152	{ 0x0002, &nv04_dmaobj_ofuncs },
153	{ 0x0003, &nv04_dmaobj_ofuncs },
154	{ 0x003d, &nv04_dmaobj_ofuncs },
155	{}
156	};
157
158	static int
159	nv04_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,	105	nv04_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,
160	struct nouveau_oclass oclass, void data, u32 size,	106	struct nouveau_oclass oclass, void data, u32 size,
161	struct nouveau_object **pobject)	107	struct nouveau_object **pobject)
@@ -168,7 +114,7 @@ nv04_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,
168	if (ret)	114	if (ret)
169	return ret;	115	return ret;
170		116
171	priv->base.base.sclass = nv04_dmaobj_sclass;	117	nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
172	priv->base.bind = nv04_dmaobj_bind;	118	priv->base.bind = nv04_dmaobj_bind;
173	return 0;	119	return 0;
174	}	120	}


diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c index 045d2565e28..58876f53b3a 100644 --- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
@@ -32,10 +32,6 @@ struct nv50_dmaeng_priv {
32	struct nouveau_dmaeng base;	32	struct nouveau_dmaeng base;
33	};	33	};
34		34
35	struct nv50_dmaobj_priv {
36	struct nouveau_dmaobj base;
37	};
38
39	static int	35	static int
40	nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,	36	nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
41	struct nouveau_object *parent,	37	struct nouveau_object *parent,
@@ -94,56 +90,6 @@ nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
94	}	90	}
95		91
96	static int	92	static int
97	nv50_dmaobj_ctor(struct nouveau_object parent, struct nouveau_object engine,
98	struct nouveau_oclass oclass, void data, u32 size,
99	struct nouveau_object **pobject)
100	{
101	struct nouveau_dmaeng dmaeng = (void )engine;
102	struct nv50_dmaobj_priv *dmaobj;
103	struct nouveau_gpuobj *gpuobj;
104	int ret;
105
106	ret = nouveau_dmaobj_create(parent, engine, oclass,
107	data, size, &dmaobj);
108	*pobject = nv_object(dmaobj);
109	if (ret)
110	return ret;
111
112	switch (nv_mclass(parent)) {
113	case NV_DEVICE_CLASS:
114	break;
115	case NV50_CHANNEL_DMA_CLASS:
116	case NV84_CHANNEL_DMA_CLASS:
117	case NV50_CHANNEL_IND_CLASS:
118	case NV84_CHANNEL_IND_CLASS:
119	ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
120	nouveau_object_ref(NULL, pobject);
121	*pobject = nv_object(gpuobj);
122	break;
123	default:
124	return -EINVAL;
125	}
126
127	return ret;
128	}
129
130	static struct nouveau_ofuncs
131	nv50_dmaobj_ofuncs = {
132	.ctor = nv50_dmaobj_ctor,
133	.dtor = _nouveau_dmaobj_dtor,
134	.init = _nouveau_dmaobj_init,
135	.fini = _nouveau_dmaobj_fini,
136	};
137
138	static struct nouveau_oclass
139	nv50_dmaobj_sclass[] = {
140	{ 0x0002, &nv50_dmaobj_ofuncs },
141	{ 0x0003, &nv50_dmaobj_ofuncs },
142	{ 0x003d, &nv50_dmaobj_ofuncs },
143	{}
144	};
145
146	static int
147	nv50_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,	93	nv50_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,
148	struct nouveau_oclass oclass, void data, u32 size,	94	struct nouveau_oclass oclass, void data, u32 size,
149	struct nouveau_object **pobject)	95	struct nouveau_object **pobject)
@@ -156,7 +102,7 @@ nv50_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,
156	if (ret)	102	if (ret)
157	return ret;	103	return ret;
158		104
159	priv->base.base.sclass = nv50_dmaobj_sclass;	105	nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
160	priv->base.bind = nv50_dmaobj_bind;	106	priv->base.bind = nv50_dmaobj_bind;
161	return 0;	107	return 0;
162	}	108	}


diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c index 5baa0869553..36de4491629 100644 --- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c
@@ -22,54 +22,14 @@
22	* Authors: Ben Skeggs	22	* Authors: Ben Skeggs
23	*/	23	*/
24		24
25	#include <core/gpuobj.h>	25	#include <core/device.h>
26		26
27	#include <subdev/fb.h>
28	#include <engine/dmaobj.h>	27	#include <engine/dmaobj.h>
29		28
30	struct nvc0_dmaeng_priv {	29	struct nvc0_dmaeng_priv {
31	struct nouveau_dmaeng base;	30	struct nouveau_dmaeng base;
32	};	31	};
33		32
34	struct nvc0_dmaobj_priv {
35	struct nouveau_dmaobj base;
36	};
37
38	static int
39	nvc0_dmaobj_ctor(struct nouveau_object parent, struct nouveau_object engine,
40	struct nouveau_oclass oclass, void data, u32 size,
41	struct nouveau_object **pobject)
42	{
43	struct nvc0_dmaobj_priv *dmaobj;
44	int ret;
45
46	ret = nouveau_dmaobj_create(parent, engine, oclass, data, size, &dmaobj);
47	*pobject = nv_object(dmaobj);
48	if (ret)
49	return ret;
50
51	if (dmaobj->base.target != NV_MEM_TARGET_VM \|\| dmaobj->base.start)
52	return -EINVAL;
53
54	return 0;
55	}
56
57	static struct nouveau_ofuncs
58	nvc0_dmaobj_ofuncs = {
59	.ctor = nvc0_dmaobj_ctor,
60	.dtor = _nouveau_dmaobj_dtor,
61	.init = _nouveau_dmaobj_init,
62	.fini = _nouveau_dmaobj_fini,
63	};
64
65	static struct nouveau_oclass
66	nvc0_dmaobj_sclass[] = {
67	{ 0x0002, &nvc0_dmaobj_ofuncs },
68	{ 0x0003, &nvc0_dmaobj_ofuncs },
69	{ 0x003d, &nvc0_dmaobj_ofuncs },
70	{}
71	};
72
73	static int	33	static int
74	nvc0_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,	34	nvc0_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,
75	struct nouveau_oclass oclass, void data, u32 size,	35	struct nouveau_oclass oclass, void data, u32 size,
@@ -83,7 +43,7 @@ nvc0_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,
83	if (ret)	43	if (ret)
84	return ret;	44	return ret;
85		45
86	priv->base.base.sclass = nvc0_dmaobj_sclass;	46	nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
87	return 0;	47	return 0;
88	}	48	}
89		49