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-rw-r--r--drivers/gpu/drm/i915/i915_dma.c13
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h14
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c74
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c14
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h21
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c24
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c102
-rw-r--r--drivers/gpu/drm/i915/intel_bios.h17
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c151
-rw-r--r--drivers/gpu/drm/i915/intel_display.c57
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h4
-rw-r--r--drivers/gpu/drm/i915/intel_fb.c4
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c17
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c17
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c58
-rw-r--r--drivers/gpu/drm/i915/intel_modes.c6
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c137
17 files changed, 609 insertions, 121 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 051134c56ae..53d54455262 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1011,8 +1011,16 @@ static int i915_load_modeset_init(struct drm_device *dev)
1011 /* Basic memrange allocator for stolen space (aka vram) */ 1011 /* Basic memrange allocator for stolen space (aka vram) */
1012 drm_mm_init(&dev_priv->vram, 0, prealloc_size); 1012 drm_mm_init(&dev_priv->vram, 0, prealloc_size);
1013 1013
1014 /* Let GEM Manage from end of prealloc space to end of aperture */ 1014 /* Let GEM Manage from end of prealloc space to end of aperture.
1015 i915_gem_do_init(dev, prealloc_size, agp_size); 1015 *
1016 * However, leave one page at the end still bound to the scratch page.
1017 * There are a number of places where the hardware apparently
1018 * prefetches past the end of the object, and we've seen multiple
1019 * hangs with the GPU head pointer stuck in a batchbuffer bound
1020 * at the last page of the aperture. One page should be enough to
1021 * keep any prefetching inside of the aperture.
1022 */
1023 i915_gem_do_init(dev, prealloc_size, agp_size - 4096);
1016 1024
1017 ret = i915_gem_init_ringbuffer(dev); 1025 ret = i915_gem_init_ringbuffer(dev);
1018 if (ret) 1026 if (ret)
@@ -1350,6 +1358,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
1350 DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), 1358 DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0),
1351 DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), 1359 DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
1352 DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), 1360 DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0),
1361 DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0),
1353}; 1362};
1354 1363
1355int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); 1364int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 25065923b8a..c431fa54bbb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -180,7 +180,8 @@ typedef struct drm_i915_private {
180 int backlight_duty_cycle; /* restore backlight to this value */ 180 int backlight_duty_cycle; /* restore backlight to this value */
181 bool panel_wants_dither; 181 bool panel_wants_dither;
182 struct drm_display_mode *panel_fixed_mode; 182 struct drm_display_mode *panel_fixed_mode;
183 struct drm_display_mode *vbt_mode; /* if any */ 183 struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
184 struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
184 185
185 /* Feature bits from the VBIOS */ 186 /* Feature bits from the VBIOS */
186 unsigned int int_tv_support:1; 187 unsigned int int_tv_support:1;
@@ -283,6 +284,7 @@ typedef struct drm_i915_private {
283 u8 saveAR[21]; 284 u8 saveAR[21];
284 u8 saveDACMASK; 285 u8 saveDACMASK;
285 u8 saveCR[37]; 286 u8 saveCR[37];
287 uint64_t saveFENCE[16];
286 288
287 struct { 289 struct {
288 struct drm_mm gtt_space; 290 struct drm_mm gtt_space;
@@ -705,13 +707,8 @@ extern void intel_modeset_cleanup(struct drm_device *dev);
705#define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg)) 707#define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg))
706#define I915_READ8(reg) readb(dev_priv->regs + (reg)) 708#define I915_READ8(reg) readb(dev_priv->regs + (reg))
707#define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg)) 709#define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg))
708#ifdef writeq
709#define I915_WRITE64(reg, val) writeq(val, dev_priv->regs + (reg)) 710#define I915_WRITE64(reg, val) writeq(val, dev_priv->regs + (reg))
710#else 711#define I915_READ64(reg) readq(dev_priv->regs + (reg))
711#define I915_WRITE64(reg, val) (writel(val, dev_priv->regs + (reg)), \
712 writel(upper_32_bits(val), dev_priv->regs + \
713 (reg) + 4))
714#endif
715#define POSTING_READ(reg) (void)I915_READ(reg) 712#define POSTING_READ(reg) (void)I915_READ(reg)
716 713
717#define I915_VERBOSE 0 714#define I915_VERBOSE 0
@@ -790,7 +787,8 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
790 (dev)->pci_device == 0x2E22 || \ 787 (dev)->pci_device == 0x2E22 || \
791 (dev)->pci_device == 0x2E32) 788 (dev)->pci_device == 0x2E32)
792 789
793#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02) 790#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
791 (dev)->pci_device == 0x2A12)
794 792
795#define IS_GM45(dev) ((dev)->pci_device == 0x2A42) 793#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
796 794
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ee896d91c5b..670d1288146 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -349,7 +349,7 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj,
349 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE; 349 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
350 num_pages = last_data_page - first_data_page + 1; 350 num_pages = last_data_page - first_data_page + 1;
351 351
352 user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL); 352 user_pages = drm_calloc_large(num_pages, sizeof(struct page *));
353 if (user_pages == NULL) 353 if (user_pages == NULL)
354 return -ENOMEM; 354 return -ENOMEM;
355 355
@@ -429,7 +429,7 @@ fail_put_user_pages:
429 SetPageDirty(user_pages[i]); 429 SetPageDirty(user_pages[i]);
430 page_cache_release(user_pages[i]); 430 page_cache_release(user_pages[i]);
431 } 431 }
432 kfree(user_pages); 432 drm_free_large(user_pages);
433 433
434 return ret; 434 return ret;
435} 435}
@@ -649,7 +649,7 @@ i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
649 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE; 649 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
650 num_pages = last_data_page - first_data_page + 1; 650 num_pages = last_data_page - first_data_page + 1;
651 651
652 user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL); 652 user_pages = drm_calloc_large(num_pages, sizeof(struct page *));
653 if (user_pages == NULL) 653 if (user_pages == NULL)
654 return -ENOMEM; 654 return -ENOMEM;
655 655
@@ -719,7 +719,7 @@ out_unlock:
719out_unpin_pages: 719out_unpin_pages:
720 for (i = 0; i < pinned_pages; i++) 720 for (i = 0; i < pinned_pages; i++)
721 page_cache_release(user_pages[i]); 721 page_cache_release(user_pages[i]);
722 kfree(user_pages); 722 drm_free_large(user_pages);
723 723
724 return ret; 724 return ret;
725} 725}
@@ -824,7 +824,7 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
824 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE; 824 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
825 num_pages = last_data_page - first_data_page + 1; 825 num_pages = last_data_page - first_data_page + 1;
826 826
827 user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL); 827 user_pages = drm_calloc_large(num_pages, sizeof(struct page *));
828 if (user_pages == NULL) 828 if (user_pages == NULL)
829 return -ENOMEM; 829 return -ENOMEM;
830 830
@@ -902,7 +902,7 @@ fail_unlock:
902fail_put_user_pages: 902fail_put_user_pages:
903 for (i = 0; i < pinned_pages; i++) 903 for (i = 0; i < pinned_pages; i++)
904 page_cache_release(user_pages[i]); 904 page_cache_release(user_pages[i]);
905 kfree(user_pages); 905 drm_free_large(user_pages);
906 906
907 return ret; 907 return ret;
908} 908}
@@ -1145,7 +1145,14 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1145 mutex_unlock(&dev->struct_mutex); 1145 mutex_unlock(&dev->struct_mutex);
1146 return VM_FAULT_SIGBUS; 1146 return VM_FAULT_SIGBUS;
1147 } 1147 }
1148 list_add(&obj_priv->list, &dev_priv->mm.inactive_list); 1148
1149 ret = i915_gem_object_set_to_gtt_domain(obj, write);
1150 if (ret) {
1151 mutex_unlock(&dev->struct_mutex);
1152 return VM_FAULT_SIGBUS;
1153 }
1154
1155 list_add_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
1149 } 1156 }
1150 1157
1151 /* Need a new fence register? */ 1158 /* Need a new fence register? */
@@ -1375,7 +1382,7 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data,
1375 mutex_unlock(&dev->struct_mutex); 1382 mutex_unlock(&dev->struct_mutex);
1376 return ret; 1383 return ret;
1377 } 1384 }
1378 list_add(&obj_priv->list, &dev_priv->mm.inactive_list); 1385 list_add_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
1379 } 1386 }
1380 1387
1381 drm_gem_object_unreference(obj); 1388 drm_gem_object_unreference(obj);
@@ -1408,9 +1415,7 @@ i915_gem_object_put_pages(struct drm_gem_object *obj)
1408 } 1415 }
1409 obj_priv->dirty = 0; 1416 obj_priv->dirty = 0;
1410 1417
1411 drm_free(obj_priv->pages, 1418 drm_free_large(obj_priv->pages);
1412 page_count * sizeof(struct page *),
1413 DRM_MEM_DRIVER);
1414 obj_priv->pages = NULL; 1419 obj_priv->pages = NULL;
1415} 1420}
1416 1421
@@ -1691,11 +1696,20 @@ static int
1691i915_wait_request(struct drm_device *dev, uint32_t seqno) 1696i915_wait_request(struct drm_device *dev, uint32_t seqno)
1692{ 1697{
1693 drm_i915_private_t *dev_priv = dev->dev_private; 1698 drm_i915_private_t *dev_priv = dev->dev_private;
1699 u32 ier;
1694 int ret = 0; 1700 int ret = 0;
1695 1701
1696 BUG_ON(seqno == 0); 1702 BUG_ON(seqno == 0);
1697 1703
1698 if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) { 1704 if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) {
1705 ier = I915_READ(IER);
1706 if (!ier) {
1707 DRM_ERROR("something (likely vbetool) disabled "
1708 "interrupts, re-enabling\n");
1709 i915_driver_irq_preinstall(dev);
1710 i915_driver_irq_postinstall(dev);
1711 }
1712
1699 dev_priv->mm.waiting_gem_seqno = seqno; 1713 dev_priv->mm.waiting_gem_seqno = seqno;
1700 i915_user_irq_get(dev); 1714 i915_user_irq_get(dev);
1701 ret = wait_event_interruptible(dev_priv->irq_queue, 1715 ret = wait_event_interruptible(dev_priv->irq_queue,
@@ -2015,8 +2029,7 @@ i915_gem_object_get_pages(struct drm_gem_object *obj)
2015 */ 2029 */
2016 page_count = obj->size / PAGE_SIZE; 2030 page_count = obj->size / PAGE_SIZE;
2017 BUG_ON(obj_priv->pages != NULL); 2031 BUG_ON(obj_priv->pages != NULL);
2018 obj_priv->pages = drm_calloc(page_count, sizeof(struct page *), 2032 obj_priv->pages = drm_calloc_large(page_count, sizeof(struct page *));
2019 DRM_MEM_DRIVER);
2020 if (obj_priv->pages == NULL) { 2033 if (obj_priv->pages == NULL) {
2021 DRM_ERROR("Faled to allocate page list\n"); 2034 DRM_ERROR("Faled to allocate page list\n");
2022 obj_priv->pages_refcount--; 2035 obj_priv->pages_refcount--;
@@ -2122,8 +2135,10 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
2122 return; 2135 return;
2123 } 2136 }
2124 2137
2125 pitch_val = (obj_priv->stride / 128) - 1; 2138 pitch_val = obj_priv->stride / 128;
2126 WARN_ON(pitch_val & ~0x0000000f); 2139 pitch_val = ffs(pitch_val) - 1;
2140 WARN_ON(pitch_val > I830_FENCE_MAX_PITCH_VAL);
2141
2127 val = obj_priv->gtt_offset; 2142 val = obj_priv->gtt_offset;
2128 if (obj_priv->tiling_mode == I915_TILING_Y) 2143 if (obj_priv->tiling_mode == I915_TILING_Y)
2129 val |= 1 << I830_FENCE_TILING_Y_SHIFT; 2144 val |= 1 << I830_FENCE_TILING_Y_SHIFT;
@@ -2415,6 +2430,16 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
2415 if (obj_priv->pages == NULL) 2430 if (obj_priv->pages == NULL)
2416 return; 2431 return;
2417 2432
2433 /* XXX: The 865 in particular appears to be weird in how it handles
2434 * cache flushing. We haven't figured it out, but the
2435 * clflush+agp_chipset_flush doesn't appear to successfully get the
2436 * data visible to the PGU, while wbinvd + agp_chipset_flush does.
2437 */
2438 if (IS_I865G(obj->dev)) {
2439 wbinvd();
2440 return;
2441 }
2442
2418 drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE); 2443 drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE);
2419} 2444}
2420 2445
@@ -3102,7 +3127,7 @@ i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
3102 reloc_count += exec_list[i].relocation_count; 3127 reloc_count += exec_list[i].relocation_count;
3103 } 3128 }
3104 3129
3105 *relocs = drm_calloc(reloc_count, sizeof(**relocs), DRM_MEM_DRIVER); 3130 *relocs = drm_calloc_large(reloc_count, sizeof(**relocs));
3106 if (*relocs == NULL) 3131 if (*relocs == NULL)
3107 return -ENOMEM; 3132 return -ENOMEM;
3108 3133
@@ -3116,8 +3141,7 @@ i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
3116 exec_list[i].relocation_count * 3141 exec_list[i].relocation_count *
3117 sizeof(**relocs)); 3142 sizeof(**relocs));
3118 if (ret != 0) { 3143 if (ret != 0) {
3119 drm_free(*relocs, reloc_count * sizeof(**relocs), 3144 drm_free_large(*relocs);
3120 DRM_MEM_DRIVER);
3121 *relocs = NULL; 3145 *relocs = NULL;
3122 return -EFAULT; 3146 return -EFAULT;
3123 } 3147 }
@@ -3156,7 +3180,7 @@ i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object *exec_list,
3156 } 3180 }
3157 3181
3158err: 3182err:
3159 drm_free(relocs, reloc_count * sizeof(*relocs), DRM_MEM_DRIVER); 3183 drm_free_large(relocs);
3160 3184
3161 return ret; 3185 return ret;
3162} 3186}
@@ -3189,10 +3213,8 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
3189 return -EINVAL; 3213 return -EINVAL;
3190 } 3214 }
3191 /* Copy in the exec list from userland */ 3215 /* Copy in the exec list from userland */
3192 exec_list = drm_calloc(sizeof(*exec_list), args->buffer_count, 3216 exec_list = drm_calloc_large(sizeof(*exec_list), args->buffer_count);
3193 DRM_MEM_DRIVER); 3217 object_list = drm_calloc_large(sizeof(*object_list), args->buffer_count);
3194 object_list = drm_calloc(sizeof(*object_list), args->buffer_count,
3195 DRM_MEM_DRIVER);
3196 if (exec_list == NULL || object_list == NULL) { 3218 if (exec_list == NULL || object_list == NULL) {
3197 DRM_ERROR("Failed to allocate exec or object list " 3219 DRM_ERROR("Failed to allocate exec or object list "
3198 "for %d buffers\n", 3220 "for %d buffers\n",
@@ -3453,10 +3475,8 @@ err:
3453 } 3475 }
3454 3476
3455pre_mutex_err: 3477pre_mutex_err:
3456 drm_free(object_list, sizeof(*object_list) * args->buffer_count, 3478 drm_free_large(object_list);
3457 DRM_MEM_DRIVER); 3479 drm_free_large(exec_list);
3458 drm_free(exec_list, sizeof(*exec_list) * args->buffer_count,
3459 DRM_MEM_DRIVER);
3460 drm_free(cliprects, sizeof(*cliprects) * args->num_cliprects, 3480 drm_free(cliprects, sizeof(*cliprects) * args->num_cliprects,
3461 DRM_MEM_DRIVER); 3481 DRM_MEM_DRIVER);
3462 3482
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 52a059354e8..540dd336e6e 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -213,7 +213,8 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
213 if (tiling_mode == I915_TILING_NONE) 213 if (tiling_mode == I915_TILING_NONE)
214 return true; 214 return true;
215 215
216 if (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)) 216 if (!IS_I9XX(dev) ||
217 (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
217 tile_width = 128; 218 tile_width = 128;
218 else 219 else
219 tile_width = 512; 220 tile_width = 512;
@@ -225,11 +226,18 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
225 if (stride / 128 > I965_FENCE_MAX_PITCH_VAL) 226 if (stride / 128 > I965_FENCE_MAX_PITCH_VAL)
226 return false; 227 return false;
227 } else if (IS_I9XX(dev)) { 228 } else if (IS_I9XX(dev)) {
228 if (stride / tile_width > I830_FENCE_MAX_PITCH_VAL || 229 uint32_t pitch_val = ffs(stride / tile_width) - 1;
230
231 /* XXX: For Y tiling, FENCE_MAX_PITCH_VAL is actually 6 (8KB)
232 * instead of 4 (2KB) on 945s.
233 */
234 if (pitch_val > I915_FENCE_MAX_PITCH_VAL ||
229 size > (I830_FENCE_MAX_SIZE_VAL << 20)) 235 size > (I830_FENCE_MAX_SIZE_VAL << 20))
230 return false; 236 return false;
231 } else { 237 } else {
232 if (stride / 128 > I830_FENCE_MAX_PITCH_VAL || 238 uint32_t pitch_val = ffs(stride / tile_width) - 1;
239
240 if (pitch_val > I830_FENCE_MAX_PITCH_VAL ||
233 size > (I830_FENCE_MAX_SIZE_VAL << 19)) 241 size > (I830_FENCE_MAX_SIZE_VAL << 19))
234 return false; 242 return false;
235 } 243 }
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 52119473226..375569d01d0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -190,7 +190,8 @@
190#define I830_FENCE_SIZE_BITS(size) ((ffs((size) >> 19) - 1) << 8) 190#define I830_FENCE_SIZE_BITS(size) ((ffs((size) >> 19) - 1) << 8)
191#define I830_FENCE_PITCH_SHIFT 4 191#define I830_FENCE_PITCH_SHIFT 4
192#define I830_FENCE_REG_VALID (1<<0) 192#define I830_FENCE_REG_VALID (1<<0)
193#define I830_FENCE_MAX_PITCH_VAL 0x10 193#define I915_FENCE_MAX_PITCH_VAL 0x10
194#define I830_FENCE_MAX_PITCH_VAL 6
194#define I830_FENCE_MAX_SIZE_VAL (1<<8) 195#define I830_FENCE_MAX_SIZE_VAL (1<<8)
195 196
196#define I915_FENCE_START_MASK 0x0ff00000 197#define I915_FENCE_START_MASK 0x0ff00000
@@ -526,6 +527,7 @@
526#define DPLLA_INPUT_BUFFER_ENABLE (1 << 0) 527#define DPLLA_INPUT_BUFFER_ENABLE (1 << 0)
527#define D_STATE 0x6104 528#define D_STATE 0x6104
528#define CG_2D_DIS 0x6200 529#define CG_2D_DIS 0x6200
530#define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24)
529#define CG_3D_DIS 0x6204 531#define CG_3D_DIS 0x6204
530 532
531/* 533/*
@@ -1409,9 +1411,25 @@
1409 1411
1410/* Cursor A & B regs */ 1412/* Cursor A & B regs */
1411#define CURACNTR 0x70080 1413#define CURACNTR 0x70080
1414/* Old style CUR*CNTR flags (desktop 8xx) */
1415#define CURSOR_ENABLE 0x80000000
1416#define CURSOR_GAMMA_ENABLE 0x40000000
1417#define CURSOR_STRIDE_MASK 0x30000000
1418#define CURSOR_FORMAT_SHIFT 24
1419#define CURSOR_FORMAT_MASK (0x07 << CURSOR_FORMAT_SHIFT)
1420#define CURSOR_FORMAT_2C (0x00 << CURSOR_FORMAT_SHIFT)
1421#define CURSOR_FORMAT_3C (0x01 << CURSOR_FORMAT_SHIFT)
1422#define CURSOR_FORMAT_4C (0x02 << CURSOR_FORMAT_SHIFT)
1423#define CURSOR_FORMAT_ARGB (0x04 << CURSOR_FORMAT_SHIFT)
1424#define CURSOR_FORMAT_XRGB (0x05 << CURSOR_FORMAT_SHIFT)
1425/* New style CUR*CNTR flags */
1426#define CURSOR_MODE 0x27
1412#define CURSOR_MODE_DISABLE 0x00 1427#define CURSOR_MODE_DISABLE 0x00
1413#define CURSOR_MODE_64_32B_AX 0x07 1428#define CURSOR_MODE_64_32B_AX 0x07
1414#define CURSOR_MODE_64_ARGB_AX ((1 << 5) | CURSOR_MODE_64_32B_AX) 1429#define CURSOR_MODE_64_ARGB_AX ((1 << 5) | CURSOR_MODE_64_32B_AX)
1430#define MCURSOR_PIPE_SELECT (1 << 28)
1431#define MCURSOR_PIPE_A 0x00
1432#define MCURSOR_PIPE_B (1 << 28)
1415#define MCURSOR_GAMMA_ENABLE (1 << 26) 1433#define MCURSOR_GAMMA_ENABLE (1 << 26)
1416#define CURABASE 0x70084 1434#define CURABASE 0x70084
1417#define CURAPOS 0x70088 1435#define CURAPOS 0x70088
@@ -1419,6 +1437,7 @@
1419#define CURSOR_POS_SIGN 0x8000 1437#define CURSOR_POS_SIGN 0x8000
1420#define CURSOR_X_SHIFT 0 1438#define CURSOR_X_SHIFT 0
1421#define CURSOR_Y_SHIFT 16 1439#define CURSOR_Y_SHIFT 16
1440#define CURSIZE 0x700a0
1422#define CURBCNTR 0x700c0 1441#define CURBCNTR 0x700c0
1423#define CURBBASE 0x700c4 1442#define CURBBASE 0x700c4
1424#define CURBPOS 0x700c8 1443#define CURBPOS 0x700c8
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index d669cc2b42c..ce8a21344a7 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -349,6 +349,18 @@ int i915_save_state(struct drm_device *dev)
349 for (i = 0; i < 3; i++) 349 for (i = 0; i < 3; i++)
350 dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2)); 350 dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2));
351 351
352 /* Fences */
353 if (IS_I965G(dev)) {
354 for (i = 0; i < 16; i++)
355 dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_965_0 + (i * 8));
356 } else {
357 for (i = 0; i < 8; i++)
358 dev_priv->saveFENCE[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
359
360 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
361 for (i = 0; i < 8; i++)
362 dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
363 }
352 i915_save_vga(dev); 364 i915_save_vga(dev);
353 365
354 return 0; 366 return 0;
@@ -371,6 +383,18 @@ int i915_restore_state(struct drm_device *dev)
371 /* Display arbitration */ 383 /* Display arbitration */
372 I915_WRITE(DSPARB, dev_priv->saveDSPARB); 384 I915_WRITE(DSPARB, dev_priv->saveDSPARB);
373 385
386 /* Fences */
387 if (IS_I965G(dev)) {
388 for (i = 0; i < 16; i++)
389 I915_WRITE64(FENCE_REG_965_0 + (i * 8), dev_priv->saveFENCE[i]);
390 } else {
391 for (i = 0; i < 8; i++)
392 I915_WRITE(FENCE_REG_830_0 + (i * 4), dev_priv->saveFENCE[i]);
393 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
394 for (i = 0; i < 8; i++)
395 I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]);
396 }
397
374 /* Pipe & plane A info */ 398 /* Pipe & plane A info */
375 /* Prime the clock */ 399 /* Prime the clock */
376 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { 400 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index fc28e2bbd54..9d78cff33b2 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -57,9 +57,43 @@ find_section(struct bdb_header *bdb, int section_id)
57 return NULL; 57 return NULL;
58} 58}
59 59
60/* Try to find panel data */
61static void 60static void
62parse_panel_data(struct drm_i915_private *dev_priv, struct bdb_header *bdb) 61fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
62 struct lvds_dvo_timing *dvo_timing)
63{
64 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
65 dvo_timing->hactive_lo;
66 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
67 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
68 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
69 dvo_timing->hsync_pulse_width;
70 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
71 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
72
73 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
74 dvo_timing->vactive_lo;
75 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
76 dvo_timing->vsync_off;
77 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
78 dvo_timing->vsync_pulse_width;
79 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
80 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
81 panel_fixed_mode->clock = dvo_timing->clock * 10;
82 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
83
84 /* Some VBTs have bogus h/vtotal values */
85 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
86 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
87 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
88 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
89
90 drm_mode_set_name(panel_fixed_mode);
91}
92
93/* Try to find integrated panel data */
94static void
95parse_lfp_panel_data(struct drm_i915_private *dev_priv,
96 struct bdb_header *bdb)
63{ 97{
64 struct bdb_lvds_options *lvds_options; 98 struct bdb_lvds_options *lvds_options;
65 struct bdb_lvds_lfp_data *lvds_lfp_data; 99 struct bdb_lvds_lfp_data *lvds_lfp_data;
@@ -91,38 +125,45 @@ parse_panel_data(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
91 panel_fixed_mode = drm_calloc(1, sizeof(*panel_fixed_mode), 125 panel_fixed_mode = drm_calloc(1, sizeof(*panel_fixed_mode),
92 DRM_MEM_DRIVER); 126 DRM_MEM_DRIVER);
93 127
94 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 128 fill_detail_timing_data(panel_fixed_mode, dvo_timing);
95 dvo_timing->hactive_lo;
96 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
97 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
98 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
99 dvo_timing->hsync_pulse_width;
100 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
101 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
102 129
103 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 130 dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
104 dvo_timing->vactive_lo;
105 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
106 dvo_timing->vsync_off;
107 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
108 dvo_timing->vsync_pulse_width;
109 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
110 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
111 panel_fixed_mode->clock = dvo_timing->clock * 10;
112 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
113 131
114 /* Some VBTs have bogus h/vtotal values */ 132 DRM_DEBUG("Found panel mode in BIOS VBT tables:\n");
115 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 133 drm_mode_debug_printmodeline(panel_fixed_mode);
116 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
117 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
118 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
119 134
120 drm_mode_set_name(panel_fixed_mode); 135 return;
136}
137
138/* Try to find sdvo panel data */
139static void
140parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
141 struct bdb_header *bdb)
142{
143 struct bdb_sdvo_lvds_options *sdvo_lvds_options;
144 struct lvds_dvo_timing *dvo_timing;
145 struct drm_display_mode *panel_fixed_mode;
121 146
122 dev_priv->vbt_mode = panel_fixed_mode; 147 dev_priv->sdvo_lvds_vbt_mode = NULL;
123 148
124 DRM_DEBUG("Found panel mode in BIOS VBT tables:\n"); 149 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
125 drm_mode_debug_printmodeline(panel_fixed_mode); 150 if (!sdvo_lvds_options)
151 return;
152
153 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
154 if (!dvo_timing)
155 return;
156
157 panel_fixed_mode = drm_calloc(1, sizeof(*panel_fixed_mode),
158 DRM_MEM_DRIVER);
159
160 if (!panel_fixed_mode)
161 return;
162
163 fill_detail_timing_data(panel_fixed_mode,
164 dvo_timing + sdvo_lvds_options->panel_type);
165
166 dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
126 167
127 return; 168 return;
128} 169}
@@ -199,7 +240,8 @@ intel_init_bios(struct drm_device *dev)
199 240
200 /* Grab useful general definitions */ 241 /* Grab useful general definitions */
201 parse_general_features(dev_priv, bdb); 242 parse_general_features(dev_priv, bdb);
202 parse_panel_data(dev_priv, bdb); 243 parse_lfp_panel_data(dev_priv, bdb);
244 parse_sdvo_panel_data(dev_priv, bdb);
203 245
204 pci_unmap_rom(pdev, bios); 246 pci_unmap_rom(pdev, bios);
205 247
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index de621aad85b..8ca2cde1580 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -279,6 +279,23 @@ struct vch_bdb_22 {
279 struct vch_panel_data panels[16]; 279 struct vch_panel_data panels[16];
280} __attribute__((packed)); 280} __attribute__((packed));
281 281
282struct bdb_sdvo_lvds_options {
283 u8 panel_backlight;
284 u8 h40_set_panel_type;
285 u8 panel_type;
286 u8 ssc_clk_freq;
287 u16 als_low_trip;
288 u16 als_high_trip;
289 u8 sclalarcoeff_tab_row_num;
290 u8 sclalarcoeff_tab_row_size;
291 u8 coefficient[8];
292 u8 panel_misc_bits_1;
293 u8 panel_misc_bits_2;
294 u8 panel_misc_bits_3;
295 u8 panel_misc_bits_4;
296} __attribute__((packed));
297
298
282bool intel_init_bios(struct drm_device *dev); 299bool intel_init_bios(struct drm_device *dev);
283 300
284/* 301/*
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 9bdd959260a..640f5158eff 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -161,7 +161,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
161 hotplug_en &= CRT_FORCE_HOTPLUG_MASK; 161 hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
162 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; 162 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
163 163
164 if (IS_GM45(dev)) 164 if (IS_G4X(dev))
165 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64; 165 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
166 166
167 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50; 167 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
@@ -198,9 +198,142 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector)
198 return intel_ddc_probe(intel_output); 198 return intel_ddc_probe(intel_output);
199} 199}
200 200
201static enum drm_connector_status
202intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
203{
204 struct drm_encoder *encoder = &intel_output->enc;
205 struct drm_device *dev = encoder->dev;
206 struct drm_i915_private *dev_priv = dev->dev_private;
207 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
208 uint32_t pipe = intel_crtc->pipe;
209 uint32_t save_bclrpat;
210 uint32_t save_vtotal;
211 uint32_t vtotal, vactive;
212 uint32_t vsample;
213 uint32_t vblank, vblank_start, vblank_end;
214 uint32_t dsl;
215 uint32_t bclrpat_reg;
216 uint32_t vtotal_reg;
217 uint32_t vblank_reg;
218 uint32_t vsync_reg;
219 uint32_t pipeconf_reg;
220 uint32_t pipe_dsl_reg;
221 uint8_t st00;
222 enum drm_connector_status status;
223
224 if (pipe == 0) {
225 bclrpat_reg = BCLRPAT_A;
226 vtotal_reg = VTOTAL_A;
227 vblank_reg = VBLANK_A;
228 vsync_reg = VSYNC_A;
229 pipeconf_reg = PIPEACONF;
230 pipe_dsl_reg = PIPEADSL;
231 } else {
232 bclrpat_reg = BCLRPAT_B;
233 vtotal_reg = VTOTAL_B;
234 vblank_reg = VBLANK_B;
235 vsync_reg = VSYNC_B;
236 pipeconf_reg = PIPEBCONF;
237 pipe_dsl_reg = PIPEBDSL;
238 }
239
240 save_bclrpat = I915_READ(bclrpat_reg);
241 save_vtotal = I915_READ(vtotal_reg);
242 vblank = I915_READ(vblank_reg);
243
244 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
245 vactive = (save_vtotal & 0x7ff) + 1;
246
247 vblank_start = (vblank & 0xfff) + 1;
248 vblank_end = ((vblank >> 16) & 0xfff) + 1;
249
250 /* Set the border color to purple. */
251 I915_WRITE(bclrpat_reg, 0x500050);
252
253 if (IS_I9XX(dev)) {
254 uint32_t pipeconf = I915_READ(pipeconf_reg);
255 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
256 /* Wait for next Vblank to substitue
257 * border color for Color info */
258 intel_wait_for_vblank(dev);
259 st00 = I915_READ8(VGA_MSR_WRITE);
260 status = ((st00 & (1 << 4)) != 0) ?
261 connector_status_connected :
262 connector_status_disconnected;
263
264 I915_WRITE(pipeconf_reg, pipeconf);
265 } else {
266 bool restore_vblank = false;
267 int count, detect;
268
269 /*
270 * If there isn't any border, add some.
271 * Yes, this will flicker
272 */
273 if (vblank_start <= vactive && vblank_end >= vtotal) {
274 uint32_t vsync = I915_READ(vsync_reg);
275 uint32_t vsync_start = (vsync & 0xffff) + 1;
276
277 vblank_start = vsync_start;
278 I915_WRITE(vblank_reg,
279 (vblank_start - 1) |
280 ((vblank_end - 1) << 16));
281 restore_vblank = true;
282 }
283 /* sample in the vertical border, selecting the larger one */
284 if (vblank_start - vactive >= vtotal - vblank_end)
285 vsample = (vblank_start + vactive) >> 1;
286 else
287 vsample = (vtotal + vblank_end) >> 1;
288
289 /*
290 * Wait for the border to be displayed
291 */
292 while (I915_READ(pipe_dsl_reg) >= vactive)
293 ;
294 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
295 ;
296 /*
297 * Watch ST00 for an entire scanline
298 */
299 detect = 0;
300 count = 0;
301 do {
302 count++;
303 /* Read the ST00 VGA status register */
304 st00 = I915_READ8(VGA_MSR_WRITE);
305 if (st00 & (1 << 4))
306 detect++;
307 } while ((I915_READ(pipe_dsl_reg) == dsl));
308
309 /* restore vblank if necessary */
310 if (restore_vblank)
311 I915_WRITE(vblank_reg, vblank);
312 /*
313 * If more than 3/4 of the scanline detected a monitor,
314 * then it is assumed to be present. This works even on i830,
315 * where there isn't any way to force the border color across
316 * the screen
317 */
318 status = detect * 4 > count * 3 ?
319 connector_status_connected :
320 connector_status_disconnected;
321 }
322
323 /* Restore previous settings */
324 I915_WRITE(bclrpat_reg, save_bclrpat);
325
326 return status;
327}
328
201static enum drm_connector_status intel_crt_detect(struct drm_connector *connector) 329static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
202{ 330{
203 struct drm_device *dev = connector->dev; 331 struct drm_device *dev = connector->dev;
332 struct intel_output *intel_output = to_intel_output(connector);
333 struct drm_encoder *encoder = &intel_output->enc;
334 struct drm_crtc *crtc;
335 int dpms_mode;
336 enum drm_connector_status status;
204 337
205 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) { 338 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
206 if (intel_crt_detect_hotplug(connector)) 339 if (intel_crt_detect_hotplug(connector))
@@ -212,8 +345,20 @@ static enum drm_connector_status intel_crt_detect(struct drm_connector *connecto
212 if (intel_crt_detect_ddc(connector)) 345 if (intel_crt_detect_ddc(connector))
213 return connector_status_connected; 346 return connector_status_connected;
214 347
215 /* TODO use load detect */ 348 /* for pre-945g platforms use load detect */
216 return connector_status_unknown; 349 if (encoder->crtc && encoder->crtc->enabled) {
350 status = intel_crt_load_detect(encoder->crtc, intel_output);
351 } else {
352 crtc = intel_get_load_detect_pipe(intel_output,
353 NULL, &dpms_mode);
354 if (crtc) {
355 status = intel_crt_load_detect(crtc, intel_output);
356 intel_release_load_detect_pipe(intel_output, dpms_mode);
357 } else
358 status = connector_status_unknown;
359 }
360
361 return status;
217} 362}
218 363
219static void intel_crt_destroy(struct drm_connector *connector) 364static void intel_crt_destroy(struct drm_connector *connector)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bdcda36953b..c9d6f10ba92 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1357,7 +1357,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
1357 int pipe = intel_crtc->pipe; 1357 int pipe = intel_crtc->pipe;
1358 uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR; 1358 uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
1359 uint32_t base = (pipe == 0) ? CURABASE : CURBBASE; 1359 uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
1360 uint32_t temp; 1360 uint32_t temp = I915_READ(control);
1361 size_t addr; 1361 size_t addr;
1362 int ret; 1362 int ret;
1363 1363
@@ -1366,7 +1366,12 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
1366 /* if we want to turn off the cursor ignore width and height */ 1366 /* if we want to turn off the cursor ignore width and height */
1367 if (!handle) { 1367 if (!handle) {
1368 DRM_DEBUG("cursor off\n"); 1368 DRM_DEBUG("cursor off\n");
1369 temp = CURSOR_MODE_DISABLE; 1369 if (IS_MOBILE(dev) || IS_I9XX(dev)) {
1370 temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
1371 temp |= CURSOR_MODE_DISABLE;
1372 } else {
1373 temp &= ~(CURSOR_ENABLE | CURSOR_GAMMA_ENABLE);
1374 }
1370 addr = 0; 1375 addr = 0;
1371 bo = NULL; 1376 bo = NULL;
1372 mutex_lock(&dev->struct_mutex); 1377 mutex_lock(&dev->struct_mutex);
@@ -1409,10 +1414,19 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
1409 addr = obj_priv->phys_obj->handle->busaddr; 1414 addr = obj_priv->phys_obj->handle->busaddr;
1410 } 1415 }
1411 1416
1412 temp = 0; 1417 if (!IS_I9XX(dev))
1413 /* set the pipe for the cursor */ 1418 I915_WRITE(CURSIZE, (height << 12) | width);
1414 temp |= (pipe << 28); 1419
1415 temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; 1420 /* Hooray for CUR*CNTR differences */
1421 if (IS_MOBILE(dev) || IS_I9XX(dev)) {
1422 temp &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
1423 temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
1424 temp |= (pipe << 28); /* Connect to correct pipe */
1425 } else {
1426 temp &= ~(CURSOR_FORMAT_MASK);
1427 temp |= CURSOR_ENABLE;
1428 temp |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE;
1429 }
1416 1430
1417 finish: 1431 finish:
1418 I915_WRITE(control, temp); 1432 I915_WRITE(control, temp);
@@ -1804,6 +1818,37 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
1804 } 1818 }
1805} 1819}
1806 1820
1821int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
1822 struct drm_file *file_priv)
1823{
1824 drm_i915_private_t *dev_priv = dev->dev_private;
1825 struct drm_i915_get_pipe_from_crtc_id *pipe_from_crtc_id = data;
1826 struct drm_crtc *crtc = NULL;
1827 int pipe = -1;
1828
1829 if (!dev_priv) {
1830 DRM_ERROR("called with no initialization\n");
1831 return -EINVAL;
1832 }
1833
1834 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1835 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1836 if (crtc->base.id == pipe_from_crtc_id->crtc_id) {
1837 pipe = intel_crtc->pipe;
1838 break;
1839 }
1840 }
1841
1842 if (pipe == -1) {
1843 DRM_ERROR("no such CRTC id\n");
1844 return -EINVAL;
1845 }
1846
1847 pipe_from_crtc_id->pipe = pipe;
1848
1849 return 0;
1850}
1851
1807struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe) 1852struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe)
1808{ 1853{
1809 struct drm_crtc *crtc = NULL; 1854 struct drm_crtc *crtc = NULL;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 957daef8edf..cd4b9c5f715 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -109,7 +109,7 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
109void intel_i2c_destroy(struct intel_i2c_chan *chan); 109void intel_i2c_destroy(struct intel_i2c_chan *chan);
110int intel_ddc_get_modes(struct intel_output *intel_output); 110int intel_ddc_get_modes(struct intel_output *intel_output);
111extern bool intel_ddc_probe(struct intel_output *intel_output); 111extern bool intel_ddc_probe(struct intel_output *intel_output);
112 112void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
113extern void intel_crt_init(struct drm_device *dev); 113extern void intel_crt_init(struct drm_device *dev);
114extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg); 114extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
115extern bool intel_sdvo_init(struct drm_device *dev, int output_device); 115extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
@@ -125,6 +125,8 @@ extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
125 125
126extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, 126extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
127 struct drm_crtc *crtc); 127 struct drm_crtc *crtc);
128int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
129 struct drm_file *file_priv);
128extern void intel_wait_for_vblank(struct drm_device *dev); 130extern void intel_wait_for_vblank(struct drm_device *dev);
129extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe); 131extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe);
130extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, 132extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output,
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 3e094beecb9..e4652dcdd9b 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -864,7 +864,7 @@ static void intelfb_sysrq(int dummy1, struct tty_struct *dummy3)
864 864
865static struct sysrq_key_op sysrq_intelfb_restore_op = { 865static struct sysrq_key_op sysrq_intelfb_restore_op = {
866 .handler = intelfb_sysrq, 866 .handler = intelfb_sysrq,
867 .help_msg = "force-fb(G)", 867 .help_msg = "force-fb(V)",
868 .action_msg = "Restore framebuffer console", 868 .action_msg = "Restore framebuffer console",
869}; 869};
870 870
@@ -898,7 +898,7 @@ int intelfb_probe(struct drm_device *dev)
898 ret = intelfb_single_fb_probe(dev); 898 ret = intelfb_single_fb_probe(dev);
899 } 899 }
900 900
901 register_sysrq_key('g', &sysrq_intelfb_restore_op); 901 register_sysrq_key('v', &sysrq_intelfb_restore_op);
902 902
903 return ret; 903 return ret;
904} 904}
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 55037422538..d0983bb93a1 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -155,11 +155,18 @@ intel_hdmi_detect(struct drm_connector *connector)
155 155
156 temp = I915_READ(PORT_HOTPLUG_EN); 156 temp = I915_READ(PORT_HOTPLUG_EN);
157 157
158 I915_WRITE(PORT_HOTPLUG_EN, 158 switch (hdmi_priv->sdvox_reg) {
159 temp | 159 case SDVOB:
160 HDMIB_HOTPLUG_INT_EN | 160 temp |= HDMIB_HOTPLUG_INT_EN;
161 HDMIC_HOTPLUG_INT_EN | 161 break;
162 HDMID_HOTPLUG_INT_EN); 162 case SDVOC:
163 temp |= HDMIC_HOTPLUG_INT_EN;
164 break;
165 default:
166 return connector_status_unknown;
167 }
168
169 I915_WRITE(PORT_HOTPLUG_EN, temp);
163 170
164 POSTING_READ(PORT_HOTPLUG_EN); 171 POSTING_READ(PORT_HOTPLUG_EN);
165 172
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 5ee9d4c2575..f7061f68d05 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -34,6 +34,21 @@
34#include "i915_drm.h" 34#include "i915_drm.h"
35#include "i915_drv.h" 35#include "i915_drv.h"
36 36
37void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
38{
39 struct drm_i915_private *dev_priv = dev->dev_private;
40
41 /* When using bit bashing for I2C, this bit needs to be set to 1 */
42 if (!IS_IGD(dev))
43 return;
44 if (enable)
45 I915_WRITE(CG_2D_DIS,
46 I915_READ(CG_2D_DIS) | DPCUNIT_CLOCK_GATE_DISABLE);
47 else
48 I915_WRITE(CG_2D_DIS,
49 I915_READ(CG_2D_DIS) & (~DPCUNIT_CLOCK_GATE_DISABLE));
50}
51
37/* 52/*
38 * Intel GPIO access functions 53 * Intel GPIO access functions
39 */ 54 */
@@ -153,8 +168,10 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
153 goto out_free; 168 goto out_free;
154 169
155 /* JJJ: raise SCL and SDA? */ 170 /* JJJ: raise SCL and SDA? */
171 intel_i2c_quirk_set(dev, true);
156 set_data(chan, 1); 172 set_data(chan, 1);
157 set_clock(chan, 1); 173 set_clock(chan, 1);
174 intel_i2c_quirk_set(dev, false);
158 udelay(20); 175 udelay(20);
159 176
160 return chan; 177 return chan;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 6619f26e46a..53731f0ffcb 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -384,7 +384,51 @@ static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
384 .destroy = intel_lvds_enc_destroy, 384 .destroy = intel_lvds_enc_destroy,
385}; 385};
386 386
387static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
388{
389 DRM_DEBUG("Skipping LVDS initialization for %s\n", id->ident);
390 return 1;
391}
387 392
393/* These systems claim to have LVDS, but really don't */
394static const struct dmi_system_id __initdata intel_no_lvds[] = {
395 {
396 .callback = intel_no_lvds_dmi_callback,
397 .ident = "Apple Mac Mini (Core series)",
398 .matches = {
399 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
400 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
401 },
402 },
403 {
404 .callback = intel_no_lvds_dmi_callback,
405 .ident = "Apple Mac Mini (Core 2 series)",
406 .matches = {
407 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
408 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
409 },
410 },
411 {
412 .callback = intel_no_lvds_dmi_callback,
413 .ident = "MSI IM-945GSE-A",
414 .matches = {
415 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
416 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
417 },
418 },
419 {
420 .callback = intel_no_lvds_dmi_callback,
421 .ident = "Dell Studio Hybrid",
422 .matches = {
423 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
424 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
425 },
426 },
427
428 /* FIXME: add a check for the Aopen Mini PC */
429
430 { } /* terminating entry */
431};
388 432
389/** 433/**
390 * intel_lvds_init - setup LVDS connectors on this device 434 * intel_lvds_init - setup LVDS connectors on this device
@@ -404,15 +448,9 @@ void intel_lvds_init(struct drm_device *dev)
404 u32 lvds; 448 u32 lvds;
405 int pipe; 449 int pipe;
406 450
407 /* Blacklist machines that we know falsely report LVDS. */ 451 /* Skip init on machines we know falsely report LVDS */
408 /* FIXME: add a check for the Aopen Mini PC */ 452 if (dmi_check_system(intel_no_lvds))
409
410 /* Apple Mac Mini Core Duo and Mac Mini Core 2 Duo */
411 if(dmi_match(DMI_PRODUCT_NAME, "Macmini1,1") ||
412 dmi_match(DMI_PRODUCT_NAME, "Macmini2,1")) {
413 DRM_DEBUG("Skipping LVDS initialization for Apple Mac Mini\n");
414 return; 453 return;
415 }
416 454
417 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL); 455 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
418 if (!intel_output) { 456 if (!intel_output) {
@@ -473,10 +511,10 @@ void intel_lvds_init(struct drm_device *dev)
473 } 511 }
474 512
475 /* Failed to get EDID, what about VBT? */ 513 /* Failed to get EDID, what about VBT? */
476 if (dev_priv->vbt_mode) { 514 if (dev_priv->lfp_lvds_vbt_mode) {
477 mutex_lock(&dev->mode_config.mutex); 515 mutex_lock(&dev->mode_config.mutex);
478 dev_priv->panel_fixed_mode = 516 dev_priv->panel_fixed_mode =
479 drm_mode_duplicate(dev, dev_priv->vbt_mode); 517 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
480 mutex_unlock(&dev->mode_config.mutex); 518 mutex_unlock(&dev->mode_config.mutex);
481 if (dev_priv->panel_fixed_mode) { 519 if (dev_priv->panel_fixed_mode) {
482 dev_priv->panel_fixed_mode->type |= 520 dev_priv->panel_fixed_mode->type |=
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index 07d7ec97616..e0910fefce8 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -27,6 +27,7 @@
27#include <linux/fb.h> 27#include <linux/fb.h>
28#include "drmP.h" 28#include "drmP.h"
29#include "intel_drv.h" 29#include "intel_drv.h"
30#include "i915_drv.h"
30 31
31/** 32/**
32 * intel_ddc_probe 33 * intel_ddc_probe
@@ -52,7 +53,10 @@ bool intel_ddc_probe(struct intel_output *intel_output)
52 } 53 }
53 }; 54 };
54 55
56 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true);
55 ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2); 57 ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2);
58 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
59
56 if (ret == 2) 60 if (ret == 2)
57 return true; 61 return true;
58 62
@@ -70,8 +74,10 @@ int intel_ddc_get_modes(struct intel_output *intel_output)
70 struct edid *edid; 74 struct edid *edid;
71 int ret = 0; 75 int ret = 0;
72 76
77 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true);
73 edid = drm_get_edid(&intel_output->base, 78 edid = drm_get_edid(&intel_output->base,
74 &intel_output->ddc_bus->adapter); 79 &intel_output->ddc_bus->adapter);
80 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
75 if (edid) { 81 if (edid) {
76 drm_mode_connector_update_edid_property(&intel_output->base, 82 drm_mode_connector_update_edid_property(&intel_output->base,
77 edid); 83 edid);
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 9913651c1e1..f3ef6bfd8ff 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -69,6 +69,10 @@ struct intel_sdvo_priv {
69 * This is set if we treat the device as HDMI, instead of DVI. 69 * This is set if we treat the device as HDMI, instead of DVI.
70 */ 70 */
71 bool is_hdmi; 71 bool is_hdmi;
72 /**
73 * This is set if we detect output of sdvo device as LVDS.
74 */
75 bool is_lvds;
72 76
73 /** 77 /**
74 * Returned SDTV resolutions allowed for the current format, if the 78 * Returned SDTV resolutions allowed for the current format, if the
@@ -1398,10 +1402,8 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect
1398static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1402static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1399{ 1403{
1400 struct intel_output *intel_output = to_intel_output(connector); 1404 struct intel_output *intel_output = to_intel_output(connector);
1401 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1402 1405
1403 /* set the bus switch and get the modes */ 1406 /* set the bus switch and get the modes */
1404 intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
1405 intel_ddc_get_modes(intel_output); 1407 intel_ddc_get_modes(intel_output);
1406 1408
1407#if 0 1409#if 0
@@ -1543,6 +1545,37 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1543 } 1545 }
1544} 1546}
1545 1547
1548static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1549{
1550 struct intel_output *intel_output = to_intel_output(connector);
1551 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1552 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1553
1554 /*
1555 * Attempt to get the mode list from DDC.
1556 * Assume that the preferred modes are
1557 * arranged in priority order.
1558 */
1559 /* set the bus switch and get the modes */
1560 intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
1561 intel_ddc_get_modes(intel_output);
1562 if (list_empty(&connector->probed_modes) == false)
1563 return;
1564
1565 /* Fetch modes from VBT */
1566 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1567 struct drm_display_mode *newmode;
1568 newmode = drm_mode_duplicate(connector->dev,
1569 dev_priv->sdvo_lvds_vbt_mode);
1570 if (newmode != NULL) {
1571 /* Guarantee the mode is preferred */
1572 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1573 DRM_MODE_TYPE_DRIVER);
1574 drm_mode_probed_add(connector, newmode);
1575 }
1576 }
1577}
1578
1546static int intel_sdvo_get_modes(struct drm_connector *connector) 1579static int intel_sdvo_get_modes(struct drm_connector *connector)
1547{ 1580{
1548 struct intel_output *output = to_intel_output(connector); 1581 struct intel_output *output = to_intel_output(connector);
@@ -1550,6 +1583,8 @@ static int intel_sdvo_get_modes(struct drm_connector *connector)
1550 1583
1551 if (sdvo_priv->is_tv) 1584 if (sdvo_priv->is_tv)
1552 intel_sdvo_get_tv_modes(connector); 1585 intel_sdvo_get_tv_modes(connector);
1586 else if (sdvo_priv->is_lvds == true)
1587 intel_sdvo_get_lvds_modes(connector);
1553 else 1588 else
1554 intel_sdvo_get_ddc_modes(connector); 1589 intel_sdvo_get_ddc_modes(connector);
1555 1590
@@ -1564,6 +1599,9 @@ static void intel_sdvo_destroy(struct drm_connector *connector)
1564 1599
1565 if (intel_output->i2c_bus) 1600 if (intel_output->i2c_bus)
1566 intel_i2c_destroy(intel_output->i2c_bus); 1601 intel_i2c_destroy(intel_output->i2c_bus);
1602 if (intel_output->ddc_bus)
1603 intel_i2c_destroy(intel_output->ddc_bus);
1604
1567 drm_sysfs_connector_remove(connector); 1605 drm_sysfs_connector_remove(connector);
1568 drm_connector_cleanup(connector); 1606 drm_connector_cleanup(connector);
1569 kfree(intel_output); 1607 kfree(intel_output);
@@ -1660,12 +1698,56 @@ intel_sdvo_get_digital_encoding_mode(struct intel_output *output)
1660 return true; 1698 return true;
1661} 1699}
1662 1700
1701static struct intel_output *
1702intel_sdvo_chan_to_intel_output(struct intel_i2c_chan *chan)
1703{
1704 struct drm_device *dev = chan->drm_dev;
1705 struct drm_connector *connector;
1706 struct intel_output *intel_output = NULL;
1707
1708 list_for_each_entry(connector,
1709 &dev->mode_config.connector_list, head) {
1710 if (to_intel_output(connector)->ddc_bus == chan) {
1711 intel_output = to_intel_output(connector);
1712 break;
1713 }
1714 }
1715 return intel_output;
1716}
1717
1718static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
1719 struct i2c_msg msgs[], int num)
1720{
1721 struct intel_output *intel_output;
1722 struct intel_sdvo_priv *sdvo_priv;
1723 struct i2c_algo_bit_data *algo_data;
1724 struct i2c_algorithm *algo;
1725
1726 algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data;
1727 intel_output =
1728 intel_sdvo_chan_to_intel_output(
1729 (struct intel_i2c_chan *)(algo_data->data));
1730 if (intel_output == NULL)
1731 return -EINVAL;
1732
1733 sdvo_priv = intel_output->dev_priv;
1734 algo = (struct i2c_algorithm *)intel_output->i2c_bus->adapter.algo;
1735
1736 intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
1737 return algo->master_xfer(i2c_adap, msgs, num);
1738}
1739
1740static struct i2c_algorithm intel_sdvo_i2c_bit_algo = {
1741 .master_xfer = intel_sdvo_master_xfer,
1742};
1743
1663bool intel_sdvo_init(struct drm_device *dev, int output_device) 1744bool intel_sdvo_init(struct drm_device *dev, int output_device)
1664{ 1745{
1665 struct drm_connector *connector; 1746 struct drm_connector *connector;
1666 struct intel_output *intel_output; 1747 struct intel_output *intel_output;
1667 struct intel_sdvo_priv *sdvo_priv; 1748 struct intel_sdvo_priv *sdvo_priv;
1668 struct intel_i2c_chan *i2cbus = NULL; 1749 struct intel_i2c_chan *i2cbus = NULL;
1750 struct intel_i2c_chan *ddcbus = NULL;
1669 int connector_type; 1751 int connector_type;
1670 u8 ch[0x40]; 1752 u8 ch[0x40];
1671 int i; 1753 int i;
@@ -1676,17 +1758,9 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1676 return false; 1758 return false;
1677 } 1759 }
1678 1760
1679 connector = &intel_output->base;
1680
1681 drm_connector_init(dev, connector, &intel_sdvo_connector_funcs,
1682 DRM_MODE_CONNECTOR_Unknown);
1683 drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs);
1684 sdvo_priv = (struct intel_sdvo_priv *)(intel_output + 1); 1761 sdvo_priv = (struct intel_sdvo_priv *)(intel_output + 1);
1685 intel_output->type = INTEL_OUTPUT_SDVO; 1762 intel_output->type = INTEL_OUTPUT_SDVO;
1686 1763
1687 connector->interlace_allowed = 0;
1688 connector->doublescan_allowed = 0;
1689
1690 /* setup the DDC bus. */ 1764 /* setup the DDC bus. */
1691 if (output_device == SDVOB) 1765 if (output_device == SDVOB)
1692 i2cbus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB"); 1766 i2cbus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB");
@@ -1694,7 +1768,7 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1694 i2cbus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC"); 1768 i2cbus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC");
1695 1769
1696 if (!i2cbus) 1770 if (!i2cbus)
1697 goto err_connector; 1771 goto err_inteloutput;
1698 1772
1699 sdvo_priv->i2c_bus = i2cbus; 1773 sdvo_priv->i2c_bus = i2cbus;
1700 1774
@@ -1710,7 +1784,6 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1710 intel_output->i2c_bus = i2cbus; 1784 intel_output->i2c_bus = i2cbus;
1711 intel_output->dev_priv = sdvo_priv; 1785 intel_output->dev_priv = sdvo_priv;
1712 1786
1713
1714 /* Read the regs to test if we can talk to the device */ 1787 /* Read the regs to test if we can talk to the device */
1715 for (i = 0; i < 0x40; i++) { 1788 for (i = 0; i < 0x40; i++) {
1716 if (!intel_sdvo_read_byte(intel_output, i, &ch[i])) { 1789 if (!intel_sdvo_read_byte(intel_output, i, &ch[i])) {
@@ -1720,6 +1793,22 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1720 } 1793 }
1721 } 1794 }
1722 1795
1796 /* setup the DDC bus. */
1797 if (output_device == SDVOB)
1798 ddcbus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
1799 else
1800 ddcbus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
1801
1802 if (ddcbus == NULL)
1803 goto err_i2c;
1804
1805 intel_sdvo_i2c_bit_algo.functionality =
1806 intel_output->i2c_bus->adapter.algo->functionality;
1807 ddcbus->adapter.algo = &intel_sdvo_i2c_bit_algo;
1808 intel_output->ddc_bus = ddcbus;
1809
1810 /* In defaut case sdvo lvds is false */
1811 sdvo_priv->is_lvds = false;
1723 intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps); 1812 intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps);
1724 1813
1725 if (sdvo_priv->caps.output_flags & 1814 if (sdvo_priv->caps.output_flags &
@@ -1729,7 +1818,6 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1729 else 1818 else
1730 sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS1; 1819 sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS1;
1731 1820
1732 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1733 encoder_type = DRM_MODE_ENCODER_TMDS; 1821 encoder_type = DRM_MODE_ENCODER_TMDS;
1734 connector_type = DRM_MODE_CONNECTOR_DVID; 1822 connector_type = DRM_MODE_CONNECTOR_DVID;
1735 1823
@@ -1747,7 +1835,6 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1747 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_SVID0) 1835 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_SVID0)
1748 { 1836 {
1749 sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0; 1837 sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0;
1750 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1751 encoder_type = DRM_MODE_ENCODER_TVDAC; 1838 encoder_type = DRM_MODE_ENCODER_TVDAC;
1752 connector_type = DRM_MODE_CONNECTOR_SVIDEO; 1839 connector_type = DRM_MODE_CONNECTOR_SVIDEO;
1753 sdvo_priv->is_tv = true; 1840 sdvo_priv->is_tv = true;
@@ -1756,30 +1843,28 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1756 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB0) 1843 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB0)
1757 { 1844 {
1758 sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0; 1845 sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0;
1759 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1760 encoder_type = DRM_MODE_ENCODER_DAC; 1846 encoder_type = DRM_MODE_ENCODER_DAC;
1761 connector_type = DRM_MODE_CONNECTOR_VGA; 1847 connector_type = DRM_MODE_CONNECTOR_VGA;
1762 } 1848 }
1763 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB1) 1849 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB1)
1764 { 1850 {
1765 sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1; 1851 sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1;
1766 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1767 encoder_type = DRM_MODE_ENCODER_DAC; 1852 encoder_type = DRM_MODE_ENCODER_DAC;
1768 connector_type = DRM_MODE_CONNECTOR_VGA; 1853 connector_type = DRM_MODE_CONNECTOR_VGA;
1769 } 1854 }
1770 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS0) 1855 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS0)
1771 { 1856 {
1772 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0; 1857 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
1773 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1774 encoder_type = DRM_MODE_ENCODER_LVDS; 1858 encoder_type = DRM_MODE_ENCODER_LVDS;
1775 connector_type = DRM_MODE_CONNECTOR_LVDS; 1859 connector_type = DRM_MODE_CONNECTOR_LVDS;
1860 sdvo_priv->is_lvds = true;
1776 } 1861 }
1777 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS1) 1862 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS1)
1778 { 1863 {
1779 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1; 1864 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1;
1780 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1781 encoder_type = DRM_MODE_ENCODER_LVDS; 1865 encoder_type = DRM_MODE_ENCODER_LVDS;
1782 connector_type = DRM_MODE_CONNECTOR_LVDS; 1866 connector_type = DRM_MODE_CONNECTOR_LVDS;
1867 sdvo_priv->is_lvds = true;
1783 } 1868 }
1784 else 1869 else
1785 { 1870 {
@@ -1795,9 +1880,16 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1795 goto err_i2c; 1880 goto err_i2c;
1796 } 1881 }
1797 1882
1883 connector = &intel_output->base;
1884 drm_connector_init(dev, connector, &intel_sdvo_connector_funcs,
1885 connector_type);
1886 drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs);
1887 connector->interlace_allowed = 0;
1888 connector->doublescan_allowed = 0;
1889 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1890
1798 drm_encoder_init(dev, &intel_output->enc, &intel_sdvo_enc_funcs, encoder_type); 1891 drm_encoder_init(dev, &intel_output->enc, &intel_sdvo_enc_funcs, encoder_type);
1799 drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs); 1892 drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs);
1800 connector->connector_type = connector_type;
1801 1893
1802 drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); 1894 drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
1803 drm_sysfs_connector_add(connector); 1895 drm_sysfs_connector_add(connector);
@@ -1829,14 +1921,13 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1829 sdvo_priv->caps.output_flags & 1921 sdvo_priv->caps.output_flags &
1830 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 1922 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
1831 1923
1832 intel_output->ddc_bus = i2cbus;
1833
1834 return true; 1924 return true;
1835 1925
1836err_i2c: 1926err_i2c:
1927 if (ddcbus != NULL)
1928 intel_i2c_destroy(intel_output->ddc_bus);
1837 intel_i2c_destroy(intel_output->i2c_bus); 1929 intel_i2c_destroy(intel_output->i2c_bus);
1838err_connector: 1930err_inteloutput:
1839 drm_connector_cleanup(connector);
1840 kfree(intel_output); 1931 kfree(intel_output);
1841 1932
1842 return false; 1933 return false;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-19 08:26:51 -0400