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path: root/drivers/gpu/drm/i915/intel_pm.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 58c07cdafb7..1881c8c83f0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2441,17 +2441,10 @@ static void gen6_enable_rps(struct drm_device *dev)
2441 dev_priv->max_delay << 24 | 2441 dev_priv->max_delay << 24 |
2442 dev_priv->min_delay << 16); 2442 dev_priv->min_delay << 16);
2443 2443
2444 if (IS_HASWELL(dev)) { 2444 I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
2445 I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400); 2445 I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
2446 I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000); 2446 I915_WRITE(GEN6_RP_UP_EI, 66000);
2447 I915_WRITE(GEN6_RP_UP_EI, 66000); 2447 I915_WRITE(GEN6_RP_DOWN_EI, 350000);
2448 I915_WRITE(GEN6_RP_DOWN_EI, 350000);
2449 } else {
2450 I915_WRITE(GEN6_RP_UP_THRESHOLD, 10000);
2451 I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 1000000);
2452 I915_WRITE(GEN6_RP_UP_EI, 100000);
2453 I915_WRITE(GEN6_RP_DOWN_EI, 5000000);
2454 }
2455 2448
2456 I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10); 2449 I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
2457 I915_WRITE(GEN6_RP_CONTROL, 2450 I915_WRITE(GEN6_RP_CONTROL,