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path: root/drivers/gpu/drm/i915/intel_drv.h
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h51
1 files changed, 42 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a1b4343814e..1348705faf6 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -26,6 +26,7 @@
26#define __INTEL_DRV_H__ 26#define __INTEL_DRV_H__
27 27
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include "i915_drm.h"
29#include "i915_drv.h" 30#include "i915_drv.h"
30#include "drm_crtc.h" 31#include "drm_crtc.h"
31#include "drm_crtc_helper.h" 32#include "drm_crtc_helper.h"
@@ -39,7 +40,7 @@
39 ret__ = -ETIMEDOUT; \ 40 ret__ = -ETIMEDOUT; \
40 break; \ 41 break; \
41 } \ 42 } \
42 if (W && !(in_atomic() || in_dbg_master())) msleep(W); \ 43 if (W && drm_can_sleep()) msleep(W); \
43 } \ 44 } \
44 ret__; \ 45 ret__; \
45}) 46})
@@ -47,13 +48,6 @@
47#define wait_for(COND, MS) _wait_for(COND, MS, 1) 48#define wait_for(COND, MS) _wait_for(COND, MS, 1)
48#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0) 49#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
49 50
50#define MSLEEP(x) do { \
51 if (in_dbg_master()) \
52 mdelay(x); \
53 else \
54 msleep(x); \
55} while (0)
56
57#define KHz(x) (1000*x) 51#define KHz(x) (1000*x)
58#define MHz(x) KHz(1000*x) 52#define MHz(x) KHz(1000*x)
59 53
@@ -177,10 +171,32 @@ struct intel_crtc {
177 bool use_pll_a; 171 bool use_pll_a;
178}; 172};
179 173
174struct intel_plane {
175 struct drm_plane base;
176 enum pipe pipe;
177 struct drm_i915_gem_object *obj;
178 bool primary_disabled;
179 int max_downscale;
180 u32 lut_r[1024], lut_g[1024], lut_b[1024];
181 void (*update_plane)(struct drm_plane *plane,
182 struct drm_framebuffer *fb,
183 struct drm_i915_gem_object *obj,
184 int crtc_x, int crtc_y,
185 unsigned int crtc_w, unsigned int crtc_h,
186 uint32_t x, uint32_t y,
187 uint32_t src_w, uint32_t src_h);
188 void (*disable_plane)(struct drm_plane *plane);
189 int (*update_colorkey)(struct drm_plane *plane,
190 struct drm_intel_sprite_colorkey *key);
191 void (*get_colorkey)(struct drm_plane *plane,
192 struct drm_intel_sprite_colorkey *key);
193};
194
180#define to_intel_crtc(x) container_of(x, struct intel_crtc, base) 195#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
181#define to_intel_connector(x) container_of(x, struct intel_connector, base) 196#define to_intel_connector(x) container_of(x, struct intel_connector, base)
182#define to_intel_encoder(x) container_of(x, struct intel_encoder, base) 197#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
183#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) 198#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
199#define to_intel_plane(x) container_of(x, struct intel_plane, base)
184 200
185#define DIP_HEADER_SIZE 5 201#define DIP_HEADER_SIZE 5
186 202
@@ -290,6 +306,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
290extern bool intel_dpd_is_edp(struct drm_device *dev); 306extern bool intel_dpd_is_edp(struct drm_device *dev);
291extern void intel_edp_link_config(struct intel_encoder *, int *, int *); 307extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
292extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder); 308extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
309extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
293 310
294/* intel_panel.c */ 311/* intel_panel.c */
295extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 312extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
@@ -360,7 +377,7 @@ extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
360 377
361extern int intel_framebuffer_init(struct drm_device *dev, 378extern int intel_framebuffer_init(struct drm_device *dev,
362 struct intel_framebuffer *ifb, 379 struct intel_framebuffer *ifb,
363 struct drm_mode_fb_cmd *mode_cmd, 380 struct drm_mode_fb_cmd2 *mode_cmd,
364 struct drm_i915_gem_object *obj); 381 struct drm_i915_gem_object *obj);
365extern int intel_fbdev_init(struct drm_device *dev); 382extern int intel_fbdev_init(struct drm_device *dev);
366extern void intel_fbdev_fini(struct drm_device *dev); 383extern void intel_fbdev_fini(struct drm_device *dev);
@@ -380,9 +397,25 @@ extern int intel_overlay_attrs(struct drm_device *dev, void *data,
380extern void intel_fb_output_poll_changed(struct drm_device *dev); 397extern void intel_fb_output_poll_changed(struct drm_device *dev);
381extern void intel_fb_restore_mode(struct drm_device *dev); 398extern void intel_fb_restore_mode(struct drm_device *dev);
382 399
400extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
401 bool state);
402#define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
403#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
404
383extern void intel_init_clock_gating(struct drm_device *dev); 405extern void intel_init_clock_gating(struct drm_device *dev);
384extern void intel_write_eld(struct drm_encoder *encoder, 406extern void intel_write_eld(struct drm_encoder *encoder,
385 struct drm_display_mode *mode); 407 struct drm_display_mode *mode);
386extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe); 408extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
387 409
410/* For use by IVB LP watermark workaround in intel_sprite.c */
411extern void sandybridge_update_wm(struct drm_device *dev);
412extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
413 uint32_t sprite_width,
414 int pixel_size);
415
416extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
417 struct drm_file *file_priv);
418extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
419 struct drm_file *file_priv);
420
388#endif /* __INTEL_DRV_H__ */ 421#endif /* __INTEL_DRV_H__ */