diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 112 |
1 files changed, 48 insertions, 64 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 25c1047f6ec..0d24e034dc2 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -172,9 +172,30 @@ struct drm_i915_display_funcs { | |||
172 | 172 | ||
173 | struct intel_overlay; | 173 | struct intel_overlay; |
174 | 174 | ||
175 | struct intel_device_info { | ||
176 | u8 is_mobile : 1; | ||
177 | u8 is_i8xx : 1; | ||
178 | u8 is_i915g : 1; | ||
179 | u8 is_i9xx : 1; | ||
180 | u8 is_i945gm : 1; | ||
181 | u8 is_i965g : 1; | ||
182 | u8 is_i965gm : 1; | ||
183 | u8 is_g33 : 1; | ||
184 | u8 need_gfx_hws : 1; | ||
185 | u8 is_g4x : 1; | ||
186 | u8 is_pineview : 1; | ||
187 | u8 is_ironlake : 1; | ||
188 | u8 has_fbc : 1; | ||
189 | u8 has_rc6 : 1; | ||
190 | u8 has_pipe_cxsr : 1; | ||
191 | u8 has_hotplug : 1; | ||
192 | }; | ||
193 | |||
175 | typedef struct drm_i915_private { | 194 | typedef struct drm_i915_private { |
176 | struct drm_device *dev; | 195 | struct drm_device *dev; |
177 | 196 | ||
197 | const struct intel_device_info *info; | ||
198 | |||
178 | int has_gem; | 199 | int has_gem; |
179 | 200 | ||
180 | void __iomem *regs; | 201 | void __iomem *regs; |
@@ -983,67 +1004,33 @@ extern void g4x_disable_fbc(struct drm_device *dev); | |||
983 | extern int i915_wrap_ring(struct drm_device * dev); | 1004 | extern int i915_wrap_ring(struct drm_device * dev); |
984 | extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); | 1005 | extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); |
985 | 1006 | ||
986 | #define IS_I830(dev) ((dev)->pci_device == 0x3577) | 1007 | #define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info) |
987 | #define IS_845G(dev) ((dev)->pci_device == 0x2562) | 1008 | |
988 | #define IS_I85X(dev) ((dev)->pci_device == 0x3582) | 1009 | #define IS_I830(dev) ((dev)->pci_device == 0x3577) |
989 | #define IS_I865G(dev) ((dev)->pci_device == 0x2572) | 1010 | #define IS_845G(dev) ((dev)->pci_device == 0x2562) |
990 | #define IS_I8XX(dev) (IS_I830(dev) || IS_845G(dev) || IS_I85X(dev) || IS_I865G(dev)) | 1011 | #define IS_I85X(dev) ((dev)->pci_device == 0x3582) |
991 | 1012 | #define IS_I865G(dev) ((dev)->pci_device == 0x2572) | |
992 | #define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a) | 1013 | #define IS_I8XX(dev) (INTEL_INFO(dev)->is_i8xx) |
993 | #define IS_I915GM(dev) ((dev)->pci_device == 0x2592) | 1014 | #define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g) |
994 | #define IS_I945G(dev) ((dev)->pci_device == 0x2772) | 1015 | #define IS_I915GM(dev) ((dev)->pci_device == 0x2592) |
995 | #define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\ | 1016 | #define IS_I945G(dev) ((dev)->pci_device == 0x2772) |
996 | (dev)->pci_device == 0x27AE) | 1017 | #define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm) |
997 | #define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \ | 1018 | #define IS_I965G(dev) (INTEL_INFO(dev)->is_i965g) |
998 | (dev)->pci_device == 0x2982 || \ | 1019 | #define IS_I965GM(dev) (INTEL_INFO(dev)->is_i965gm) |
999 | (dev)->pci_device == 0x2992 || \ | 1020 | #define IS_GM45(dev) ((dev)->pci_device == 0x2A42) |
1000 | (dev)->pci_device == 0x29A2 || \ | 1021 | #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x) |
1001 | (dev)->pci_device == 0x2A02 || \ | 1022 | #define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001) |
1002 | (dev)->pci_device == 0x2A12 || \ | 1023 | #define IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011) |
1003 | (dev)->pci_device == 0x2A42 || \ | 1024 | #define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview) |
1004 | (dev)->pci_device == 0x2E02 || \ | 1025 | #define IS_G33(dev) (INTEL_INFO(dev)->is_g33) |
1005 | (dev)->pci_device == 0x2E12 || \ | ||
1006 | (dev)->pci_device == 0x2E22 || \ | ||
1007 | (dev)->pci_device == 0x2E32 || \ | ||
1008 | (dev)->pci_device == 0x2E42 || \ | ||
1009 | (dev)->pci_device == 0x0042 || \ | ||
1010 | (dev)->pci_device == 0x0046) | ||
1011 | |||
1012 | #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \ | ||
1013 | (dev)->pci_device == 0x2A12) | ||
1014 | |||
1015 | #define IS_GM45(dev) ((dev)->pci_device == 0x2A42) | ||
1016 | |||
1017 | #define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \ | ||
1018 | (dev)->pci_device == 0x2E12 || \ | ||
1019 | (dev)->pci_device == 0x2E22 || \ | ||
1020 | (dev)->pci_device == 0x2E32 || \ | ||
1021 | (dev)->pci_device == 0x2E42 || \ | ||
1022 | IS_GM45(dev)) | ||
1023 | |||
1024 | #define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001) | ||
1025 | #define IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011) | ||
1026 | #define IS_PINEVIEW(dev) (IS_PINEVIEW_G(dev) || IS_PINEVIEW_M(dev)) | ||
1027 | |||
1028 | #define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \ | ||
1029 | (dev)->pci_device == 0x29B2 || \ | ||
1030 | (dev)->pci_device == 0x29D2 || \ | ||
1031 | (IS_PINEVIEW(dev))) | ||
1032 | |||
1033 | #define IS_IRONLAKE_D(dev) ((dev)->pci_device == 0x0042) | 1026 | #define IS_IRONLAKE_D(dev) ((dev)->pci_device == 0x0042) |
1034 | #define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046) | 1027 | #define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046) |
1035 | #define IS_IRONLAKE(dev) (IS_IRONLAKE_D(dev) || IS_IRONLAKE_M(dev)) | 1028 | #define IS_IRONLAKE(dev) (INTEL_INFO(dev)->is_ironlake) |
1036 | 1029 | #define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx) | |
1037 | #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \ | 1030 | #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) |
1038 | IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev) || \ | ||
1039 | IS_IRONLAKE(dev)) | ||
1040 | 1031 | ||
1041 | #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \ | 1032 | #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) |
1042 | IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \ | ||
1043 | IS_PINEVIEW(dev) || IS_IRONLAKE_M(dev)) | ||
1044 | 1033 | ||
1045 | #define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev) || \ | ||
1046 | IS_IRONLAKE(dev)) | ||
1047 | /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte | 1034 | /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte |
1048 | * rows, which changed the alignment requirements and fence programming. | 1035 | * rows, which changed the alignment requirements and fence programming. |
1049 | */ | 1036 | */ |
@@ -1055,17 +1042,14 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); | |||
1055 | #define SUPPORTS_EDP(dev) (IS_IRONLAKE_M(dev)) | 1042 | #define SUPPORTS_EDP(dev) (IS_IRONLAKE_M(dev)) |
1056 | #define SUPPORTS_TV(dev) (IS_I9XX(dev) && IS_MOBILE(dev) && \ | 1043 | #define SUPPORTS_TV(dev) (IS_I9XX(dev) && IS_MOBILE(dev) && \ |
1057 | !IS_IRONLAKE(dev) && !IS_PINEVIEW(dev)) | 1044 | !IS_IRONLAKE(dev) && !IS_PINEVIEW(dev)) |
1058 | #define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev) || IS_I965G(dev)) | 1045 | #define I915_HAS_HOTPLUG(dev) (INTEL_INFO(dev)->has_hotplug) |
1059 | /* dsparb controlled by hw only */ | 1046 | /* dsparb controlled by hw only */ |
1060 | #define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev)) | 1047 | #define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev)) |
1061 | 1048 | ||
1062 | #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev)) | 1049 | #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev)) |
1063 | #define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IRONLAKE(dev)) | 1050 | #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr) |
1064 | #define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \ | 1051 | #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc) |
1065 | (IS_I9XX(dev) || IS_GM45(dev)) && \ | 1052 | #define I915_HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6) |
1066 | !IS_PINEVIEW(dev) && \ | ||
1067 | !IS_IRONLAKE(dev)) | ||
1068 | #define I915_HAS_RC6(dev) (IS_I965GM(dev) || IS_GM45(dev) || IS_IRONLAKE_M(dev)) | ||
1069 | 1053 | ||
1070 | #define PRIMARY_RINGBUFFER_SIZE (128*1024) | 1054 | #define PRIMARY_RINGBUFFER_SIZE (128*1024) |
1071 | 1055 | ||