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-rw-r--r--arch/sh/kernel/cpu/sh4/clock-sh4-202.c19
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7763.c17
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7780.c17
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7785.c15
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7786.c15
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-shx3.c15
6 files changed, 19 insertions, 79 deletions
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 0caca9f99fe..435f4f12ffb 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -127,7 +127,7 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
127 frqcr3 |= tmp << 6; 127 frqcr3 |= tmp << 6;
128 ctrl_outl(frqcr3, CPG2_FRQCR3); 128 ctrl_outl(frqcr3, CPG2_FRQCR3);
129 129
130 return clk->parent->rate / frqcr3_divisors[tmp]; 130 clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
131 131
132 return 0; 132 return 0;
133} 133}
@@ -153,28 +153,17 @@ static struct clk *sh4202_onchip_clocks[] = {
153static int __init sh4202_clk_init(void) 153static int __init sh4202_clk_init(void)
154{ 154{
155 struct clk *clk = clk_get(NULL, "master_clk"); 155 struct clk *clk = clk_get(NULL, "master_clk");
156 int i; 156 int i, ret = 0;
157 157
158 for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) { 158 for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) {
159 struct clk *clkp = sh4202_onchip_clocks[i]; 159 struct clk *clkp = sh4202_onchip_clocks[i];
160 160
161 clkp->parent = clk; 161 clkp->parent = clk;
162 clk_register(clkp); 162 ret |= clk_register(clkp);
163 clk_enable(clkp);
164 } 163 }
165 164
166 /*
167 * Now that we have the rest of the clocks registered, we need to
168 * force the parent clock to propagate so that these clocks will
169 * automatically figure out their rate. We cheat by handing the
170 * parent clock its current rate and forcing child propagation.
171 */
172 clk_set_rate(clk, clk_get_rate(clk));
173
174 clk_put(clk); 165 clk_put(clk);
175 166
176 return 0; 167 return ret;
177} 168}
178
179arch_initcall(sh4202_clk_init); 169arch_initcall(sh4202_clk_init);
180
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 21bd70f9ee4..0110da64a43 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -93,28 +93,17 @@ static struct clk *sh7763_onchip_clocks[] = {
93static int __init sh7763_clk_init(void) 93static int __init sh7763_clk_init(void)
94{ 94{
95 struct clk *clk = clk_get(NULL, "master_clk"); 95 struct clk *clk = clk_get(NULL, "master_clk");
96 int i; 96 int i, ret = 0;
97 97
98 for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) { 98 for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) {
99 struct clk *clkp = sh7763_onchip_clocks[i]; 99 struct clk *clkp = sh7763_onchip_clocks[i];
100 100
101 clkp->parent = clk; 101 clkp->parent = clk;
102 clk_register(clkp); 102 ret |= clk_register(clkp);
103 clk_enable(clkp);
104 } 103 }
105 104
106 /*
107 * Now that we have the rest of the clocks registered, we need to
108 * force the parent clock to propagate so that these clocks will
109 * automatically figure out their rate. We cheat by handing the
110 * parent clock its current rate and forcing child propagation.
111 */
112 clk_set_rate(clk, clk_get_rate(clk));
113
114 clk_put(clk); 105 clk_put(clk);
115 106
116 return 0; 107 return ret;
117} 108}
118
119arch_initcall(sh7763_clk_init); 109arch_initcall(sh7763_clk_init);
120
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index 4c11f8917e4..0a22d50b109 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -99,28 +99,17 @@ static struct clk *sh7780_onchip_clocks[] = {
99static int __init sh7780_clk_init(void) 99static int __init sh7780_clk_init(void)
100{ 100{
101 struct clk *clk = clk_get(NULL, "master_clk"); 101 struct clk *clk = clk_get(NULL, "master_clk");
102 int i; 102 int i, ret = 0;
103 103
104 for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) { 104 for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) {
105 struct clk *clkp = sh7780_onchip_clocks[i]; 105 struct clk *clkp = sh7780_onchip_clocks[i];
106 106
107 clkp->parent = clk; 107 clkp->parent = clk;
108 clk_register(clkp); 108 ret |= clk_register(clkp);
109 clk_enable(clkp);
110 } 109 }
111 110
112 /*
113 * Now that we have the rest of the clocks registered, we need to
114 * force the parent clock to propagate so that these clocks will
115 * automatically figure out their rate. We cheat by handing the
116 * parent clock its current rate and forcing child propagation.
117 */
118 clk_set_rate(clk, clk_get_rate(clk));
119
120 clk_put(clk); 111 clk_put(clk);
121 112
122 return 0; 113 return ret;
123} 114}
124
125arch_initcall(sh7780_clk_init); 115arch_initcall(sh7780_clk_init);
126
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index edd432894bd..4dcd1f6f0cb 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -137,26 +137,17 @@ static struct clk *sh7785_onchip_clocks[] = {
137static int __init sh7785_clk_init(void) 137static int __init sh7785_clk_init(void)
138{ 138{
139 struct clk *clk = clk_get(NULL, "master_clk"); 139 struct clk *clk = clk_get(NULL, "master_clk");
140 int i; 140 int i, ret = 0;
141 141
142 for (i = 0; i < ARRAY_SIZE(sh7785_onchip_clocks); i++) { 142 for (i = 0; i < ARRAY_SIZE(sh7785_onchip_clocks); i++) {
143 struct clk *clkp = sh7785_onchip_clocks[i]; 143 struct clk *clkp = sh7785_onchip_clocks[i];
144 144
145 clkp->parent = clk; 145 clkp->parent = clk;
146 clk_register(clkp); 146 ret |= clk_register(clkp);
147 clk_enable(clkp);
148 } 147 }
149 148
150 /*
151 * Now that we have the rest of the clocks registered, we need to
152 * force the parent clock to propagate so that these clocks will
153 * automatically figure out their rate. We cheat by handing the
154 * parent clock its current rate and forcing child propagation.
155 */
156 clk_set_rate(clk, clk_get_rate(clk));
157
158 clk_put(clk); 149 clk_put(clk);
159 150
160 return 0; 151 return ret;
161} 152}
162arch_initcall(sh7785_clk_init); 153arch_initcall(sh7785_clk_init);
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index 2825494f85d..825556fe230 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -123,26 +123,17 @@ static struct clk *sh7786_onchip_clocks[] = {
123static int __init sh7786_clk_init(void) 123static int __init sh7786_clk_init(void)
124{ 124{
125 struct clk *clk = clk_get(NULL, "master_clk"); 125 struct clk *clk = clk_get(NULL, "master_clk");
126 int i; 126 int i, ret = 0;
127 127
128 for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) { 128 for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
129 struct clk *clkp = sh7786_onchip_clocks[i]; 129 struct clk *clkp = sh7786_onchip_clocks[i];
130 130
131 clkp->parent = clk; 131 clkp->parent = clk;
132 clk_register(clkp); 132 ret |= clk_register(clkp);
133 clk_enable(clkp);
134 } 133 }
135 134
136 /*
137 * Now that we have the rest of the clocks registered, we need to
138 * force the parent clock to propagate so that these clocks will
139 * automatically figure out their rate. We cheat by handing the
140 * parent clock its current rate and forcing child propagation.
141 */
142 clk_set_rate(clk, clk_get_rate(clk));
143
144 clk_put(clk); 135 clk_put(clk);
145 136
146 return 0; 137 return ret;
147} 138}
148arch_initcall(sh7786_clk_init); 139arch_initcall(sh7786_clk_init);
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 6e5c864cf40..1eb149b0fe6 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -110,26 +110,17 @@ static struct clk *shx3_onchip_clocks[] = {
110static int __init shx3_clk_init(void) 110static int __init shx3_clk_init(void)
111{ 111{
112 struct clk *clk = clk_get(NULL, "master_clk"); 112 struct clk *clk = clk_get(NULL, "master_clk");
113 int i; 113 int i, ret = 0;
114 114
115 for (i = 0; i < ARRAY_SIZE(shx3_onchip_clocks); i++) { 115 for (i = 0; i < ARRAY_SIZE(shx3_onchip_clocks); i++) {
116 struct clk *clkp = shx3_onchip_clocks[i]; 116 struct clk *clkp = shx3_onchip_clocks[i];
117 117
118 clkp->parent = clk; 118 clkp->parent = clk;
119 clk_register(clkp); 119 ret |= clk_register(clkp);
120 clk_enable(clkp);
121 } 120 }
122 121
123 /*
124 * Now that we have the rest of the clocks registered, we need to
125 * force the parent clock to propagate so that these clocks will
126 * automatically figure out their rate. We cheat by handing the
127 * parent clock its current rate and forcing child propagation.
128 */
129 clk_set_rate(clk, clk_get_rate(clk));
130
131 clk_put(clk); 122 clk_put(clk);
132 123
133 return 0; 124 return ret;
134} 125}
135arch_initcall(shx3_clk_init); 126arch_initcall(shx3_clk_init);