diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/loongson/common/early_printk.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/loongson/common/early_printk.c b/arch/mips/loongson/common/early_printk.c index bc73edc0cfd..8ec4fb2066a 100644 --- a/arch/mips/loongson/common/early_printk.c +++ b/arch/mips/loongson/common/early_printk.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* early printk support | 1 | /* early printk support |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca> | 3 | * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca> |
4 | * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology | 4 | * Copyright (c) 2009 Lemote Inc. |
5 | * Author: Wu Zhangjin, wuzj@lemote.com | 5 | * Author: Wu Zhangjin, wuzj@lemote.com |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
@@ -16,20 +16,20 @@ | |||
16 | 16 | ||
17 | #define PORT(base, offset) (u8 *)(base + offset) | 17 | #define PORT(base, offset) (u8 *)(base + offset) |
18 | 18 | ||
19 | static inline unsigned int serial_in(phys_addr_t base, int offset) | 19 | static inline unsigned int serial_in(unsigned char *base, int offset) |
20 | { | 20 | { |
21 | return readb(PORT(base, offset)); | 21 | return readb(PORT(base, offset)); |
22 | } | 22 | } |
23 | 23 | ||
24 | static inline void serial_out(phys_addr_t base, int offset, int value) | 24 | static inline void serial_out(unsigned char *base, int offset, int value) |
25 | { | 25 | { |
26 | writeb(value, PORT(base, offset)); | 26 | writeb(value, PORT(base, offset)); |
27 | } | 27 | } |
28 | 28 | ||
29 | void prom_putchar(char c) | 29 | void prom_putchar(char c) |
30 | { | 30 | { |
31 | phys_addr_t uart_base = | 31 | unsigned char *uart_base = |
32 | (phys_addr_t) ioremap_nocache(LOONGSON_UART_BASE, 8); | 32 | (unsigned char *) ioremap_nocache(LOONGSON_UART_BASE, 8); |
33 | 33 | ||
34 | while ((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0) | 34 | while ((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0) |
35 | ; | 35 | ; |