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-rw-r--r--arch/arm/mach-s3c64xx/include/mach/pwm-clock.h56
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/pwm-clock.h68
-rw-r--r--arch/arm/mach-s5pc100/include/mach/pwm-clock.h56
-rw-r--r--arch/arm/mach-s5pv210/include/mach/pwm-clock.h70
-rw-r--r--arch/arm/plat-s3c24xx/include/mach/pwm-clock.h55
-rw-r--r--arch/arm/plat-samsung/include/plat/pwm-clock.h (renamed from arch/arm/mach-exynos4/include/mach/pwm-clock.h)39
-rw-r--r--arch/arm/plat-samsung/pwm-clock.c13
7 files changed, 36 insertions, 321 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
deleted file mode 100644
index b25bedee0d5..00000000000
--- a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64xx - pwm clock and timer support
9 */
10
11/**
12 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
13 * @tcfg: The timer TCFG1 register bits shifted down to 0.
14 *
15 * Return true if the given configuration from TCFG1 is a TCLK instead
16 * any of the TDIV clocks.
17 */
18static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
19{
20 return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
21}
22
23/**
24 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
25 * @tcfg1: The tcfg1 setting, shifted down.
26 *
27 * Get the divisor value for the given tcfg1 setting. We assume the
28 * caller has already checked to see if this is not a TCLK source.
29 */
30static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
31{
32 return 1 << tcfg1;
33}
34
35/**
36 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
37 *
38 * Return true if we have a /1 in the tdiv setting.
39 */
40static inline unsigned int pwm_tdiv_has_div1(void)
41{
42 return 1;
43}
44
45/**
46 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
47 * @div: The divisor to calculate the bit information for.
48 *
49 * Turn a divisor into the necessary bit field for TCFG1.
50 */
51static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
52{
53 return ilog2(div);
54}
55
56#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
deleted file mode 100644
index 19fff8b701c..00000000000
--- a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,68 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * S5P64X0 - pwm clock and timer support
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_ARCH_PWMCLK_H
19#define __ASM_ARCH_PWMCLK_H __FILE__
20
21/**
22 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
23 * @tcfg: The timer TCFG1 register bits shifted down to 0.
24 *
25 * Return true if the given configuration from TCFG1 is a TCLK instead
26 * any of the TDIV clocks.
27 */
28static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
29{
30 return 0;
31}
32
33/**
34 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
35 * @tcfg1: The tcfg1 setting, shifted down.
36 *
37 * Get the divisor value for the given tcfg1 setting. We assume the
38 * caller has already checked to see if this is not a TCLK source.
39 */
40static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
41{
42 return 1 << tcfg1;
43}
44
45/**
46 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
47 *
48 * Return true if we have a /1 in the tdiv setting.
49 */
50static inline unsigned int pwm_tdiv_has_div1(void)
51{
52 return 1;
53}
54
55/**
56 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
57 * @div: The divisor to calculate the bit information for.
58 *
59 * Turn a divisor into the necessary bit field for TCFG1.
60 */
61static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
62{
63 return ilog2(div);
64}
65
66#define S3C_TCFG1_MUX_TCLK 0
67
68#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/pwm-clock.h b/arch/arm/mach-s5pc100/include/mach/pwm-clock.h
deleted file mode 100644
index b34d2f7aae5..00000000000
--- a/arch/arm/mach-s5pc100/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/pwm-clock.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC100 - pwm clock and timer support
7 *
8 * Based on mach-s3c6400/include/mach/pwm-clock.h
9 */
10
11/**
12 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
13 * @tcfg: The timer TCFG1 register bits shifted down to 0.
14 *
15 * Return true if the given configuration from TCFG1 is a TCLK instead
16 * any of the TDIV clocks.
17 */
18static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
19{
20 return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
21}
22
23/**
24 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
25 * @tcfg1: The tcfg1 setting, shifted down.
26 *
27 * Get the divisor value for the given tcfg1 setting. We assume the
28 * caller has already checked to see if this is not a TCLK source.
29 */
30static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
31{
32 return 1 << tcfg1;
33}
34
35/**
36 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
37 *
38 * Return true if we have a /1 in the tdiv setting.
39 */
40static inline unsigned int pwm_tdiv_has_div1(void)
41{
42 return 1;
43}
44
45/**
46 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
47 * @div: The divisor to calculate the bit information for.
48 *
49 * Turn a divisor into the necessary bit field for TCFG1.
50 */
51static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
52{
53 return ilog2(div);
54}
55
56#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
deleted file mode 100644
index f8a9f1b330e..00000000000
--- a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
12 *
13 * S5PV210 - pwm clock and timer support
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18*/
19
20#ifndef __ASM_ARCH_PWMCLK_H
21#define __ASM_ARCH_PWMCLK_H __FILE__
22
23/**
24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
26 *
27 * Return true if the given configuration from TCFG1 is a TCLK instead
28 * any of the TDIV clocks.
29 */
30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
31{
32 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
33}
34
35/**
36 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
37 * @tcfg1: The tcfg1 setting, shifted down.
38 *
39 * Get the divisor value for the given tcfg1 setting. We assume the
40 * caller has already checked to see if this is not a TCLK source.
41 */
42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
43{
44 return 1 << tcfg1;
45}
46
47/**
48 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
49 *
50 * Return true if we have a /1 in the tdiv setting.
51 */
52static inline unsigned int pwm_tdiv_has_div1(void)
53{
54 return 1;
55}
56
57/**
58 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
59 * @div: The divisor to calculate the bit information for.
60 *
61 * Turn a divisor into the necessary bit field for TCFG1.
62 */
63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
64{
65 return ilog2(div);
66}
67
68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
69
70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h b/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
deleted file mode 100644
index a087de21bc2..00000000000
--- a/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/* linux/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * S3C24xx - pwm clock and timer support
8 */
9
10/**
11 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
12 * @cfg: The timer TCFG1 register bits shifted down to 0.
13 *
14 * Return true if the given configuration from TCFG1 is a TCLK instead
15 * any of the TDIV clocks.
16 */
17static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
18{
19 return tcfg == S3C2410_TCFG1_MUX_TCLK;
20}
21
22/**
23 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
24 * @tcfg1: The tcfg1 setting, shifted down.
25 *
26 * Get the divisor value for the given tcfg1 setting. We assume the
27 * caller has already checked to see if this is not a TCLK source.
28 */
29static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
30{
31 return 1 << (1 + tcfg1);
32}
33
34/**
35 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
36 *
37 * Return true if we have a /1 in the tdiv setting.
38 */
39static inline unsigned int pwm_tdiv_has_div1(void)
40{
41 return 0;
42}
43
44/**
45 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
46 * @div: The divisor to calculate the bit information for.
47 *
48 * Turn a divisor into the necessary bit field for TCFG1.
49 */
50static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
51{
52 return ilog2(div) - 1;
53}
54
55#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-exynos4/include/mach/pwm-clock.h b/arch/arm/plat-samsung/include/plat/pwm-clock.h
index 8e12090287b..bf6a60eb623 100644
--- a/arch/arm/mach-exynos4/include/mach/pwm-clock.h
+++ b/arch/arm/plat-samsung/include/plat/pwm-clock.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-exynos4/include/mach/pwm-clock.h 1/* linux/arch/arm/plat-samsung/include/plat/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 4 * http://www.samsung.com
@@ -8,17 +8,15 @@
8 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
10 * 10 *
11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h 11 * SAMSUNG - pwm clock and timer support
12 *
13 * EXYNOS4 - pwm clock and timer support
14 * 12 *
15 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
18*/ 16*/
19 17
20#ifndef __ASM_ARCH_PWMCLK_H 18#ifndef __ASM_PLAT_PWM_CLOCK_H
21#define __ASM_ARCH_PWMCLK_H __FILE__ 19#define __ASM_PLAT_PWM_CLOCK_H __FILE__
22 20
23/** 21/**
24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 22 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
@@ -29,7 +27,14 @@
29 */ 27 */
30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 28static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
31{ 29{
32 return tcfg == S3C64XX_TCFG1_MUX_TCLK; 30 if (soc_is_s3c24xx())
31 return tcfg == S3C2410_TCFG1_MUX_TCLK;
32 else if (soc_is_s3c64xx() || soc_is_s5pc100())
33 return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
34 else if (soc_is_s5p6440() || soc_is_s5p6450())
35 return 0;
36 else
37 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
33} 38}
34 39
35/** 40/**
@@ -41,7 +46,10 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
41 */ 46 */
42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 47static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
43{ 48{
44 return 1 << tcfg1; 49 if (soc_is_s3c24xx())
50 return 1 << (tcfg1 + 1);
51 else
52 return 1 << tcfg1;
45} 53}
46 54
47/** 55/**
@@ -51,7 +59,10 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
51 */ 59 */
52static inline unsigned int pwm_tdiv_has_div1(void) 60static inline unsigned int pwm_tdiv_has_div1(void)
53{ 61{
54 return 1; 62 if (soc_is_s3c24xx())
63 return 0;
64 else
65 return 1;
55} 66}
56 67
57/** 68/**
@@ -62,9 +73,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
62 */ 73 */
63static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 74static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
64{ 75{
65 return ilog2(div); 76 if (soc_is_s3c24xx())
77 return ilog2(div) - 1;
78 else
79 return ilog2(div);
66} 80}
67 81#endif /* __ASM_PLAT_PWM_CLOCK_H */
68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
69
70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
index f1bba88ed2f..a35ff3bcffe 100644
--- a/arch/arm/plat-samsung/pwm-clock.c
+++ b/arch/arm/plat-samsung/pwm-clock.c
@@ -27,7 +27,7 @@
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28 28
29#include <plat/regs-timer.h> 29#include <plat/regs-timer.h>
30#include <mach/pwm-clock.h> 30#include <plat/pwm-clock.h>
31 31
32/* Each of the timers 0 through 5 go through the following 32/* Each of the timers 0 through 5 go through the following
33 * clock tree, with the inputs depending on the timers. 33 * clock tree, with the inputs depending on the timers.
@@ -339,8 +339,17 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
339 unsigned long bits; 339 unsigned long bits;
340 unsigned long shift = S3C2410_TCFG1_SHIFT(id); 340 unsigned long shift = S3C2410_TCFG1_SHIFT(id);
341 341
342 unsigned long mux_tclk;
343
344 if (soc_is_s3c24xx())
345 mux_tclk = S3C2410_TCFG1_MUX_TCLK;
346 else if (soc_is_s5p6440() || soc_is_s5p6450())
347 mux_tclk = 0;
348 else
349 mux_tclk = S3C64XX_TCFG1_MUX_TCLK;
350
342 if (parent == s3c24xx_pwmclk_tclk(id)) 351 if (parent == s3c24xx_pwmclk_tclk(id))
343 bits = S3C_TCFG1_MUX_TCLK << shift; 352 bits = mux_tclk << shift;
344 else if (parent == s3c24xx_pwmclk_tdiv(id)) 353 else if (parent == s3c24xx_pwmclk_tdiv(id))
345 bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift; 354 bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift;
346 else 355 else
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-21 23:04:37 -0400