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-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-helper-board.c20
-rw-r--r--arch/mips/include/asm/octeon/cvmx-bootinfo.h72
-rw-r--r--arch/mips/include/asm/octeon/cvmx-helper-board.h6
3 files changed, 95 insertions, 3 deletions
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
index 71590a35163..fd2015331a2 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
@@ -117,6 +117,10 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
117 case CVMX_BOARD_TYPE_EBH5200: 117 case CVMX_BOARD_TYPE_EBH5200:
118 case CVMX_BOARD_TYPE_EBH5201: 118 case CVMX_BOARD_TYPE_EBH5201:
119 case CVMX_BOARD_TYPE_EBT5200: 119 case CVMX_BOARD_TYPE_EBT5200:
120 /* Board has 2 management ports */
121 if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) &&
122 (ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2)))
123 return ipd_port - CVMX_HELPER_BOARD_MGMT_IPD_PORT;
120 /* 124 /*
121 * Board has 4 SGMII ports. The PHYs start right after the MII 125 * Board has 4 SGMII ports. The PHYs start right after the MII
122 * ports MII0 = 0, MII1 = 1, SGMII = 2-5. 126 * ports MII0 = 0, MII1 = 1, SGMII = 2-5.
@@ -128,6 +132,9 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
128 case CVMX_BOARD_TYPE_EBH5600: 132 case CVMX_BOARD_TYPE_EBH5600:
129 case CVMX_BOARD_TYPE_EBH5601: 133 case CVMX_BOARD_TYPE_EBH5601:
130 case CVMX_BOARD_TYPE_EBH5610: 134 case CVMX_BOARD_TYPE_EBH5610:
135 /* Board has 1 management port */
136 if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
137 return 0;
131 /* 138 /*
132 * Board has 8 SGMII ports. 4 connect out, two connect 139 * Board has 8 SGMII ports. 4 connect out, two connect
133 * to a switch, and 2 loop to each other 140 * to a switch, and 2 loop to each other
@@ -147,6 +154,19 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
147 return ipd_port - 16 + 1; 154 return ipd_port - 16 + 1;
148 else 155 else
149 return -1; 156 return -1;
157 case CVMX_BOARD_TYPE_NIC_XLE_10G:
158 case CVMX_BOARD_TYPE_NIC10E:
159 return -1;
160 case CVMX_BOARD_TYPE_NIC4E:
161 if (ipd_port >= 0 && ipd_port <= 3)
162 return (ipd_port + 0x1f) & 0x1f;
163 else
164 return -1;
165 case CVMX_BOARD_TYPE_NIC2E:
166 if (ipd_port >= 0 && ipd_port <= 1)
167 return ipd_port + 1;
168 else
169 return -1;
150 case CVMX_BOARD_TYPE_BBGW_REF: 170 case CVMX_BOARD_TYPE_BBGW_REF:
151 /* 171 /*
152 * No PHYs are connected to Octeon, everything is 172 * No PHYs are connected to Octeon, everything is
diff --git a/arch/mips/include/asm/octeon/cvmx-bootinfo.h b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
index d9d1668ac77..1db1dc2724c 100644
--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
@@ -170,6 +170,22 @@ enum cvmx_board_types_enum {
170 /* Special 'generic' board type, supports many boards */ 170 /* Special 'generic' board type, supports many boards */
171 CVMX_BOARD_TYPE_GENERIC = 28, 171 CVMX_BOARD_TYPE_GENERIC = 28,
172 CVMX_BOARD_TYPE_EBH5610 = 29, 172 CVMX_BOARD_TYPE_EBH5610 = 29,
173 CVMX_BOARD_TYPE_LANAI2_A = 30,
174 CVMX_BOARD_TYPE_LANAI2_U = 31,
175 CVMX_BOARD_TYPE_EBB5600 = 32,
176 CVMX_BOARD_TYPE_EBB6300 = 33,
177 CVMX_BOARD_TYPE_NIC_XLE_10G = 34,
178 CVMX_BOARD_TYPE_LANAI2_G = 35,
179 CVMX_BOARD_TYPE_EBT5810 = 36,
180 CVMX_BOARD_TYPE_NIC10E = 37,
181 CVMX_BOARD_TYPE_EP6300C = 38,
182 CVMX_BOARD_TYPE_EBB6800 = 39,
183 CVMX_BOARD_TYPE_NIC4E = 40,
184 CVMX_BOARD_TYPE_NIC2E = 41,
185 CVMX_BOARD_TYPE_EBB6600 = 42,
186 CVMX_BOARD_TYPE_REDWING = 43,
187 CVMX_BOARD_TYPE_NIC68_4 = 44,
188 CVMX_BOARD_TYPE_NIC10E_66 = 45,
173 CVMX_BOARD_TYPE_MAX, 189 CVMX_BOARD_TYPE_MAX,
174 190
175 /* 191 /*
@@ -187,6 +203,23 @@ enum cvmx_board_types_enum {
187 CVMX_BOARD_TYPE_CUST_NS0216 = 10002, 203 CVMX_BOARD_TYPE_CUST_NS0216 = 10002,
188 CVMX_BOARD_TYPE_CUST_NB5 = 10003, 204 CVMX_BOARD_TYPE_CUST_NB5 = 10003,
189 CVMX_BOARD_TYPE_CUST_WMR500 = 10004, 205 CVMX_BOARD_TYPE_CUST_WMR500 = 10004,
206 CVMX_BOARD_TYPE_CUST_ITB101 = 10005,
207 CVMX_BOARD_TYPE_CUST_NTE102 = 10006,
208 CVMX_BOARD_TYPE_CUST_AGS103 = 10007,
209 CVMX_BOARD_TYPE_CUST_GST104 = 10008,
210 CVMX_BOARD_TYPE_CUST_GCT105 = 10009,
211 CVMX_BOARD_TYPE_CUST_AGS106 = 10010,
212 CVMX_BOARD_TYPE_CUST_SGM107 = 10011,
213 CVMX_BOARD_TYPE_CUST_GCT108 = 10012,
214 CVMX_BOARD_TYPE_CUST_AGS109 = 10013,
215 CVMX_BOARD_TYPE_CUST_GCT110 = 10014,
216 CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER = 10015,
217 CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER = 10016,
218 CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX = 10017,
219 CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX = 10018,
220 CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX = 10019,
221 CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX = 10020,
222 CVMX_BOARD_TYPE_CUST_L2_ZINWELL = 10021,
190 CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000, 223 CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000,
191 224
192 /* 225 /*
@@ -247,6 +280,22 @@ static inline const char *cvmx_board_type_to_string(enum
247 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200) 280 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200)
248 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC) 281 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC)
249 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610) 282 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610)
283 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_A)
284 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_U)
285 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB5600)
286 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6300)
287 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_10G)
288 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_G)
289 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5810)
290 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E)
291 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EP6300C)
292 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6800)
293 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC4E)
294 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC2E)
295 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6600)
296 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_REDWING)
297 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC68_4)
298 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E_66)
250 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX) 299 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX)
251 300
252 /* Customer boards listed here */ 301 /* Customer boards listed here */
@@ -255,6 +304,23 @@ static inline const char *cvmx_board_type_to_string(enum
255 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216) 304 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216)
256 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5) 305 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5)
257 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500) 306 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500)
307 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_ITB101)
308 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NTE102)
309 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS103)
310 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GST104)
311 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT105)
312 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS106)
313 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_SGM107)
314 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT108)
315 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS109)
316 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT110)
317 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER)
318 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER)
319 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX)
320 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX)
321 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX)
322 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX)
323 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ZINWELL)
258 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX) 324 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX)
259 325
260 /* Customer private range */ 326 /* Customer private range */
@@ -271,9 +337,9 @@ static inline const char *cvmx_chip_type_to_string(enum
271{ 337{
272 switch (type) { 338 switch (type) {
273 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL) 339 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL)
274 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED) 340 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED)
275 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE) 341 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE)
276 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX) 342 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX)
277 } 343 }
278 return "Unsupported Chip"; 344 return "Unsupported Chip";
279} 345}
diff --git a/arch/mips/include/asm/octeon/cvmx-helper-board.h b/arch/mips/include/asm/octeon/cvmx-helper-board.h
index b465bec4355..88527fa835c 100644
--- a/arch/mips/include/asm/octeon/cvmx-helper-board.h
+++ b/arch/mips/include/asm/octeon/cvmx-helper-board.h
@@ -44,6 +44,12 @@ typedef enum {
44 set_phy_link_flags_flow_control_mask = 0x3 << 1, /* Mask for 2 bit wide flow control field */ 44 set_phy_link_flags_flow_control_mask = 0x3 << 1, /* Mask for 2 bit wide flow control field */
45} cvmx_helper_board_set_phy_link_flags_types_t; 45} cvmx_helper_board_set_phy_link_flags_types_t;
46 46
47/*
48 * Fake IPD port, the RGMII/MII interface may use different PHY, use
49 * this macro to return appropriate MIX address to read the PHY.
50 */
51#define CVMX_HELPER_BOARD_MGMT_IPD_PORT -10
52
47/** 53/**
48 * cvmx_override_board_link_get(int ipd_port) is a function 54 * cvmx_override_board_link_get(int ipd_port) is a function
49 * pointer. It is meant to allow customization of the process of 55 * pointer. It is meant to allow customization of the process of