14 files changed, 18 insertions, 18 deletions

diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index a6910114b24..a21b12f06c6 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -164,7 +164,7 @@ static void lh7a40x_ack_cpld_irq (u32 irq)
         /* CPLD doesn't have ack capability, but some devices may */
 
 #if defined (CPLD_INTMASK_TOUCH)
-        /* The touch control *must* mask the the interrupt because the
+        /* The touch control *must* mask the interrupt because the
          * interrupt bit is read by the driver to determine if the pen
          * is still down. */
         if (irq == IRQ_TOUCH)
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index af219e51734..8ff1c6fb5aa 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -682,7 +682,7 @@ config EFI
         depends on ACPI
         default n
         ---help---
-        This enables the the kernel to boot on EFI platforms using
+        This enables the kernel to boot on EFI platforms using
         system configuration information passed to it from the firmware.
         This also enables the kernel to use any EFI runtime services that are
         available (such as the EFI variable services).
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c
index 83c3645ccc4..b60d7e8689e 100644
--- a/arch/i386/pci/fixup.c
+++ b/arch/i386/pci/fixup.c
@@ -393,7 +393,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
  * We pretend to bring them out of full D3 state, and restore the proper
  * IRQ, PCI cache line size, and BARs, otherwise the device won't function
  * properly.  In some cases, the device will generate an interrupt on
- * the wrong IRQ line, causing any devices sharing the the line it's
+ * the wrong IRQ line, causing any devices sharing the line it's
  * *supposed* to use to be disabled by the kernel's IRQ debug code.
  */
 static u16 toshiba_line_size;
diff --git a/arch/ia64/sn/kernel/xpnet.c b/arch/ia64/sn/kernel/xpnet.c
index 007703c494a..c8173db0d84 100644
--- a/arch/ia64/sn/kernel/xpnet.c
+++ b/arch/ia64/sn/kernel/xpnet.c
@@ -225,7 +225,7 @@ xpnet_receive(partid_t partid, int channel, struct xpnet_message *msg)
         skb_put(skb, (msg->size - msg->leadin_ignore - msg->tailout_ignore));
 
         /*
-         * Move the data over from the the other side.
+         * Move the data over from the other side.
          */
         if ((XPNET_VERSION_MINOR(msg->version) == 1) &&
                                                 (msg->embedded_bytes != 0)) {
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index e767f2ddae7..b7c942cf774 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -495,7 +495,7 @@ config VECTORBASE
         hex "Address of the base of system vectors"
         default "0"
         help
-          Define the address of the the system vectors. Commonly this is
+          Define the address of the system vectors. Commonly this is
           put at the start of RAM, but it doesn't have to be. On ColdFire
           platforms this address is programmed into the VBR register, thus
           actually setting the address to use.
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 375e0991505..6f8b25cfa6f 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1211,7 +1211,7 @@ static void __init build_r4000_tlb_refill_handler(void)
          * Overflow check: For the 64bit handler, we need at least one
          * free instruction slot for the wrap-around branch. In worst
          * case, if the intended insertion point is a delay slot, we
-         * need three, with the the second nop'ed and the third being
+         * need three, with the second nop'ed and the third being
          * unused.
          */
 #ifdef CONFIG_32BIT
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 95c1b8ec428..192357a3b9f 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -941,8 +941,8 @@ syscall_exit_rfi:
          * to "proper" values now (otherwise we'll wind up restoring
          * whatever was last stored in the task structure, which might
          * be inconsistent if an interrupt occured while on the gateway
-         * page) Note that we may be "trashing" values the user put in
-         * them, but we don't support the the user changing them.
+         * page). Note that we may be "trashing" values the user put in
+         * them, but we don't support the user changing them.
          */
 
         STREG   %r0,PT_SR2(%r16)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 032e6ab5d3c..96ef656e466 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1002,7 +1002,7 @@ config CONSISTENT_START_BOOL
         depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
         help
           This option allows you to set the base virtual address
-          of the the consistent memory pool.  This pool of virtual
+          of the consistent memory pool.  This pool of virtual
           memory is used to make consistent memory allocations.
 
 config CONSISTENT_START
@@ -1013,7 +1013,7 @@ config CONSISTENT_SIZE_BOOL
         bool "Set custom consistent memory pool size"
         depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
         help
-          This option allows you to set the size of the the
+          This option allows you to set the size of the
           consistent memory pool.  This pool of virtual memory
           is used to make consistent memory allocations.
 
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index fdd9e7b6624..077711e6310 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -1345,7 +1345,7 @@ config CONSISTENT_START_BOOL
         depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
         help
           This option allows you to set the base virtual address
-          of the the consistent memory pool.  This pool of virtual
+          of the consistent memory pool.  This pool of virtual
           memory is used to make consistent memory allocations.
 
 config CONSISTENT_START
@@ -1356,7 +1356,7 @@ config CONSISTENT_SIZE_BOOL
         bool "Set custom consistent memory pool size"
         depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
         help
-          This option allows you to set the size of the the
+          This option allows you to set the size of the
           consistent memory pool.  This pool of virtual memory
           is used to make consistent memory allocations.
 
diff --git a/arch/um/Makefile b/arch/um/Makefile
index f6ad832faf1..c8016a98483 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -102,7 +102,7 @@ linux: vmlinux
 define archhelp
   echo '* linux         - Binary kernel image (./linux) - for backward'
   echo '                   compatibility only, this creates a hard link to the'
-  echo '                   real kernel binary, the the "vmlinux" binary you'
+  echo '                   real kernel binary, the "vmlinux" binary you'
   echo '                   find in the kernel root.'
 endef
 
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index 24747a41378..cfd9f01fd46 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -497,7 +497,7 @@ void close_lines(struct line *lines, int nlines)
 }
 
 /* Common setup code for both startup command line and mconsole initialization.
- * @lines contains the the array (of size @num) to modify;
+ * @lines contains the array (of size @num) to modify;
  * @init is the setup string;
  */
 
diff --git a/arch/um/include/sysdep-x86_64/ptrace_user.h b/arch/um/include/sysdep-x86_64/ptrace_user.h
index 128faf02736..4cd61a852fa 100644
--- a/arch/um/include/sysdep-x86_64/ptrace_user.h
+++ b/arch/um/include/sysdep-x86_64/ptrace_user.h
@@ -55,7 +55,7 @@
 #define PTRACE_OLDSETOPTIONS 21
 #endif
 
-/* These are before the system call, so the the system call number is RAX
+/* These are before the system call, so the system call number is RAX
  * rather than ORIG_RAX, and arg4 is R10 rather than RCX
  */
 #define REGS_SYSCALL_NR PT_INDEX(RAX)
diff --git a/arch/v850/kernel/entry.S b/arch/v850/kernel/entry.S
index d991e4547db..8bc521ca081 100644
--- a/arch/v850/kernel/entry.S
+++ b/arch/v850/kernel/entry.S
@@ -195,7 +195,7 @@
         sst.w   lp, PTO+PT_GPR(GPR_LP)[ep];                                   \
         type ## _STATE_SAVER
 /* Pop a register state pushed by PUSH_STATE, except for the stack pointer,
-   from the the stack.  */
+   from the stack.  */
 #define POP_STATE(type)                                                       \
         mov     sp, ep;                                                       \
         type ## _STATE_RESTORER;                                              \
diff --git a/arch/xtensa/lib/usercopy.S b/arch/xtensa/lib/usercopy.S
index 265db2693cb..4641ef510f0 100644
--- a/arch/xtensa/lib/usercopy.S
+++ b/arch/xtensa/lib/usercopy.S
@@ -5,10 +5,10 @@
  *
  *  DO NOT COMBINE this function with <arch/xtensa/lib/hal/memcopy.S>.
  *  It needs to remain separate and distinct.  The hal files are part
- *  of the the Xtensa link-time HAL, and those files may differ per
+ *  of the Xtensa link-time HAL, and those files may differ per
  *  processor configuration.  Patching the kernel for another
  *  processor configuration includes replacing the hal files, and we
- *  could loose the special functionality for accessing user-space
+ *  could lose the special functionality for accessing user-space
  *  memory during such a patch.  We sacrifice a little code space here
  *  in favor to simplify code maintenance.
  *