diff options
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_ds.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index b4680daecf1..242369488e7 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c | |||
@@ -333,11 +333,10 @@ static void intel_pmu_pebs_enable(struct perf_event *event) | |||
333 | { | 333 | { |
334 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 334 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
335 | struct hw_perf_event *hwc = &event->hw; | 335 | struct hw_perf_event *hwc = &event->hw; |
336 | u64 val = cpuc->pebs_enabled; | ||
337 | 336 | ||
338 | hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT; | 337 | hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT; |
339 | 338 | ||
340 | val |= 1ULL << hwc->idx; | 339 | cpuc->pebs_enabled |= 1ULL << hwc->idx; |
341 | WARN_ON_ONCE(cpuc->enabled); | 340 | WARN_ON_ONCE(cpuc->enabled); |
342 | 341 | ||
343 | if (x86_pmu.intel_cap.pebs_trap) | 342 | if (x86_pmu.intel_cap.pebs_trap) |
@@ -348,11 +347,10 @@ static void intel_pmu_pebs_disable(struct perf_event *event) | |||
348 | { | 347 | { |
349 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 348 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
350 | struct hw_perf_event *hwc = &event->hw; | 349 | struct hw_perf_event *hwc = &event->hw; |
351 | u64 val = cpuc->pebs_enabled; | ||
352 | 350 | ||
353 | val &= ~(1ULL << hwc->idx); | 351 | cpuc->pebs_enabled &= ~(1ULL << hwc->idx); |
354 | if (cpuc->enabled) | 352 | if (cpuc->enabled) |
355 | wrmsrl(MSR_IA32_PEBS_ENABLE, val); | 353 | wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled); |
356 | 354 | ||
357 | hwc->config |= ARCH_PERFMON_EVENTSEL_INT; | 355 | hwc->config |= ARCH_PERFMON_EVENTSEL_INT; |
358 | 356 | ||