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-rw-r--r--arch/x86/kvm/mmu.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index d5455b1b725..91a19466743 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -3228,7 +3228,6 @@ static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3228 kvm_release_pfn_clean(pfn); 3228 kvm_release_pfn_clean(pfn);
3229 return; 3229 return;
3230 } 3230 }
3231 vcpu->arch.update_pte.gfn = gfn;
3232 vcpu->arch.update_pte.pfn = pfn; 3231 vcpu->arch.update_pte.pfn = pfn;
3233} 3232}
3234 3233
@@ -3275,9 +3274,8 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3275 3274
3276 /* 3275 /*
3277 * Assume that the pte write on a page table of the same type 3276 * Assume that the pte write on a page table of the same type
3278 * as the current vcpu paging mode. This is nearly always true 3277 * as the current vcpu paging mode since we update the sptes only
3279 * (might be false while changing modes). Note it is verified later 3278 * when they have the same mode.
3280 * by update_pte().
3281 */ 3279 */
3282 if ((is_pae(vcpu) && bytes == 4) || !new) { 3280 if ((is_pae(vcpu) && bytes == 4) || !new) {
3283 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ 3281 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */