diff options
Diffstat (limited to 'arch/x86/kernel/cpu/common.c')
-rw-r--r-- | arch/x86/kernel/cpu/common.c | 405 |
1 files changed, 223 insertions, 182 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 826d5c87627..c4f667896c2 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -1,52 +1,50 @@ | |||
1 | #include <linux/init.h> | ||
2 | #include <linux/kernel.h> | ||
3 | #include <linux/sched.h> | ||
4 | #include <linux/string.h> | ||
5 | #include <linux/bootmem.h> | 1 | #include <linux/bootmem.h> |
2 | #include <linux/linkage.h> | ||
6 | #include <linux/bitops.h> | 3 | #include <linux/bitops.h> |
4 | #include <linux/kernel.h> | ||
7 | #include <linux/module.h> | 5 | #include <linux/module.h> |
8 | #include <linux/kgdb.h> | 6 | #include <linux/percpu.h> |
9 | #include <linux/topology.h> | 7 | #include <linux/string.h> |
10 | #include <linux/delay.h> | 8 | #include <linux/delay.h> |
9 | #include <linux/sched.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/kgdb.h> | ||
11 | #include <linux/smp.h> | 12 | #include <linux/smp.h> |
12 | #include <linux/percpu.h> | 13 | #include <linux/io.h> |
13 | #include <asm/i387.h> | 14 | |
14 | #include <asm/msr.h> | 15 | #include <asm/stackprotector.h> |
15 | #include <asm/io.h> | ||
16 | #include <asm/linkage.h> | ||
17 | #include <asm/mmu_context.h> | 16 | #include <asm/mmu_context.h> |
17 | #include <asm/hypervisor.h> | ||
18 | #include <asm/processor.h> | ||
19 | #include <asm/sections.h> | ||
20 | #include <asm/topology.h> | ||
21 | #include <asm/cpumask.h> | ||
22 | #include <asm/pgtable.h> | ||
23 | #include <asm/atomic.h> | ||
24 | #include <asm/proto.h> | ||
25 | #include <asm/setup.h> | ||
26 | #include <asm/apic.h> | ||
27 | #include <asm/desc.h> | ||
28 | #include <asm/i387.h> | ||
18 | #include <asm/mtrr.h> | 29 | #include <asm/mtrr.h> |
30 | #include <asm/numa.h> | ||
31 | #include <asm/asm.h> | ||
32 | #include <asm/cpu.h> | ||
19 | #include <asm/mce.h> | 33 | #include <asm/mce.h> |
34 | #include <asm/msr.h> | ||
20 | #include <asm/pat.h> | 35 | #include <asm/pat.h> |
21 | #include <asm/asm.h> | ||
22 | #include <asm/numa.h> | ||
23 | #include <asm/smp.h> | 36 | #include <asm/smp.h> |
24 | #include <asm/cpu.h> | ||
25 | #include <asm/cpumask.h> | ||
26 | #include <asm/apic.h> | ||
27 | 37 | ||
28 | #ifdef CONFIG_X86_LOCAL_APIC | 38 | #ifdef CONFIG_X86_LOCAL_APIC |
29 | #include <asm/uv/uv.h> | 39 | #include <asm/uv/uv.h> |
30 | #endif | 40 | #endif |
31 | 41 | ||
32 | #include <asm/pgtable.h> | ||
33 | #include <asm/processor.h> | ||
34 | #include <asm/desc.h> | ||
35 | #include <asm/atomic.h> | ||
36 | #include <asm/proto.h> | ||
37 | #include <asm/sections.h> | ||
38 | #include <asm/setup.h> | ||
39 | #include <asm/hypervisor.h> | ||
40 | #include <asm/stackprotector.h> | ||
41 | |||
42 | #include "cpu.h" | 42 | #include "cpu.h" |
43 | 43 | ||
44 | #ifdef CONFIG_X86_64 | ||
45 | |||
46 | /* all of these masks are initialized in setup_cpu_local_masks() */ | 44 | /* all of these masks are initialized in setup_cpu_local_masks() */ |
47 | cpumask_var_t cpu_callin_mask; | ||
48 | cpumask_var_t cpu_callout_mask; | ||
49 | cpumask_var_t cpu_initialized_mask; | 45 | cpumask_var_t cpu_initialized_mask; |
46 | cpumask_var_t cpu_callout_mask; | ||
47 | cpumask_var_t cpu_callin_mask; | ||
50 | 48 | ||
51 | /* representing cpus for which sibling maps can be computed */ | 49 | /* representing cpus for which sibling maps can be computed */ |
52 | cpumask_var_t cpu_sibling_setup_mask; | 50 | cpumask_var_t cpu_sibling_setup_mask; |
@@ -60,17 +58,7 @@ void __init setup_cpu_local_masks(void) | |||
60 | alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask); | 58 | alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask); |
61 | } | 59 | } |
62 | 60 | ||
63 | #else /* CONFIG_X86_32 */ | 61 | static const struct cpu_dev *this_cpu __cpuinitdata; |
64 | |||
65 | cpumask_t cpu_callin_map; | ||
66 | cpumask_t cpu_callout_map; | ||
67 | cpumask_t cpu_initialized; | ||
68 | cpumask_t cpu_sibling_setup_map; | ||
69 | |||
70 | #endif /* CONFIG_X86_32 */ | ||
71 | |||
72 | |||
73 | static struct cpu_dev *this_cpu __cpuinitdata; | ||
74 | 62 | ||
75 | DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { | 63 | DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { |
76 | #ifdef CONFIG_X86_64 | 64 | #ifdef CONFIG_X86_64 |
@@ -79,48 +67,48 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { | |||
79 | * IRET will check the segment types kkeil 2000/10/28 | 67 | * IRET will check the segment types kkeil 2000/10/28 |
80 | * Also sysret mandates a special GDT layout | 68 | * Also sysret mandates a special GDT layout |
81 | * | 69 | * |
82 | * The TLS descriptors are currently at a different place compared to i386. | 70 | * TLS descriptors are currently at a different place compared to i386. |
83 | * Hopefully nobody expects them at a fixed place (Wine?) | 71 | * Hopefully nobody expects them at a fixed place (Wine?) |
84 | */ | 72 | */ |
85 | [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } }, | 73 | [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } }, |
86 | [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } }, | 74 | [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } }, |
87 | [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } }, | 75 | [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } }, |
88 | [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } }, | 76 | [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } }, |
89 | [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } }, | 77 | [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } }, |
90 | [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } }, | 78 | [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } }, |
91 | #else | 79 | #else |
92 | [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } }, | 80 | [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } }, |
93 | [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } }, | 81 | [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } }, |
94 | [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } }, | 82 | [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } }, |
95 | [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff200 } } }, | 83 | [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff200 } } }, |
96 | /* | 84 | /* |
97 | * Segments used for calling PnP BIOS have byte granularity. | 85 | * Segments used for calling PnP BIOS have byte granularity. |
98 | * They code segments and data segments have fixed 64k limits, | 86 | * They code segments and data segments have fixed 64k limits, |
99 | * the transfer segment sizes are set at run time. | 87 | * the transfer segment sizes are set at run time. |
100 | */ | 88 | */ |
101 | /* 32-bit code */ | 89 | /* 32-bit code */ |
102 | [GDT_ENTRY_PNPBIOS_CS32] = { { { 0x0000ffff, 0x00409a00 } } }, | 90 | [GDT_ENTRY_PNPBIOS_CS32] = { { { 0x0000ffff, 0x00409a00 } } }, |
103 | /* 16-bit code */ | 91 | /* 16-bit code */ |
104 | [GDT_ENTRY_PNPBIOS_CS16] = { { { 0x0000ffff, 0x00009a00 } } }, | 92 | [GDT_ENTRY_PNPBIOS_CS16] = { { { 0x0000ffff, 0x00009a00 } } }, |
105 | /* 16-bit data */ | 93 | /* 16-bit data */ |
106 | [GDT_ENTRY_PNPBIOS_DS] = { { { 0x0000ffff, 0x00009200 } } }, | 94 | [GDT_ENTRY_PNPBIOS_DS] = { { { 0x0000ffff, 0x00009200 } } }, |
107 | /* 16-bit data */ | 95 | /* 16-bit data */ |
108 | [GDT_ENTRY_PNPBIOS_TS1] = { { { 0x00000000, 0x00009200 } } }, | 96 | [GDT_ENTRY_PNPBIOS_TS1] = { { { 0x00000000, 0x00009200 } } }, |
109 | /* 16-bit data */ | 97 | /* 16-bit data */ |
110 | [GDT_ENTRY_PNPBIOS_TS2] = { { { 0x00000000, 0x00009200 } } }, | 98 | [GDT_ENTRY_PNPBIOS_TS2] = { { { 0x00000000, 0x00009200 } } }, |
111 | /* | 99 | /* |
112 | * The APM segments have byte granularity and their bases | 100 | * The APM segments have byte granularity and their bases |
113 | * are set at run time. All have 64k limits. | 101 | * are set at run time. All have 64k limits. |
114 | */ | 102 | */ |
115 | /* 32-bit code */ | 103 | /* 32-bit code */ |
116 | [GDT_ENTRY_APMBIOS_BASE] = { { { 0x0000ffff, 0x00409a00 } } }, | 104 | [GDT_ENTRY_APMBIOS_BASE] = { { { 0x0000ffff, 0x00409a00 } } }, |
117 | /* 16-bit code */ | 105 | /* 16-bit code */ |
118 | [GDT_ENTRY_APMBIOS_BASE+1] = { { { 0x0000ffff, 0x00009a00 } } }, | 106 | [GDT_ENTRY_APMBIOS_BASE+1] = { { { 0x0000ffff, 0x00009a00 } } }, |
119 | /* data */ | 107 | /* data */ |
120 | [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } }, | 108 | [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } }, |
121 | 109 | ||
122 | [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } }, | 110 | [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } }, |
123 | [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } }, | 111 | [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } }, |
124 | GDT_STACK_CANARY_INIT | 112 | GDT_STACK_CANARY_INIT |
125 | #endif | 113 | #endif |
126 | } }; | 114 | } }; |
@@ -164,16 +152,17 @@ static inline int flag_is_changeable_p(u32 flag) | |||
164 | * the CPUID. Add "volatile" to not allow gcc to | 152 | * the CPUID. Add "volatile" to not allow gcc to |
165 | * optimize the subsequent calls to this function. | 153 | * optimize the subsequent calls to this function. |
166 | */ | 154 | */ |
167 | asm volatile ("pushfl\n\t" | 155 | asm volatile ("pushfl \n\t" |
168 | "pushfl\n\t" | 156 | "pushfl \n\t" |
169 | "popl %0\n\t" | 157 | "popl %0 \n\t" |
170 | "movl %0,%1\n\t" | 158 | "movl %0, %1 \n\t" |
171 | "xorl %2,%0\n\t" | 159 | "xorl %2, %0 \n\t" |
172 | "pushl %0\n\t" | 160 | "pushl %0 \n\t" |
173 | "popfl\n\t" | 161 | "popfl \n\t" |
174 | "pushfl\n\t" | 162 | "pushfl \n\t" |
175 | "popl %0\n\t" | 163 | "popl %0 \n\t" |
176 | "popfl\n\t" | 164 | "popfl \n\t" |
165 | |||
177 | : "=&r" (f1), "=&r" (f2) | 166 | : "=&r" (f1), "=&r" (f2) |
178 | : "ir" (flag)); | 167 | : "ir" (flag)); |
179 | 168 | ||
@@ -188,18 +177,22 @@ static int __cpuinit have_cpuid_p(void) | |||
188 | 177 | ||
189 | static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c) | 178 | static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c) |
190 | { | 179 | { |
191 | if (cpu_has(c, X86_FEATURE_PN) && disable_x86_serial_nr) { | 180 | unsigned long lo, hi; |
192 | /* Disable processor serial number */ | 181 | |
193 | unsigned long lo, hi; | 182 | if (!cpu_has(c, X86_FEATURE_PN) || !disable_x86_serial_nr) |
194 | rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi); | 183 | return; |
195 | lo |= 0x200000; | 184 | |
196 | wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi); | 185 | /* Disable processor serial number: */ |
197 | printk(KERN_NOTICE "CPU serial number disabled.\n"); | 186 | |
198 | clear_cpu_cap(c, X86_FEATURE_PN); | 187 | rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi); |
199 | 188 | lo |= 0x200000; | |
200 | /* Disabling the serial number may affect the cpuid level */ | 189 | wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi); |
201 | c->cpuid_level = cpuid_eax(0); | 190 | |
202 | } | 191 | printk(KERN_NOTICE "CPU serial number disabled.\n"); |
192 | clear_cpu_cap(c, X86_FEATURE_PN); | ||
193 | |||
194 | /* Disabling the serial number may affect the cpuid level */ | ||
195 | c->cpuid_level = cpuid_eax(0); | ||
203 | } | 196 | } |
204 | 197 | ||
205 | static int __init x86_serial_nr_setup(char *s) | 198 | static int __init x86_serial_nr_setup(char *s) |
@@ -232,6 +225,7 @@ struct cpuid_dependent_feature { | |||
232 | u32 feature; | 225 | u32 feature; |
233 | u32 level; | 226 | u32 level; |
234 | }; | 227 | }; |
228 | |||
235 | static const struct cpuid_dependent_feature __cpuinitconst | 229 | static const struct cpuid_dependent_feature __cpuinitconst |
236 | cpuid_dependent_features[] = { | 230 | cpuid_dependent_features[] = { |
237 | { X86_FEATURE_MWAIT, 0x00000005 }, | 231 | { X86_FEATURE_MWAIT, 0x00000005 }, |
@@ -243,7 +237,11 @@ cpuid_dependent_features[] = { | |||
243 | static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) | 237 | static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) |
244 | { | 238 | { |
245 | const struct cpuid_dependent_feature *df; | 239 | const struct cpuid_dependent_feature *df; |
240 | |||
246 | for (df = cpuid_dependent_features; df->feature; df++) { | 241 | for (df = cpuid_dependent_features; df->feature; df++) { |
242 | |||
243 | if (!cpu_has(c, df->feature)) | ||
244 | continue; | ||
247 | /* | 245 | /* |
248 | * Note: cpuid_level is set to -1 if unavailable, but | 246 | * Note: cpuid_level is set to -1 if unavailable, but |
249 | * extended_extended_level is set to 0 if unavailable | 247 | * extended_extended_level is set to 0 if unavailable |
@@ -251,32 +249,32 @@ static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) | |||
251 | * when signed; hence the weird messing around with | 249 | * when signed; hence the weird messing around with |
252 | * signs here... | 250 | * signs here... |
253 | */ | 251 | */ |
254 | if (cpu_has(c, df->feature) && | 252 | if (!((s32)df->level < 0 ? |
255 | ((s32)df->level < 0 ? | ||
256 | (u32)df->level > (u32)c->extended_cpuid_level : | 253 | (u32)df->level > (u32)c->extended_cpuid_level : |
257 | (s32)df->level > (s32)c->cpuid_level)) { | 254 | (s32)df->level > (s32)c->cpuid_level)) |
258 | clear_cpu_cap(c, df->feature); | 255 | continue; |
259 | if (warn) | 256 | |
260 | printk(KERN_WARNING | 257 | clear_cpu_cap(c, df->feature); |
261 | "CPU: CPU feature %s disabled " | 258 | if (!warn) |
262 | "due to lack of CPUID level 0x%x\n", | 259 | continue; |
263 | x86_cap_flags[df->feature], | 260 | |
264 | df->level); | 261 | printk(KERN_WARNING |
265 | } | 262 | "CPU: CPU feature %s disabled, no CPUID level 0x%x\n", |
263 | x86_cap_flags[df->feature], df->level); | ||
266 | } | 264 | } |
267 | } | 265 | } |
268 | 266 | ||
269 | /* | 267 | /* |
270 | * Naming convention should be: <Name> [(<Codename>)] | 268 | * Naming convention should be: <Name> [(<Codename>)] |
271 | * This table only is used unless init_<vendor>() below doesn't set it; | 269 | * This table only is used unless init_<vendor>() below doesn't set it; |
272 | * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used | 270 | * in particular, if CPUID levels 0x80000002..4 are supported, this |
273 | * | 271 | * isn't used |
274 | */ | 272 | */ |
275 | 273 | ||
276 | /* Look up CPU names by table lookup. */ | 274 | /* Look up CPU names by table lookup. */ |
277 | static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c) | 275 | static const char *__cpuinit table_lookup_model(struct cpuinfo_x86 *c) |
278 | { | 276 | { |
279 | struct cpu_model_info *info; | 277 | const struct cpu_model_info *info; |
280 | 278 | ||
281 | if (c->x86_model >= 16) | 279 | if (c->x86_model >= 16) |
282 | return NULL; /* Range check */ | 280 | return NULL; /* Range check */ |
@@ -307,8 +305,10 @@ void load_percpu_segment(int cpu) | |||
307 | load_stack_canary_segment(); | 305 | load_stack_canary_segment(); |
308 | } | 306 | } |
309 | 307 | ||
310 | /* Current gdt points %fs at the "master" per-cpu area: after this, | 308 | /* |
311 | * it's on the real one. */ | 309 | * Current gdt points %fs at the "master" per-cpu area: after this, |
310 | * it's on the real one. | ||
311 | */ | ||
312 | void switch_to_new_gdt(int cpu) | 312 | void switch_to_new_gdt(int cpu) |
313 | { | 313 | { |
314 | struct desc_ptr gdt_descr; | 314 | struct desc_ptr gdt_descr; |
@@ -321,7 +321,7 @@ void switch_to_new_gdt(int cpu) | |||
321 | load_percpu_segment(cpu); | 321 | load_percpu_segment(cpu); |
322 | } | 322 | } |
323 | 323 | ||
324 | static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; | 324 | static const struct cpu_dev *__cpuinitdata cpu_devs[X86_VENDOR_NUM] = {}; |
325 | 325 | ||
326 | static void __cpuinit default_init(struct cpuinfo_x86 *c) | 326 | static void __cpuinit default_init(struct cpuinfo_x86 *c) |
327 | { | 327 | { |
@@ -340,7 +340,7 @@ static void __cpuinit default_init(struct cpuinfo_x86 *c) | |||
340 | #endif | 340 | #endif |
341 | } | 341 | } |
342 | 342 | ||
343 | static struct cpu_dev __cpuinitdata default_cpu = { | 343 | static const struct cpu_dev __cpuinitconst default_cpu = { |
344 | .c_init = default_init, | 344 | .c_init = default_init, |
345 | .c_vendor = "Unknown", | 345 | .c_vendor = "Unknown", |
346 | .c_x86_vendor = X86_VENDOR_UNKNOWN, | 346 | .c_x86_vendor = X86_VENDOR_UNKNOWN, |
@@ -354,22 +354,24 @@ static void __cpuinit get_model_name(struct cpuinfo_x86 *c) | |||
354 | if (c->extended_cpuid_level < 0x80000004) | 354 | if (c->extended_cpuid_level < 0x80000004) |
355 | return; | 355 | return; |
356 | 356 | ||
357 | v = (unsigned int *) c->x86_model_id; | 357 | v = (unsigned int *)c->x86_model_id; |
358 | cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); | 358 | cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); |
359 | cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); | 359 | cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); |
360 | cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); | 360 | cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); |
361 | c->x86_model_id[48] = 0; | 361 | c->x86_model_id[48] = 0; |
362 | 362 | ||
363 | /* Intel chips right-justify this string for some dumb reason; | 363 | /* |
364 | undo that brain damage */ | 364 | * Intel chips right-justify this string for some dumb reason; |
365 | * undo that brain damage: | ||
366 | */ | ||
365 | p = q = &c->x86_model_id[0]; | 367 | p = q = &c->x86_model_id[0]; |
366 | while (*p == ' ') | 368 | while (*p == ' ') |
367 | p++; | 369 | p++; |
368 | if (p != q) { | 370 | if (p != q) { |
369 | while (*p) | 371 | while (*p) |
370 | *q++ = *p++; | 372 | *q++ = *p++; |
371 | while (q <= &c->x86_model_id[48]) | 373 | while (q <= &c->x86_model_id[48]) |
372 | *q++ = '\0'; /* Zero-pad the rest */ | 374 | *q++ = '\0'; /* Zero-pad the rest */ |
373 | } | 375 | } |
374 | } | 376 | } |
375 | 377 | ||
@@ -438,27 +440,30 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
438 | 440 | ||
439 | if (smp_num_siblings == 1) { | 441 | if (smp_num_siblings == 1) { |
440 | printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); | 442 | printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); |
441 | } else if (smp_num_siblings > 1) { | 443 | goto out; |
444 | } | ||
442 | 445 | ||
443 | if (smp_num_siblings > nr_cpu_ids) { | 446 | if (smp_num_siblings <= 1) |
444 | printk(KERN_WARNING "CPU: Unsupported number of siblings %d", | 447 | goto out; |
445 | smp_num_siblings); | ||
446 | smp_num_siblings = 1; | ||
447 | return; | ||
448 | } | ||
449 | 448 | ||
450 | index_msb = get_count_order(smp_num_siblings); | 449 | if (smp_num_siblings > nr_cpu_ids) { |
451 | c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb); | 450 | pr_warning("CPU: Unsupported number of siblings %d", |
451 | smp_num_siblings); | ||
452 | smp_num_siblings = 1; | ||
453 | return; | ||
454 | } | ||
452 | 455 | ||
453 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; | 456 | index_msb = get_count_order(smp_num_siblings); |
457 | c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb); | ||
454 | 458 | ||
455 | index_msb = get_count_order(smp_num_siblings); | 459 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; |
456 | 460 | ||
457 | core_bits = get_count_order(c->x86_max_cores); | 461 | index_msb = get_count_order(smp_num_siblings); |
458 | 462 | ||
459 | c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) & | 463 | core_bits = get_count_order(c->x86_max_cores); |
460 | ((1 << core_bits) - 1); | 464 | |
461 | } | 465 | c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) & |
466 | ((1 << core_bits) - 1); | ||
462 | 467 | ||
463 | out: | 468 | out: |
464 | if ((c->x86_max_cores * smp_num_siblings) > 1) { | 469 | if ((c->x86_max_cores * smp_num_siblings) > 1) { |
@@ -473,8 +478,8 @@ out: | |||
473 | static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) | 478 | static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) |
474 | { | 479 | { |
475 | char *v = c->x86_vendor_id; | 480 | char *v = c->x86_vendor_id; |
476 | int i; | ||
477 | static int printed; | 481 | static int printed; |
482 | int i; | ||
478 | 483 | ||
479 | for (i = 0; i < X86_VENDOR_NUM; i++) { | 484 | for (i = 0; i < X86_VENDOR_NUM; i++) { |
480 | if (!cpu_devs[i]) | 485 | if (!cpu_devs[i]) |
@@ -483,6 +488,7 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) | |||
483 | if (!strcmp(v, cpu_devs[i]->c_ident[0]) || | 488 | if (!strcmp(v, cpu_devs[i]->c_ident[0]) || |
484 | (cpu_devs[i]->c_ident[1] && | 489 | (cpu_devs[i]->c_ident[1] && |
485 | !strcmp(v, cpu_devs[i]->c_ident[1]))) { | 490 | !strcmp(v, cpu_devs[i]->c_ident[1]))) { |
491 | |||
486 | this_cpu = cpu_devs[i]; | 492 | this_cpu = cpu_devs[i]; |
487 | c->x86_vendor = this_cpu->c_x86_vendor; | 493 | c->x86_vendor = this_cpu->c_x86_vendor; |
488 | return; | 494 | return; |
@@ -491,7 +497,9 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) | |||
491 | 497 | ||
492 | if (!printed) { | 498 | if (!printed) { |
493 | printed++; | 499 | printed++; |
494 | printk(KERN_ERR "CPU: vendor_id '%s' unknown, using generic init.\n", v); | 500 | printk(KERN_ERR |
501 | "CPU: vendor_id '%s' unknown, using generic init.\n", v); | ||
502 | |||
495 | printk(KERN_ERR "CPU: Your system may be unstable.\n"); | 503 | printk(KERN_ERR "CPU: Your system may be unstable.\n"); |
496 | } | 504 | } |
497 | 505 | ||
@@ -511,14 +519,17 @@ void __cpuinit cpu_detect(struct cpuinfo_x86 *c) | |||
511 | /* Intel-defined flags: level 0x00000001 */ | 519 | /* Intel-defined flags: level 0x00000001 */ |
512 | if (c->cpuid_level >= 0x00000001) { | 520 | if (c->cpuid_level >= 0x00000001) { |
513 | u32 junk, tfms, cap0, misc; | 521 | u32 junk, tfms, cap0, misc; |
522 | |||
514 | cpuid(0x00000001, &tfms, &misc, &junk, &cap0); | 523 | cpuid(0x00000001, &tfms, &misc, &junk, &cap0); |
515 | c->x86 = (tfms >> 8) & 0xf; | 524 | c->x86 = (tfms >> 8) & 0xf; |
516 | c->x86_model = (tfms >> 4) & 0xf; | 525 | c->x86_model = (tfms >> 4) & 0xf; |
517 | c->x86_mask = tfms & 0xf; | 526 | c->x86_mask = tfms & 0xf; |
527 | |||
518 | if (c->x86 == 0xf) | 528 | if (c->x86 == 0xf) |
519 | c->x86 += (tfms >> 20) & 0xff; | 529 | c->x86 += (tfms >> 20) & 0xff; |
520 | if (c->x86 >= 0x6) | 530 | if (c->x86 >= 0x6) |
521 | c->x86_model += ((tfms >> 16) & 0xf) << 4; | 531 | c->x86_model += ((tfms >> 16) & 0xf) << 4; |
532 | |||
522 | if (cap0 & (1<<19)) { | 533 | if (cap0 & (1<<19)) { |
523 | c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; | 534 | c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
524 | c->x86_cache_alignment = c->x86_clflush_size; | 535 | c->x86_cache_alignment = c->x86_clflush_size; |
@@ -534,6 +545,7 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c) | |||
534 | /* Intel-defined flags: level 0x00000001 */ | 545 | /* Intel-defined flags: level 0x00000001 */ |
535 | if (c->cpuid_level >= 0x00000001) { | 546 | if (c->cpuid_level >= 0x00000001) { |
536 | u32 capability, excap; | 547 | u32 capability, excap; |
548 | |||
537 | cpuid(0x00000001, &tfms, &ebx, &excap, &capability); | 549 | cpuid(0x00000001, &tfms, &ebx, &excap, &capability); |
538 | c->x86_capability[0] = capability; | 550 | c->x86_capability[0] = capability; |
539 | c->x86_capability[4] = excap; | 551 | c->x86_capability[4] = excap; |
@@ -542,6 +554,7 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c) | |||
542 | /* AMD-defined flags: level 0x80000001 */ | 554 | /* AMD-defined flags: level 0x80000001 */ |
543 | xlvl = cpuid_eax(0x80000000); | 555 | xlvl = cpuid_eax(0x80000000); |
544 | c->extended_cpuid_level = xlvl; | 556 | c->extended_cpuid_level = xlvl; |
557 | |||
545 | if ((xlvl & 0xffff0000) == 0x80000000) { | 558 | if ((xlvl & 0xffff0000) == 0x80000000) { |
546 | if (xlvl >= 0x80000001) { | 559 | if (xlvl >= 0x80000001) { |
547 | c->x86_capability[1] = cpuid_edx(0x80000001); | 560 | c->x86_capability[1] = cpuid_edx(0x80000001); |
@@ -549,13 +562,15 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c) | |||
549 | } | 562 | } |
550 | } | 563 | } |
551 | 564 | ||
552 | #ifdef CONFIG_X86_64 | ||
553 | if (c->extended_cpuid_level >= 0x80000008) { | 565 | if (c->extended_cpuid_level >= 0x80000008) { |
554 | u32 eax = cpuid_eax(0x80000008); | 566 | u32 eax = cpuid_eax(0x80000008); |
555 | 567 | ||
556 | c->x86_virt_bits = (eax >> 8) & 0xff; | 568 | c->x86_virt_bits = (eax >> 8) & 0xff; |
557 | c->x86_phys_bits = eax & 0xff; | 569 | c->x86_phys_bits = eax & 0xff; |
558 | } | 570 | } |
571 | #ifdef CONFIG_X86_32 | ||
572 | else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36)) | ||
573 | c->x86_phys_bits = 36; | ||
559 | #endif | 574 | #endif |
560 | 575 | ||
561 | if (c->extended_cpuid_level >= 0x80000007) | 576 | if (c->extended_cpuid_level >= 0x80000007) |
@@ -602,8 +617,12 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) | |||
602 | { | 617 | { |
603 | #ifdef CONFIG_X86_64 | 618 | #ifdef CONFIG_X86_64 |
604 | c->x86_clflush_size = 64; | 619 | c->x86_clflush_size = 64; |
620 | c->x86_phys_bits = 36; | ||
621 | c->x86_virt_bits = 48; | ||
605 | #else | 622 | #else |
606 | c->x86_clflush_size = 32; | 623 | c->x86_clflush_size = 32; |
624 | c->x86_phys_bits = 32; | ||
625 | c->x86_virt_bits = 32; | ||
607 | #endif | 626 | #endif |
608 | c->x86_cache_alignment = c->x86_clflush_size; | 627 | c->x86_cache_alignment = c->x86_clflush_size; |
609 | 628 | ||
@@ -634,12 +653,12 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) | |||
634 | 653 | ||
635 | void __init early_cpu_init(void) | 654 | void __init early_cpu_init(void) |
636 | { | 655 | { |
637 | struct cpu_dev **cdev; | 656 | const struct cpu_dev *const *cdev; |
638 | int count = 0; | 657 | int count = 0; |
639 | 658 | ||
640 | printk("KERNEL supported cpus:\n"); | 659 | printk(KERN_INFO "KERNEL supported cpus:\n"); |
641 | for (cdev = __x86_cpu_dev_start; cdev < __x86_cpu_dev_end; cdev++) { | 660 | for (cdev = __x86_cpu_dev_start; cdev < __x86_cpu_dev_end; cdev++) { |
642 | struct cpu_dev *cpudev = *cdev; | 661 | const struct cpu_dev *cpudev = *cdev; |
643 | unsigned int j; | 662 | unsigned int j; |
644 | 663 | ||
645 | if (count >= X86_VENDOR_NUM) | 664 | if (count >= X86_VENDOR_NUM) |
@@ -650,7 +669,7 @@ void __init early_cpu_init(void) | |||
650 | for (j = 0; j < 2; j++) { | 669 | for (j = 0; j < 2; j++) { |
651 | if (!cpudev->c_ident[j]) | 670 | if (!cpudev->c_ident[j]) |
652 | continue; | 671 | continue; |
653 | printk(" %s %s\n", cpudev->c_vendor, | 672 | printk(KERN_INFO " %s %s\n", cpudev->c_vendor, |
654 | cpudev->c_ident[j]); | 673 | cpudev->c_ident[j]); |
655 | } | 674 | } |
656 | } | 675 | } |
@@ -726,9 +745,13 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
726 | c->x86_coreid_bits = 0; | 745 | c->x86_coreid_bits = 0; |
727 | #ifdef CONFIG_X86_64 | 746 | #ifdef CONFIG_X86_64 |
728 | c->x86_clflush_size = 64; | 747 | c->x86_clflush_size = 64; |
748 | c->x86_phys_bits = 36; | ||
749 | c->x86_virt_bits = 48; | ||
729 | #else | 750 | #else |
730 | c->cpuid_level = -1; /* CPUID not detected */ | 751 | c->cpuid_level = -1; /* CPUID not detected */ |
731 | c->x86_clflush_size = 32; | 752 | c->x86_clflush_size = 32; |
753 | c->x86_phys_bits = 32; | ||
754 | c->x86_virt_bits = 32; | ||
732 | #endif | 755 | #endif |
733 | c->x86_cache_alignment = c->x86_clflush_size; | 756 | c->x86_cache_alignment = c->x86_clflush_size; |
734 | memset(&c->x86_capability, 0, sizeof c->x86_capability); | 757 | memset(&c->x86_capability, 0, sizeof c->x86_capability); |
@@ -759,8 +782,8 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
759 | squash_the_stupid_serial_number(c); | 782 | squash_the_stupid_serial_number(c); |
760 | 783 | ||
761 | /* | 784 | /* |
762 | * The vendor-specific functions might have changed features. Now | 785 | * The vendor-specific functions might have changed features. |
763 | * we do "generic changes." | 786 | * Now we do "generic changes." |
764 | */ | 787 | */ |
765 | 788 | ||
766 | /* Filter out anything that depends on CPUID levels we don't have */ | 789 | /* Filter out anything that depends on CPUID levels we don't have */ |
@@ -768,7 +791,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
768 | 791 | ||
769 | /* If the model name is still unset, do table lookup. */ | 792 | /* If the model name is still unset, do table lookup. */ |
770 | if (!c->x86_model_id[0]) { | 793 | if (!c->x86_model_id[0]) { |
771 | char *p; | 794 | const char *p; |
772 | p = table_lookup_model(c); | 795 | p = table_lookup_model(c); |
773 | if (p) | 796 | if (p) |
774 | strcpy(c->x86_model_id, p); | 797 | strcpy(c->x86_model_id, p); |
@@ -824,6 +847,7 @@ static void vgetcpu_set_mode(void) | |||
824 | void __init identify_boot_cpu(void) | 847 | void __init identify_boot_cpu(void) |
825 | { | 848 | { |
826 | identify_cpu(&boot_cpu_data); | 849 | identify_cpu(&boot_cpu_data); |
850 | init_c1e_mask(); | ||
827 | #ifdef CONFIG_X86_32 | 851 | #ifdef CONFIG_X86_32 |
828 | sysenter_setup(); | 852 | sysenter_setup(); |
829 | enable_sep_cpu(); | 853 | enable_sep_cpu(); |
@@ -843,11 +867,11 @@ void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c) | |||
843 | } | 867 | } |
844 | 868 | ||
845 | struct msr_range { | 869 | struct msr_range { |
846 | unsigned min; | 870 | unsigned min; |
847 | unsigned max; | 871 | unsigned max; |
848 | }; | 872 | }; |
849 | 873 | ||
850 | static struct msr_range msr_range_array[] __cpuinitdata = { | 874 | static const struct msr_range msr_range_array[] __cpuinitconst = { |
851 | { 0x00000000, 0x00000418}, | 875 | { 0x00000000, 0x00000418}, |
852 | { 0xc0000000, 0xc000040b}, | 876 | { 0xc0000000, 0xc000040b}, |
853 | { 0xc0010000, 0xc0010142}, | 877 | { 0xc0010000, 0xc0010142}, |
@@ -856,14 +880,15 @@ static struct msr_range msr_range_array[] __cpuinitdata = { | |||
856 | 880 | ||
857 | static void __cpuinit print_cpu_msr(void) | 881 | static void __cpuinit print_cpu_msr(void) |
858 | { | 882 | { |
883 | unsigned index_min, index_max; | ||
859 | unsigned index; | 884 | unsigned index; |
860 | u64 val; | 885 | u64 val; |
861 | int i; | 886 | int i; |
862 | unsigned index_min, index_max; | ||
863 | 887 | ||
864 | for (i = 0; i < ARRAY_SIZE(msr_range_array); i++) { | 888 | for (i = 0; i < ARRAY_SIZE(msr_range_array); i++) { |
865 | index_min = msr_range_array[i].min; | 889 | index_min = msr_range_array[i].min; |
866 | index_max = msr_range_array[i].max; | 890 | index_max = msr_range_array[i].max; |
891 | |||
867 | for (index = index_min; index < index_max; index++) { | 892 | for (index = index_min; index < index_max; index++) { |
868 | if (rdmsrl_amd_safe(index, &val)) | 893 | if (rdmsrl_amd_safe(index, &val)) |
869 | continue; | 894 | continue; |
@@ -873,6 +898,7 @@ static void __cpuinit print_cpu_msr(void) | |||
873 | } | 898 | } |
874 | 899 | ||
875 | static int show_msr __cpuinitdata; | 900 | static int show_msr __cpuinitdata; |
901 | |||
876 | static __init int setup_show_msr(char *arg) | 902 | static __init int setup_show_msr(char *arg) |
877 | { | 903 | { |
878 | int num; | 904 | int num; |
@@ -894,12 +920,14 @@ __setup("noclflush", setup_noclflush); | |||
894 | 920 | ||
895 | void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) | 921 | void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) |
896 | { | 922 | { |
897 | char *vendor = NULL; | 923 | const char *vendor = NULL; |
898 | 924 | ||
899 | if (c->x86_vendor < X86_VENDOR_NUM) | 925 | if (c->x86_vendor < X86_VENDOR_NUM) { |
900 | vendor = this_cpu->c_vendor; | 926 | vendor = this_cpu->c_vendor; |
901 | else if (c->cpuid_level >= 0) | 927 | } else { |
902 | vendor = c->x86_vendor_id; | 928 | if (c->cpuid_level >= 0) |
929 | vendor = c->x86_vendor_id; | ||
930 | } | ||
903 | 931 | ||
904 | if (vendor && !strstr(c->x86_model_id, vendor)) | 932 | if (vendor && !strstr(c->x86_model_id, vendor)) |
905 | printk(KERN_CONT "%s ", vendor); | 933 | printk(KERN_CONT "%s ", vendor); |
@@ -926,10 +954,12 @@ void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) | |||
926 | static __init int setup_disablecpuid(char *arg) | 954 | static __init int setup_disablecpuid(char *arg) |
927 | { | 955 | { |
928 | int bit; | 956 | int bit; |
957 | |||
929 | if (get_option(&arg, &bit) && bit < NCAPINTS*32) | 958 | if (get_option(&arg, &bit) && bit < NCAPINTS*32) |
930 | setup_clear_cpu_cap(bit); | 959 | setup_clear_cpu_cap(bit); |
931 | else | 960 | else |
932 | return 0; | 961 | return 0; |
962 | |||
933 | return 1; | 963 | return 1; |
934 | } | 964 | } |
935 | __setup("clearcpuid=", setup_disablecpuid); | 965 | __setup("clearcpuid=", setup_disablecpuid); |
@@ -939,6 +969,7 @@ struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table }; | |||
939 | 969 | ||
940 | DEFINE_PER_CPU_FIRST(union irq_stack_union, | 970 | DEFINE_PER_CPU_FIRST(union irq_stack_union, |
941 | irq_stack_union) __aligned(PAGE_SIZE); | 971 | irq_stack_union) __aligned(PAGE_SIZE); |
972 | |||
942 | DEFINE_PER_CPU(char *, irq_stack_ptr) = | 973 | DEFINE_PER_CPU(char *, irq_stack_ptr) = |
943 | init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64; | 974 | init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64; |
944 | 975 | ||
@@ -948,12 +979,21 @@ EXPORT_PER_CPU_SYMBOL(kernel_stack); | |||
948 | 979 | ||
949 | DEFINE_PER_CPU(unsigned int, irq_count) = -1; | 980 | DEFINE_PER_CPU(unsigned int, irq_count) = -1; |
950 | 981 | ||
982 | /* | ||
983 | * Special IST stacks which the CPU switches to when it calls | ||
984 | * an IST-marked descriptor entry. Up to 7 stacks (hardware | ||
985 | * limit), all of them are 4K, except the debug stack which | ||
986 | * is 8K. | ||
987 | */ | ||
988 | static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = { | ||
989 | [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STKSZ, | ||
990 | [DEBUG_STACK - 1] = DEBUG_STKSZ | ||
991 | }; | ||
992 | |||
951 | static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks | 993 | static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks |
952 | [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]) | 994 | [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]) |
953 | __aligned(PAGE_SIZE); | 995 | __aligned(PAGE_SIZE); |
954 | 996 | ||
955 | extern asmlinkage void ignore_sysret(void); | ||
956 | |||
957 | /* May not be marked __init: used by software suspend */ | 997 | /* May not be marked __init: used by software suspend */ |
958 | void syscall_init(void) | 998 | void syscall_init(void) |
959 | { | 999 | { |
@@ -983,7 +1023,7 @@ unsigned long kernel_eflags; | |||
983 | */ | 1023 | */ |
984 | DEFINE_PER_CPU(struct orig_ist, orig_ist); | 1024 | DEFINE_PER_CPU(struct orig_ist, orig_ist); |
985 | 1025 | ||
986 | #else /* x86_64 */ | 1026 | #else /* CONFIG_X86_64 */ |
987 | 1027 | ||
988 | #ifdef CONFIG_CC_STACKPROTECTOR | 1028 | #ifdef CONFIG_CC_STACKPROTECTOR |
989 | DEFINE_PER_CPU(unsigned long, stack_canary); | 1029 | DEFINE_PER_CPU(unsigned long, stack_canary); |
@@ -995,9 +1035,26 @@ struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) | |||
995 | memset(regs, 0, sizeof(struct pt_regs)); | 1035 | memset(regs, 0, sizeof(struct pt_regs)); |
996 | regs->fs = __KERNEL_PERCPU; | 1036 | regs->fs = __KERNEL_PERCPU; |
997 | regs->gs = __KERNEL_STACK_CANARY; | 1037 | regs->gs = __KERNEL_STACK_CANARY; |
1038 | |||
998 | return regs; | 1039 | return regs; |
999 | } | 1040 | } |
1000 | #endif /* x86_64 */ | 1041 | #endif /* CONFIG_X86_64 */ |
1042 | |||
1043 | /* | ||
1044 | * Clear all 6 debug registers: | ||
1045 | */ | ||
1046 | static void clear_all_debug_regs(void) | ||
1047 | { | ||
1048 | int i; | ||
1049 | |||
1050 | for (i = 0; i < 8; i++) { | ||
1051 | /* Ignore db4, db5 */ | ||
1052 | if ((i == 4) || (i == 5)) | ||
1053 | continue; | ||
1054 | |||
1055 | set_debugreg(0, i); | ||
1056 | } | ||
1057 | } | ||
1001 | 1058 | ||
1002 | /* | 1059 | /* |
1003 | * cpu_init() initializes state that is per-CPU. Some data is already | 1060 | * cpu_init() initializes state that is per-CPU. Some data is already |
@@ -1007,15 +1064,20 @@ struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) | |||
1007 | * A lot of state is already set up in PDA init for 64 bit | 1064 | * A lot of state is already set up in PDA init for 64 bit |
1008 | */ | 1065 | */ |
1009 | #ifdef CONFIG_X86_64 | 1066 | #ifdef CONFIG_X86_64 |
1067 | |||
1010 | void __cpuinit cpu_init(void) | 1068 | void __cpuinit cpu_init(void) |
1011 | { | 1069 | { |
1012 | int cpu = stack_smp_processor_id(); | 1070 | struct orig_ist *orig_ist; |
1013 | struct tss_struct *t = &per_cpu(init_tss, cpu); | ||
1014 | struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu); | ||
1015 | unsigned long v; | ||
1016 | struct task_struct *me; | 1071 | struct task_struct *me; |
1072 | struct tss_struct *t; | ||
1073 | unsigned long v; | ||
1074 | int cpu; | ||
1017 | int i; | 1075 | int i; |
1018 | 1076 | ||
1077 | cpu = stack_smp_processor_id(); | ||
1078 | t = &per_cpu(init_tss, cpu); | ||
1079 | orig_ist = &per_cpu(orig_ist, cpu); | ||
1080 | |||
1019 | #ifdef CONFIG_NUMA | 1081 | #ifdef CONFIG_NUMA |
1020 | if (cpu != 0 && percpu_read(node_number) == 0 && | 1082 | if (cpu != 0 && percpu_read(node_number) == 0 && |
1021 | cpu_to_node(cpu) != NUMA_NO_NODE) | 1083 | cpu_to_node(cpu) != NUMA_NO_NODE) |
@@ -1056,19 +1118,17 @@ void __cpuinit cpu_init(void) | |||
1056 | * set up and load the per-CPU TSS | 1118 | * set up and load the per-CPU TSS |
1057 | */ | 1119 | */ |
1058 | if (!orig_ist->ist[0]) { | 1120 | if (!orig_ist->ist[0]) { |
1059 | static const unsigned int sizes[N_EXCEPTION_STACKS] = { | ||
1060 | [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STKSZ, | ||
1061 | [DEBUG_STACK - 1] = DEBUG_STKSZ | ||
1062 | }; | ||
1063 | char *estacks = per_cpu(exception_stacks, cpu); | 1121 | char *estacks = per_cpu(exception_stacks, cpu); |
1122 | |||
1064 | for (v = 0; v < N_EXCEPTION_STACKS; v++) { | 1123 | for (v = 0; v < N_EXCEPTION_STACKS; v++) { |
1065 | estacks += sizes[v]; | 1124 | estacks += exception_stack_sizes[v]; |
1066 | orig_ist->ist[v] = t->x86_tss.ist[v] = | 1125 | orig_ist->ist[v] = t->x86_tss.ist[v] = |
1067 | (unsigned long)estacks; | 1126 | (unsigned long)estacks; |
1068 | } | 1127 | } |
1069 | } | 1128 | } |
1070 | 1129 | ||
1071 | t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); | 1130 | t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); |
1131 | |||
1072 | /* | 1132 | /* |
1073 | * <= is required because the CPU will access up to | 1133 | * <= is required because the CPU will access up to |
1074 | * 8 bits beyond the end of the IO permission bitmap. | 1134 | * 8 bits beyond the end of the IO permission bitmap. |
@@ -1078,8 +1138,7 @@ void __cpuinit cpu_init(void) | |||
1078 | 1138 | ||
1079 | atomic_inc(&init_mm.mm_count); | 1139 | atomic_inc(&init_mm.mm_count); |
1080 | me->active_mm = &init_mm; | 1140 | me->active_mm = &init_mm; |
1081 | if (me->mm) | 1141 | BUG_ON(me->mm); |
1082 | BUG(); | ||
1083 | enter_lazy_tlb(&init_mm, me); | 1142 | enter_lazy_tlb(&init_mm, me); |
1084 | 1143 | ||
1085 | load_sp0(t, ¤t->thread); | 1144 | load_sp0(t, ¤t->thread); |
@@ -1098,17 +1157,7 @@ void __cpuinit cpu_init(void) | |||
1098 | arch_kgdb_ops.correct_hw_break(); | 1157 | arch_kgdb_ops.correct_hw_break(); |
1099 | else | 1158 | else |
1100 | #endif | 1159 | #endif |
1101 | { | 1160 | clear_all_debug_regs(); |
1102 | /* | ||
1103 | * Clear all 6 debug registers: | ||
1104 | */ | ||
1105 | set_debugreg(0UL, 0); | ||
1106 | set_debugreg(0UL, 1); | ||
1107 | set_debugreg(0UL, 2); | ||
1108 | set_debugreg(0UL, 3); | ||
1109 | set_debugreg(0UL, 6); | ||
1110 | set_debugreg(0UL, 7); | ||
1111 | } | ||
1112 | 1161 | ||
1113 | fpu_init(); | 1162 | fpu_init(); |
1114 | 1163 | ||
@@ -1129,7 +1178,8 @@ void __cpuinit cpu_init(void) | |||
1129 | 1178 | ||
1130 | if (cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)) { | 1179 | if (cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)) { |
1131 | printk(KERN_WARNING "CPU#%d already initialized!\n", cpu); | 1180 | printk(KERN_WARNING "CPU#%d already initialized!\n", cpu); |
1132 | for (;;) local_irq_enable(); | 1181 | for (;;) |
1182 | local_irq_enable(); | ||
1133 | } | 1183 | } |
1134 | 1184 | ||
1135 | printk(KERN_INFO "Initializing CPU#%d\n", cpu); | 1185 | printk(KERN_INFO "Initializing CPU#%d\n", cpu); |
@@ -1145,8 +1195,7 @@ void __cpuinit cpu_init(void) | |||
1145 | */ | 1195 | */ |
1146 | atomic_inc(&init_mm.mm_count); | 1196 | atomic_inc(&init_mm.mm_count); |
1147 | curr->active_mm = &init_mm; | 1197 | curr->active_mm = &init_mm; |
1148 | if (curr->mm) | 1198 | BUG_ON(curr->mm); |
1149 | BUG(); | ||
1150 | enter_lazy_tlb(&init_mm, curr); | 1199 | enter_lazy_tlb(&init_mm, curr); |
1151 | 1200 | ||
1152 | load_sp0(t, thread); | 1201 | load_sp0(t, thread); |
@@ -1159,13 +1208,7 @@ void __cpuinit cpu_init(void) | |||
1159 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); | 1208 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); |
1160 | #endif | 1209 | #endif |
1161 | 1210 | ||
1162 | /* Clear all 6 debug registers: */ | 1211 | clear_all_debug_regs(); |
1163 | set_debugreg(0, 0); | ||
1164 | set_debugreg(0, 1); | ||
1165 | set_debugreg(0, 2); | ||
1166 | set_debugreg(0, 3); | ||
1167 | set_debugreg(0, 6); | ||
1168 | set_debugreg(0, 7); | ||
1169 | 1212 | ||
1170 | /* | 1213 | /* |
1171 | * Force FPU initialization: | 1214 | * Force FPU initialization: |
@@ -1185,6 +1228,4 @@ void __cpuinit cpu_init(void) | |||
1185 | 1228 | ||
1186 | xsave_init(); | 1229 | xsave_init(); |
1187 | } | 1230 | } |
1188 | |||
1189 | |||
1190 | #endif | 1231 | #endif |