7 files changed, 16 insertions, 16 deletions
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index 42c56df3ff3..8ff8bba8833 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -21,8 +21,8 @@ static inline const cpumask_t *target_cpus(void)
 #undef APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL       0
 #define APIC_DFR_VALUE          (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE       (dest_Fixed)
+#define IRQ_DELIVERY_MODE       (dest_Fixed)
-#define INT_DEST_MODE           (0)    /* phys delivery to target proc */
+#define IRQ_DEST_MODE           (0)    /* phys delivery to target proc */
 #define NO_BALANCE_IRQ          (0)
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index a1819b510de..830e8731cc0 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -27,8 +27,8 @@ static inline const cpumask_t *target_cpus(void)
 #define NO_BALANCE_IRQ_CLUSTER          (1)
 #define APIC_DFR_VALUE          (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE       (dest_Fixed)
+#define IRQ_DELIVERY_MODE       (dest_Fixed)
-#define INT_DEST_MODE           (0)    /* phys delivery to target procs */
+#define IRQ_DEST_MODE           (0)    /* phys delivery to target procs */
 #define NO_BALANCE_IRQ          (0)
 #undef  APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL       0x0
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index 108abdf6953..e998e3df5d2 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -23,8 +23,8 @@ struct genapic {
        int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
        int (*apic_id_registered)(void);
-        u32 int_delivery_mode;
+        u32 irq_delivery_mode;
-        u32 int_dest_mode;
+        u32 irq_dest_mode;
        const struct cpumask *(*target_cpus)(void);
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index 6a454fa0b43..b5364793262 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -22,8 +22,8 @@ static inline const struct cpumask *target_cpus(void)
 #ifdef CONFIG_X86_64
 #include <asm/genapic.h>
-#define INT_DELIVERY_MODE (apic->int_delivery_mode)
+#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
-#define INT_DEST_MODE (apic->int_dest_mode)
+#define IRQ_DEST_MODE (apic->irq_dest_mode)
 #define TARGET_CPUS       (apic->target_cpus())
 #define init_apic_ldr (apic->init_apic_ldr)
 #define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
@@ -35,8 +35,8 @@ static inline const struct cpumask *target_cpus(void)
 #define wakeup_secondary_cpu (apic->wakeup_cpu)
 extern void setup_apic_routing(void);
 #else
-#define INT_DELIVERY_MODE dest_LowestPrio
+#define IRQ_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
+#define IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */
 #define TARGET_CPUS (target_cpus())
 #define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
 /*
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
index cc6e9d70f06..03492f2219e 100644
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ b/arch/x86/include/asm/mach-generic/mach_apic.h
@@ -5,8 +5,8 @@
 #define esr_disable (apic->ESR_DISABLE)
 #define NO_BALANCE_IRQ (apic->no_balance_irq)
-#define INT_DELIVERY_MODE (apic->int_delivery_mode)
+#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
-#define INT_DEST_MODE (apic->int_dest_mode)
+#define IRQ_DEST_MODE (apic->irq_dest_mode)
 #undef APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL (apic->apic_destination_logical)
 #define TARGET_CPUS       (apic->target_cpus())
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index 59b62b19d02..d885e35df18 100644
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -15,8 +15,8 @@ static inline const cpumask_t *target_cpus(void)
 #define NO_BALANCE_IRQ (1)
 #define esr_disable (1)
-#define INT_DELIVERY_MODE dest_LowestPrio
+#define IRQ_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 0     /* physical delivery on LOCAL quad */
+#define IRQ_DEST_MODE 0     /* physical delivery on LOCAL quad */
 
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index a36ef6e4b1f..0b7d0d14e56 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -24,8 +24,8 @@ static inline const cpumask_t *target_cpus(void)
        return &cpumask_of_cpu(0);
 }
-#define INT_DELIVERY_MODE (dest_LowestPrio)
+#define IRQ_DELIVERY_MODE (dest_LowestPrio)
-#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
+#define IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {

diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h index 42c56df3ff3..8ff8bba8833 100644 --- a/arch/x86/include/asm/bigsmp/apic.h +++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -21,8 +21,8 @@ static inline const cpumask_t *target_cpus(void)
21	#undef APIC_DEST_LOGICAL	21	#undef APIC_DEST_LOGICAL
22	#define APIC_DEST_LOGICAL 0	22	#define APIC_DEST_LOGICAL 0
23	#define APIC_DFR_VALUE (APIC_DFR_FLAT)	23	#define APIC_DFR_VALUE (APIC_DFR_FLAT)
24	#define INT_DELIVERY_MODE (dest_Fixed)	24	#define IRQ_DELIVERY_MODE (dest_Fixed)
25	#define INT_DEST_MODE (0) /* phys delivery to target proc */	25	#define IRQ_DEST_MODE (0) /* phys delivery to target proc */
26	#define NO_BALANCE_IRQ (0)	26	#define NO_BALANCE_IRQ (0)
27		27
28	static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)	28	static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)


diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h index a1819b510de..830e8731cc0 100644 --- a/arch/x86/include/asm/es7000/apic.h +++ b/arch/x86/include/asm/es7000/apic.h
@@ -27,8 +27,8 @@ static inline const cpumask_t *target_cpus(void)
27	#define NO_BALANCE_IRQ_CLUSTER (1)	27	#define NO_BALANCE_IRQ_CLUSTER (1)
28		28
29	#define APIC_DFR_VALUE (APIC_DFR_FLAT)	29	#define APIC_DFR_VALUE (APIC_DFR_FLAT)
30	#define INT_DELIVERY_MODE (dest_Fixed)	30	#define IRQ_DELIVERY_MODE (dest_Fixed)
31	#define INT_DEST_MODE (0) /* phys delivery to target procs */	31	#define IRQ_DEST_MODE (0) /* phys delivery to target procs */
32	#define NO_BALANCE_IRQ (0)	32	#define NO_BALANCE_IRQ (0)
33	#undef APIC_DEST_LOGICAL	33	#undef APIC_DEST_LOGICAL
34	#define APIC_DEST_LOGICAL 0x0	34	#define APIC_DEST_LOGICAL 0x0


diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h index 108abdf6953..e998e3df5d2 100644 --- a/arch/x86/include/asm/genapic.h +++ b/arch/x86/include/asm/genapic.h
@@ -23,8 +23,8 @@ struct genapic {
23	int (acpi_madt_oem_check)(char oem_id, char *oem_table_id);	23	int (acpi_madt_oem_check)(char oem_id, char *oem_table_id);
24	int (*apic_id_registered)(void);	24	int (*apic_id_registered)(void);
25		25
26	u32 int_delivery_mode;	26	u32 irq_delivery_mode;
27	u32 int_dest_mode;	27	u32 irq_dest_mode;
28		28
29	const struct cpumask (target_cpus)(void);	29	const struct cpumask (target_cpus)(void);
30		30


diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h index 6a454fa0b43..b5364793262 100644 --- a/arch/x86/include/asm/mach-default/mach_apic.h +++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -22,8 +22,8 @@ static inline const struct cpumask *target_cpus(void)
22		22
23	#ifdef CONFIG_X86_64	23	#ifdef CONFIG_X86_64
24	#include <asm/genapic.h>	24	#include <asm/genapic.h>
25	#define INT_DELIVERY_MODE (apic->int_delivery_mode)	25	#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
26	#define INT_DEST_MODE (apic->int_dest_mode)	26	#define IRQ_DEST_MODE (apic->irq_dest_mode)
27	#define TARGET_CPUS (apic->target_cpus())	27	#define TARGET_CPUS (apic->target_cpus())
28	#define init_apic_ldr (apic->init_apic_ldr)	28	#define init_apic_ldr (apic->init_apic_ldr)
29	#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)	29	#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
@@ -35,8 +35,8 @@ static inline const struct cpumask *target_cpus(void)
35	#define wakeup_secondary_cpu (apic->wakeup_cpu)	35	#define wakeup_secondary_cpu (apic->wakeup_cpu)
36	extern void setup_apic_routing(void);	36	extern void setup_apic_routing(void);
37	#else	37	#else
38	#define INT_DELIVERY_MODE dest_LowestPrio	38	#define IRQ_DELIVERY_MODE dest_LowestPrio
39	#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */	39	#define IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
40	#define TARGET_CPUS (target_cpus())	40	#define TARGET_CPUS (target_cpus())
41	#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init	41	#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
42	/*	42	/*


diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h index cc6e9d70f06..03492f2219e 100644 --- a/arch/x86/include/asm/mach-generic/mach_apic.h +++ b/arch/x86/include/asm/mach-generic/mach_apic.h
@@ -5,8 +5,8 @@
5		5
6	#define esr_disable (apic->ESR_DISABLE)	6	#define esr_disable (apic->ESR_DISABLE)
7	#define NO_BALANCE_IRQ (apic->no_balance_irq)	7	#define NO_BALANCE_IRQ (apic->no_balance_irq)
8	#define INT_DELIVERY_MODE (apic->int_delivery_mode)	8	#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
9	#define INT_DEST_MODE (apic->int_dest_mode)	9	#define IRQ_DEST_MODE (apic->irq_dest_mode)
10	#undef APIC_DEST_LOGICAL	10	#undef APIC_DEST_LOGICAL
11	#define APIC_DEST_LOGICAL (apic->apic_destination_logical)	11	#define APIC_DEST_LOGICAL (apic->apic_destination_logical)
12	#define TARGET_CPUS (apic->target_cpus())	12	#define TARGET_CPUS (apic->target_cpus())


diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h index 59b62b19d02..d885e35df18 100644 --- a/arch/x86/include/asm/numaq/apic.h +++ b/arch/x86/include/asm/numaq/apic.h
@@ -15,8 +15,8 @@ static inline const cpumask_t *target_cpus(void)
15	#define NO_BALANCE_IRQ (1)	15	#define NO_BALANCE_IRQ (1)
16	#define esr_disable (1)	16	#define esr_disable (1)
17		17
18	#define INT_DELIVERY_MODE dest_LowestPrio	18	#define IRQ_DELIVERY_MODE dest_LowestPrio
19	#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */	19	#define IRQ_DEST_MODE 0 /* physical delivery on LOCAL quad */
20		20
21	static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)	21	static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
22	{	22	{


diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h index a36ef6e4b1f..0b7d0d14e56 100644 --- a/arch/x86/include/asm/summit/apic.h +++ b/arch/x86/include/asm/summit/apic.h
@@ -24,8 +24,8 @@ static inline const cpumask_t *target_cpus(void)
24	return &cpumask_of_cpu(0);	24	return &cpumask_of_cpu(0);
25	}	25	}
26		26
27	#define INT_DELIVERY_MODE (dest_LowestPrio)	27	#define IRQ_DELIVERY_MODE (dest_LowestPrio)
28	#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */	28	#define IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
29		29
30	static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)	30	static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
31	{	31	{