diff options
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r-- | arch/x86/include/asm/bitops.h | 14 | ||||
-rw-r--r-- | arch/x86/include/asm/dma-mapping.h | 4 | ||||
-rw-r--r-- | arch/x86/include/asm/e820.h | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/io.h | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/kvm.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/mce.h | 5 | ||||
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 29 | ||||
-rw-r--r-- | arch/x86/include/asm/mtrr.h | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/pgalloc.h | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/ptrace-abi.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/sigcontext.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/sigcontext32.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/swab.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/syscalls.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/timex.h | 13 |
15 files changed, 56 insertions, 25 deletions
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index e02a359d2aa..02b47a603fc 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h | |||
@@ -3,6 +3,9 @@ | |||
3 | 3 | ||
4 | /* | 4 | /* |
5 | * Copyright 1992, Linus Torvalds. | 5 | * Copyright 1992, Linus Torvalds. |
6 | * | ||
7 | * Note: inlines with more than a single statement should be marked | ||
8 | * __always_inline to avoid problems with older gcc's inlining heuristics. | ||
6 | */ | 9 | */ |
7 | 10 | ||
8 | #ifndef _LINUX_BITOPS_H | 11 | #ifndef _LINUX_BITOPS_H |
@@ -53,7 +56,8 @@ | |||
53 | * Note that @nr may be almost arbitrarily large; this function is not | 56 | * Note that @nr may be almost arbitrarily large; this function is not |
54 | * restricted to acting on a single-word quantity. | 57 | * restricted to acting on a single-word quantity. |
55 | */ | 58 | */ |
56 | static inline void set_bit(unsigned int nr, volatile unsigned long *addr) | 59 | static __always_inline void |
60 | set_bit(unsigned int nr, volatile unsigned long *addr) | ||
57 | { | 61 | { |
58 | if (IS_IMMEDIATE(nr)) { | 62 | if (IS_IMMEDIATE(nr)) { |
59 | asm volatile(LOCK_PREFIX "orb %1,%0" | 63 | asm volatile(LOCK_PREFIX "orb %1,%0" |
@@ -90,7 +94,8 @@ static inline void __set_bit(int nr, volatile unsigned long *addr) | |||
90 | * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() | 94 | * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() |
91 | * in order to ensure changes are visible on other processors. | 95 | * in order to ensure changes are visible on other processors. |
92 | */ | 96 | */ |
93 | static inline void clear_bit(int nr, volatile unsigned long *addr) | 97 | static __always_inline void |
98 | clear_bit(int nr, volatile unsigned long *addr) | ||
94 | { | 99 | { |
95 | if (IS_IMMEDIATE(nr)) { | 100 | if (IS_IMMEDIATE(nr)) { |
96 | asm volatile(LOCK_PREFIX "andb %1,%0" | 101 | asm volatile(LOCK_PREFIX "andb %1,%0" |
@@ -204,7 +209,8 @@ static inline int test_and_set_bit(int nr, volatile unsigned long *addr) | |||
204 | * | 209 | * |
205 | * This is the same as test_and_set_bit on x86. | 210 | * This is the same as test_and_set_bit on x86. |
206 | */ | 211 | */ |
207 | static inline int test_and_set_bit_lock(int nr, volatile unsigned long *addr) | 212 | static __always_inline int |
213 | test_and_set_bit_lock(int nr, volatile unsigned long *addr) | ||
208 | { | 214 | { |
209 | return test_and_set_bit(nr, addr); | 215 | return test_and_set_bit(nr, addr); |
210 | } | 216 | } |
@@ -300,7 +306,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr) | |||
300 | return oldbit; | 306 | return oldbit; |
301 | } | 307 | } |
302 | 308 | ||
303 | static inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr) | 309 | static __always_inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr) |
304 | { | 310 | { |
305 | return ((1UL << (nr % BITS_PER_LONG)) & | 311 | return ((1UL << (nr % BITS_PER_LONG)) & |
306 | (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0; | 312 | (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0; |
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h index 4035357f5b9..132a134d12f 100644 --- a/arch/x86/include/asm/dma-mapping.h +++ b/arch/x86/include/asm/dma-mapping.h | |||
@@ -2,8 +2,8 @@ | |||
2 | #define _ASM_X86_DMA_MAPPING_H | 2 | #define _ASM_X86_DMA_MAPPING_H |
3 | 3 | ||
4 | /* | 4 | /* |
5 | * IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for | 5 | * IOMMU interface. See Documentation/PCI/PCI-DMA-mapping.txt and |
6 | * documentation. | 6 | * Documentation/DMA-API.txt for documentation. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/scatterlist.h> | 9 | #include <linux/scatterlist.h> |
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h index 3d8ceddbd40..00d41ce4c84 100644 --- a/arch/x86/include/asm/e820.h +++ b/arch/x86/include/asm/e820.h | |||
@@ -49,6 +49,7 @@ | |||
49 | #define E820_RESERVED_KERN 128 | 49 | #define E820_RESERVED_KERN 128 |
50 | 50 | ||
51 | #ifndef __ASSEMBLY__ | 51 | #ifndef __ASSEMBLY__ |
52 | #include <linux/types.h> | ||
52 | struct e820entry { | 53 | struct e820entry { |
53 | __u64 addr; /* start of memory segment */ | 54 | __u64 addr; /* start of memory segment */ |
54 | __u64 size; /* size of memory segment */ | 55 | __u64 size; /* size of memory segment */ |
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 05cfed4485f..1dbbdf4be9b 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h | |||
@@ -99,7 +99,6 @@ extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size); | |||
99 | * A boot-time mapping is currently limited to at most 16 pages. | 99 | * A boot-time mapping is currently limited to at most 16 pages. |
100 | */ | 100 | */ |
101 | extern void early_ioremap_init(void); | 101 | extern void early_ioremap_init(void); |
102 | extern void early_ioremap_clear(void); | ||
103 | extern void early_ioremap_reset(void); | 102 | extern void early_ioremap_reset(void); |
104 | extern void __iomem *early_ioremap(unsigned long offset, unsigned long size); | 103 | extern void __iomem *early_ioremap(unsigned long offset, unsigned long size); |
105 | extern void __iomem *early_memremap(unsigned long offset, unsigned long size); | 104 | extern void __iomem *early_memremap(unsigned long offset, unsigned long size); |
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h index b95162af0bf..d2e3bf3608a 100644 --- a/arch/x86/include/asm/kvm.h +++ b/arch/x86/include/asm/kvm.h | |||
@@ -6,7 +6,7 @@ | |||
6 | * | 6 | * |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <asm/types.h> | 9 | #include <linux/types.h> |
10 | #include <linux/ioctl.h> | 10 | #include <linux/ioctl.h> |
11 | 11 | ||
12 | /* Architectural interrupt line count. */ | 12 | /* Architectural interrupt line count. */ |
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 1d6e17c2f23..32c6e17b960 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h | |||
@@ -3,8 +3,8 @@ | |||
3 | 3 | ||
4 | #ifdef __x86_64__ | 4 | #ifdef __x86_64__ |
5 | 5 | ||
6 | #include <linux/types.h> | ||
6 | #include <asm/ioctls.h> | 7 | #include <asm/ioctls.h> |
7 | #include <asm/types.h> | ||
8 | 8 | ||
9 | /* | 9 | /* |
10 | * Machine Check support for x86 | 10 | * Machine Check support for x86 |
@@ -115,8 +115,6 @@ extern int mce_notify_user(void); | |||
115 | 115 | ||
116 | #endif /* !CONFIG_X86_32 */ | 116 | #endif /* !CONFIG_X86_32 */ |
117 | 117 | ||
118 | |||
119 | |||
120 | #ifdef CONFIG_X86_MCE | 118 | #ifdef CONFIG_X86_MCE |
121 | extern void mcheck_init(struct cpuinfo_x86 *c); | 119 | extern void mcheck_init(struct cpuinfo_x86 *c); |
122 | #else | 120 | #else |
@@ -126,5 +124,4 @@ extern void stop_mce(void); | |||
126 | extern void restart_mce(void); | 124 | extern void restart_mce(void); |
127 | 125 | ||
128 | #endif /* __KERNEL__ */ | 126 | #endif /* __KERNEL__ */ |
129 | |||
130 | #endif /* _ASM_X86_MCE_H */ | 127 | #endif /* _ASM_X86_MCE_H */ |
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index cb58643947b..358acc59ae0 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -202,6 +202,35 @@ | |||
202 | #define MSR_IA32_THERM_STATUS 0x0000019c | 202 | #define MSR_IA32_THERM_STATUS 0x0000019c |
203 | #define MSR_IA32_MISC_ENABLE 0x000001a0 | 203 | #define MSR_IA32_MISC_ENABLE 0x000001a0 |
204 | 204 | ||
205 | /* MISC_ENABLE bits: architectural */ | ||
206 | #define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0) | ||
207 | #define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1) | ||
208 | #define MSR_IA32_MISC_ENABLE_EMON (1ULL << 7) | ||
209 | #define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL (1ULL << 11) | ||
210 | #define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1ULL << 12) | ||
211 | #define MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP (1ULL << 16) | ||
212 | #define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << 18) | ||
213 | #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << 22) | ||
214 | #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << 23) | ||
215 | #define MSR_IA32_MISC_ENABLE_XD_DISABLE (1ULL << 34) | ||
216 | |||
217 | /* MISC_ENABLE bits: model-specific, meaning may vary from core to core */ | ||
218 | #define MSR_IA32_MISC_ENABLE_X87_COMPAT (1ULL << 2) | ||
219 | #define MSR_IA32_MISC_ENABLE_TM1 (1ULL << 3) | ||
220 | #define MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE (1ULL << 4) | ||
221 | #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << 6) | ||
222 | #define MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK (1ULL << 8) | ||
223 | #define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE (1ULL << 9) | ||
224 | #define MSR_IA32_MISC_ENABLE_FERR (1ULL << 10) | ||
225 | #define MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX (1ULL << 10) | ||
226 | #define MSR_IA32_MISC_ENABLE_TM2 (1ULL << 13) | ||
227 | #define MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE (1ULL << 19) | ||
228 | #define MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK (1ULL << 20) | ||
229 | #define MSR_IA32_MISC_ENABLE_L1D_CONTEXT (1ULL << 24) | ||
230 | #define MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE (1ULL << 37) | ||
231 | #define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38) | ||
232 | #define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39) | ||
233 | |||
205 | /* Intel Model 6 */ | 234 | /* Intel Model 6 */ |
206 | #define MSR_P6_EVNTSEL0 0x00000186 | 235 | #define MSR_P6_EVNTSEL0 0x00000186 |
207 | #define MSR_P6_EVNTSEL1 0x00000187 | 236 | #define MSR_P6_EVNTSEL1 0x00000187 |
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 14080d22edb..a51ada8467d 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h | |||
@@ -23,6 +23,7 @@ | |||
23 | #ifndef _ASM_X86_MTRR_H | 23 | #ifndef _ASM_X86_MTRR_H |
24 | #define _ASM_X86_MTRR_H | 24 | #define _ASM_X86_MTRR_H |
25 | 25 | ||
26 | #include <linux/types.h> | ||
26 | #include <linux/ioctl.h> | 27 | #include <linux/ioctl.h> |
27 | #include <linux/errno.h> | 28 | #include <linux/errno.h> |
28 | 29 | ||
diff --git a/arch/x86/include/asm/pgalloc.h b/arch/x86/include/asm/pgalloc.h index cb7c151a8bf..dd14c54ac71 100644 --- a/arch/x86/include/asm/pgalloc.h +++ b/arch/x86/include/asm/pgalloc.h | |||
@@ -42,6 +42,7 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | |||
42 | 42 | ||
43 | static inline void pte_free(struct mm_struct *mm, struct page *pte) | 43 | static inline void pte_free(struct mm_struct *mm, struct page *pte) |
44 | { | 44 | { |
45 | pgtable_page_dtor(pte); | ||
45 | __free_page(pte); | 46 | __free_page(pte); |
46 | } | 47 | } |
47 | 48 | ||
diff --git a/arch/x86/include/asm/ptrace-abi.h b/arch/x86/include/asm/ptrace-abi.h index 25f1bb8fc62..8e0f8d199e0 100644 --- a/arch/x86/include/asm/ptrace-abi.h +++ b/arch/x86/include/asm/ptrace-abi.h | |||
@@ -83,7 +83,7 @@ | |||
83 | #ifdef CONFIG_X86_PTRACE_BTS | 83 | #ifdef CONFIG_X86_PTRACE_BTS |
84 | 84 | ||
85 | #ifndef __ASSEMBLY__ | 85 | #ifndef __ASSEMBLY__ |
86 | #include <asm/types.h> | 86 | #include <linux/types.h> |
87 | 87 | ||
88 | /* configuration/status structure used in PTRACE_BTS_CONFIG and | 88 | /* configuration/status structure used in PTRACE_BTS_CONFIG and |
89 | PTRACE_BTS_STATUS commands. | 89 | PTRACE_BTS_STATUS commands. |
diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h index 0afcb5e58ac..ec666491aaa 100644 --- a/arch/x86/include/asm/sigcontext.h +++ b/arch/x86/include/asm/sigcontext.h | |||
@@ -2,7 +2,7 @@ | |||
2 | #define _ASM_X86_SIGCONTEXT_H | 2 | #define _ASM_X86_SIGCONTEXT_H |
3 | 3 | ||
4 | #include <linux/compiler.h> | 4 | #include <linux/compiler.h> |
5 | #include <asm/types.h> | 5 | #include <linux/types.h> |
6 | 6 | ||
7 | #define FP_XSTATE_MAGIC1 0x46505853U | 7 | #define FP_XSTATE_MAGIC1 0x46505853U |
8 | #define FP_XSTATE_MAGIC2 0x46505845U | 8 | #define FP_XSTATE_MAGIC2 0x46505845U |
diff --git a/arch/x86/include/asm/sigcontext32.h b/arch/x86/include/asm/sigcontext32.h index 6126188cf3a..ad1478c4ae1 100644 --- a/arch/x86/include/asm/sigcontext32.h +++ b/arch/x86/include/asm/sigcontext32.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef _ASM_X86_SIGCONTEXT32_H | 1 | #ifndef _ASM_X86_SIGCONTEXT32_H |
2 | #define _ASM_X86_SIGCONTEXT32_H | 2 | #define _ASM_X86_SIGCONTEXT32_H |
3 | 3 | ||
4 | #include <linux/types.h> | ||
5 | |||
4 | /* signal context for 32bit programs. */ | 6 | /* signal context for 32bit programs. */ |
5 | 7 | ||
6 | #define X86_FXSR_MAGIC 0x0000 | 8 | #define X86_FXSR_MAGIC 0x0000 |
diff --git a/arch/x86/include/asm/swab.h b/arch/x86/include/asm/swab.h index 306d4178ffc..557cd9f0066 100644 --- a/arch/x86/include/asm/swab.h +++ b/arch/x86/include/asm/swab.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef _ASM_X86_SWAB_H | 1 | #ifndef _ASM_X86_SWAB_H |
2 | #define _ASM_X86_SWAB_H | 2 | #define _ASM_X86_SWAB_H |
3 | 3 | ||
4 | #include <asm/types.h> | 4 | #include <linux/types.h> |
5 | #include <linux/compiler.h> | 5 | #include <linux/compiler.h> |
6 | 6 | ||
7 | static inline __attribute_const__ __u32 __arch_swab32(__u32 val) | 7 | static inline __attribute_const__ __u32 __arch_swab32(__u32 val) |
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h index 9c6797c3e56..c0b0bda754e 100644 --- a/arch/x86/include/asm/syscalls.h +++ b/arch/x86/include/asm/syscalls.h | |||
@@ -40,7 +40,7 @@ asmlinkage int sys_sigaction(int, const struct old_sigaction __user *, | |||
40 | struct old_sigaction __user *); | 40 | struct old_sigaction __user *); |
41 | asmlinkage int sys_sigaltstack(unsigned long); | 41 | asmlinkage int sys_sigaltstack(unsigned long); |
42 | asmlinkage unsigned long sys_sigreturn(unsigned long); | 42 | asmlinkage unsigned long sys_sigreturn(unsigned long); |
43 | asmlinkage int sys_rt_sigreturn(struct pt_regs); | 43 | asmlinkage int sys_rt_sigreturn(unsigned long); |
44 | 44 | ||
45 | /* kernel/ioport.c */ | 45 | /* kernel/ioport.c */ |
46 | asmlinkage long sys_iopl(unsigned long); | 46 | asmlinkage long sys_iopl(unsigned long); |
diff --git a/arch/x86/include/asm/timex.h b/arch/x86/include/asm/timex.h index 1287dc1347d..b5c9d45c981 100644 --- a/arch/x86/include/asm/timex.h +++ b/arch/x86/include/asm/timex.h | |||
@@ -1,18 +1,13 @@ | |||
1 | /* x86 architecture timex specifications */ | ||
2 | #ifndef _ASM_X86_TIMEX_H | 1 | #ifndef _ASM_X86_TIMEX_H |
3 | #define _ASM_X86_TIMEX_H | 2 | #define _ASM_X86_TIMEX_H |
4 | 3 | ||
5 | #include <asm/processor.h> | 4 | #include <asm/processor.h> |
6 | #include <asm/tsc.h> | 5 | #include <asm/tsc.h> |
7 | 6 | ||
8 | #ifdef CONFIG_X86_ELAN | 7 | /* The PIT ticks at this frequency (in HZ): */ |
9 | # define PIT_TICK_RATE 1189200 /* AMD Elan has different frequency! */ | 8 | #define PIT_TICK_RATE 1193182 |
10 | #elif defined(CONFIG_X86_RDC321X) | 9 | |
11 | # define PIT_TICK_RATE 1041667 /* Underlying HZ for R8610 */ | 10 | #define CLOCK_TICK_RATE PIT_TICK_RATE |
12 | #else | ||
13 | # define PIT_TICK_RATE 1193182 /* Underlying HZ */ | ||
14 | #endif | ||
15 | #define CLOCK_TICK_RATE PIT_TICK_RATE | ||
16 | 11 | ||
17 | #define ARCH_HAS_READ_CURRENT_TIMER | 12 | #define ARCH_HAS_READ_CURRENT_TIMER |
18 | 13 | ||