aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86/include/asm/mach-default/mach_apic.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/x86/include/asm/mach-default/mach_apic.h')
-rw-r--r--arch/x86/include/asm/mach-default/mach_apic.h27
1 files changed, 18 insertions, 9 deletions
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index 6cb3a467e06..8863d978cb9 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -8,12 +8,12 @@
8 8
9#define APIC_DFR_VALUE (APIC_DFR_FLAT) 9#define APIC_DFR_VALUE (APIC_DFR_FLAT)
10 10
11static inline cpumask_t target_cpus(void) 11static inline const struct cpumask *target_cpus(void)
12{ 12{
13#ifdef CONFIG_SMP 13#ifdef CONFIG_SMP
14 return cpu_online_map; 14 return cpu_online_mask;
15#else 15#else
16 return cpumask_of_cpu(0); 16 return cpumask_of(0);
17#endif 17#endif
18} 18}
19 19
@@ -28,6 +28,7 @@ static inline cpumask_t target_cpus(void)
28#define apic_id_registered (genapic->apic_id_registered) 28#define apic_id_registered (genapic->apic_id_registered)
29#define init_apic_ldr (genapic->init_apic_ldr) 29#define init_apic_ldr (genapic->init_apic_ldr)
30#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) 30#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
31#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
31#define phys_pkg_id (genapic->phys_pkg_id) 32#define phys_pkg_id (genapic->phys_pkg_id)
32#define vector_allocation_domain (genapic->vector_allocation_domain) 33#define vector_allocation_domain (genapic->vector_allocation_domain)
33#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) 34#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
@@ -61,9 +62,18 @@ static inline int apic_id_registered(void)
61 return physid_isset(read_apic_id(), phys_cpu_present_map); 62 return physid_isset(read_apic_id(), phys_cpu_present_map);
62} 63}
63 64
64static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) 65static inline unsigned int cpu_mask_to_apicid(const struct cpumask *cpumask)
65{ 66{
66 return cpus_addr(cpumask)[0]; 67 return cpumask_bits(cpumask)[0];
68}
69
70static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
71 const struct cpumask *andmask)
72{
73 unsigned long mask1 = cpumask_bits(cpumask)[0];
74 unsigned long mask2 = cpumask_bits(andmask)[0];
75
76 return (unsigned int)(mask1 & mask2);
67} 77}
68 78
69static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) 79static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
@@ -88,7 +98,7 @@ static inline int apicid_to_node(int logical_apicid)
88#endif 98#endif
89} 99}
90 100
91static inline cpumask_t vector_allocation_domain(int cpu) 101static inline void vector_allocation_domain(int cpu, struct cpumask *retmask)
92{ 102{
93 /* Careful. Some cpus do not strictly honor the set of cpus 103 /* Careful. Some cpus do not strictly honor the set of cpus
94 * specified in the interrupt destination when using lowest 104 * specified in the interrupt destination when using lowest
@@ -98,8 +108,7 @@ static inline cpumask_t vector_allocation_domain(int cpu)
98 * deliver interrupts to the wrong hyperthread when only one 108 * deliver interrupts to the wrong hyperthread when only one
99 * hyperthread was specified in the interrupt desitination. 109 * hyperthread was specified in the interrupt desitination.
100 */ 110 */
101 cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; 111 *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
102 return domain;
103} 112}
104#endif 113#endif
105 114
@@ -131,7 +140,7 @@ static inline int cpu_to_logical_apicid(int cpu)
131 140
132static inline int cpu_present_to_apicid(int mps_cpu) 141static inline int cpu_present_to_apicid(int mps_cpu)
133{ 142{
134 if (mps_cpu < NR_CPUS && cpu_present(mps_cpu)) 143 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
135 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); 144 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
136 else 145 else
137 return BAD_APICID; 146 return BAD_APICID;