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-rw-r--r--arch/x86/include/asm/a.out.h20
-rw-r--r--arch/x86/include/asm/aes.h11
-rw-r--r--arch/x86/include/asm/auxvec.h12
-rw-r--r--arch/x86/include/asm/bitsperlong.h13
-rw-r--r--arch/x86/include/asm/bootparam.h134
-rw-r--r--arch/x86/include/asm/byteorder.h6
-rw-r--r--arch/x86/include/asm/errno.h1
-rw-r--r--arch/x86/include/asm/fcntl.h1
-rw-r--r--arch/x86/include/asm/hyperv.h193
-rw-r--r--arch/x86/include/asm/ioctl.h1
-rw-r--r--arch/x86/include/asm/ioctls.h1
-rw-r--r--arch/x86/include/asm/ipcbuf.h1
-rw-r--r--arch/x86/include/asm/irq_controller.h12
-rw-r--r--arch/x86/include/asm/kvm.h324
-rw-r--r--arch/x86/include/asm/ldt.h40
-rw-r--r--arch/x86/include/asm/mca.h43
-rw-r--r--arch/x86/include/asm/mca_dma.h201
-rw-r--r--arch/x86/include/asm/memblock.h23
-rw-r--r--arch/x86/include/asm/mman.h8
-rw-r--r--arch/x86/include/asm/msgbuf.h1
-rw-r--r--arch/x86/include/asm/msr-index.h463
-rw-r--r--arch/x86/include/asm/param.h1
-rw-r--r--arch/x86/include/asm/poll.h1
-rw-r--r--arch/x86/include/asm/posix_types_32.h85
-rw-r--r--arch/x86/include/asm/posix_types_64.h119
-rw-r--r--arch/x86/include/asm/prctl.h9
-rw-r--r--arch/x86/include/asm/ptrace-abi.h87
-rw-r--r--arch/x86/include/asm/resource.h1
-rw-r--r--arch/x86/include/asm/sembuf.h24
-rw-r--r--arch/x86/include/asm/shmbuf.h1
-rw-r--r--arch/x86/include/asm/sigcontext32.h77
-rw-r--r--arch/x86/include/asm/siginfo.h10
-rw-r--r--arch/x86/include/asm/socket.h1
-rw-r--r--arch/x86/include/asm/sockios.h1
-rw-r--r--arch/x86/include/asm/stat.h114
-rw-r--r--arch/x86/include/asm/statfs.h12
-rw-r--r--arch/x86/include/asm/swab.h61
-rw-r--r--arch/x86/include/asm/system.h523
-rw-r--r--arch/x86/include/asm/termbits.h1
-rw-r--r--arch/x86/include/asm/termios.h1
-rw-r--r--arch/x86/include/asm/trampoline.h39
-rw-r--r--arch/x86/include/asm/types.h6
-rw-r--r--arch/x86/include/asm/ucontext.h12
-rw-r--r--arch/x86/include/asm/unistd_32.h399
-rw-r--r--arch/x86/include/asm/unistd_64.h729
-rw-r--r--arch/x86/include/asm/xen/grant_table.h7
46 files changed, 3830 insertions, 0 deletions
diff --git a/arch/x86/include/asm/a.out.h b/arch/x86/include/asm/a.out.h
new file mode 100644
index 00000000000..4684f97a5bb
--- /dev/null
+++ b/arch/x86/include/asm/a.out.h
@@ -0,0 +1,20 @@
1#ifndef _ASM_X86_A_OUT_H
2#define _ASM_X86_A_OUT_H
3
4struct exec
5{
6 unsigned int a_info; /* Use macros N_MAGIC, etc for access */
7 unsigned a_text; /* length of text, in bytes */
8 unsigned a_data; /* length of data, in bytes */
9 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
10 unsigned a_syms; /* length of symbol table data in file, in bytes */
11 unsigned a_entry; /* start address */
12 unsigned a_trsize; /* length of relocation info for text, in bytes */
13 unsigned a_drsize; /* length of relocation info for data, in bytes */
14};
15
16#define N_TRSIZE(a) ((a).a_trsize)
17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms)
19
20#endif /* _ASM_X86_A_OUT_H */
diff --git a/arch/x86/include/asm/aes.h b/arch/x86/include/asm/aes.h
new file mode 100644
index 00000000000..80545a1cbe3
--- /dev/null
+++ b/arch/x86/include/asm/aes.h
@@ -0,0 +1,11 @@
1#ifndef ASM_X86_AES_H
2#define ASM_X86_AES_H
3
4#include <linux/crypto.h>
5#include <crypto/aes.h>
6
7void crypto_aes_encrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst,
8 const u8 *src);
9void crypto_aes_decrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst,
10 const u8 *src);
11#endif
diff --git a/arch/x86/include/asm/auxvec.h b/arch/x86/include/asm/auxvec.h
new file mode 100644
index 00000000000..1316b4c3542
--- /dev/null
+++ b/arch/x86/include/asm/auxvec.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_X86_AUXVEC_H
2#define _ASM_X86_AUXVEC_H
3/*
4 * Architecture-neutral AT_ values in 0-17, leave some room
5 * for more of them, start the x86-specific ones at 32.
6 */
7#ifdef __i386__
8#define AT_SYSINFO 32
9#endif
10#define AT_SYSINFO_EHDR 33
11
12#endif /* _ASM_X86_AUXVEC_H */
diff --git a/arch/x86/include/asm/bitsperlong.h b/arch/x86/include/asm/bitsperlong.h
new file mode 100644
index 00000000000..b0ae1c4dc79
--- /dev/null
+++ b/arch/x86/include/asm/bitsperlong.h
@@ -0,0 +1,13 @@
1#ifndef __ASM_X86_BITSPERLONG_H
2#define __ASM_X86_BITSPERLONG_H
3
4#ifdef __x86_64__
5# define __BITS_PER_LONG 64
6#else
7# define __BITS_PER_LONG 32
8#endif
9
10#include <asm-generic/bitsperlong.h>
11
12#endif /* __ASM_X86_BITSPERLONG_H */
13
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
new file mode 100644
index 00000000000..e020d88ec02
--- /dev/null
+++ b/arch/x86/include/asm/bootparam.h
@@ -0,0 +1,134 @@
1#ifndef _ASM_X86_BOOTPARAM_H
2#define _ASM_X86_BOOTPARAM_H
3
4#include <linux/types.h>
5#include <linux/screen_info.h>
6#include <linux/apm_bios.h>
7#include <linux/edd.h>
8#include <asm/e820.h>
9#include <asm/ist.h>
10#include <video/edid.h>
11
12/* setup data types */
13#define SETUP_NONE 0
14#define SETUP_E820_EXT 1
15#define SETUP_DTB 2
16
17/* extensible setup data list node */
18struct setup_data {
19 __u64 next;
20 __u32 type;
21 __u32 len;
22 __u8 data[0];
23};
24
25struct setup_header {
26 __u8 setup_sects;
27 __u16 root_flags;
28 __u32 syssize;
29 __u16 ram_size;
30#define RAMDISK_IMAGE_START_MASK 0x07FF
31#define RAMDISK_PROMPT_FLAG 0x8000
32#define RAMDISK_LOAD_FLAG 0x4000
33 __u16 vid_mode;
34 __u16 root_dev;
35 __u16 boot_flag;
36 __u16 jump;
37 __u32 header;
38 __u16 version;
39 __u32 realmode_swtch;
40 __u16 start_sys;
41 __u16 kernel_version;
42 __u8 type_of_loader;
43 __u8 loadflags;
44#define LOADED_HIGH (1<<0)
45#define QUIET_FLAG (1<<5)
46#define KEEP_SEGMENTS (1<<6)
47#define CAN_USE_HEAP (1<<7)
48 __u16 setup_move_size;
49 __u32 code32_start;
50 __u32 ramdisk_image;
51 __u32 ramdisk_size;
52 __u32 bootsect_kludge;
53 __u16 heap_end_ptr;
54 __u8 ext_loader_ver;
55 __u8 ext_loader_type;
56 __u32 cmd_line_ptr;
57 __u32 initrd_addr_max;
58 __u32 kernel_alignment;
59 __u8 relocatable_kernel;
60 __u8 _pad2[3];
61 __u32 cmdline_size;
62 __u32 hardware_subarch;
63 __u64 hardware_subarch_data;
64 __u32 payload_offset;
65 __u32 payload_length;
66 __u64 setup_data;
67} __attribute__((packed));
68
69struct sys_desc_table {
70 __u16 length;
71 __u8 table[14];
72};
73
74/* Gleaned from OFW's set-parameters in cpu/x86/pc/linux.fth */
75struct olpc_ofw_header {
76 __u32 ofw_magic; /* OFW signature */
77 __u32 ofw_version;
78 __u32 cif_handler; /* callback into OFW */
79 __u32 irq_desc_table;
80} __attribute__((packed));
81
82struct efi_info {
83 __u32 efi_loader_signature;
84 __u32 efi_systab;
85 __u32 efi_memdesc_size;
86 __u32 efi_memdesc_version;
87 __u32 efi_memmap;
88 __u32 efi_memmap_size;
89 __u32 efi_systab_hi;
90 __u32 efi_memmap_hi;
91};
92
93/* The so-called "zeropage" */
94struct boot_params {
95 struct screen_info screen_info; /* 0x000 */
96 struct apm_bios_info apm_bios_info; /* 0x040 */
97 __u8 _pad2[4]; /* 0x054 */
98 __u64 tboot_addr; /* 0x058 */
99 struct ist_info ist_info; /* 0x060 */
100 __u8 _pad3[16]; /* 0x070 */
101 __u8 hd0_info[16]; /* obsolete! */ /* 0x080 */
102 __u8 hd1_info[16]; /* obsolete! */ /* 0x090 */
103 struct sys_desc_table sys_desc_table; /* 0x0a0 */
104 struct olpc_ofw_header olpc_ofw_header; /* 0x0b0 */
105 __u8 _pad4[128]; /* 0x0c0 */
106 struct edid_info edid_info; /* 0x140 */
107 struct efi_info efi_info; /* 0x1c0 */
108 __u32 alt_mem_k; /* 0x1e0 */
109 __u32 scratch; /* Scratch field! */ /* 0x1e4 */
110 __u8 e820_entries; /* 0x1e8 */
111 __u8 eddbuf_entries; /* 0x1e9 */
112 __u8 edd_mbr_sig_buf_entries; /* 0x1ea */
113 __u8 _pad6[6]; /* 0x1eb */
114 struct setup_header hdr; /* setup header */ /* 0x1f1 */
115 __u8 _pad7[0x290-0x1f1-sizeof(struct setup_header)];
116 __u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX]; /* 0x290 */
117 struct e820entry e820_map[E820MAX]; /* 0x2d0 */
118 __u8 _pad8[48]; /* 0xcd0 */
119 struct edd_info eddbuf[EDDMAXNR]; /* 0xd00 */
120 __u8 _pad9[276]; /* 0xeec */
121} __attribute__((packed));
122
123enum {
124 X86_SUBARCH_PC = 0,
125 X86_SUBARCH_LGUEST,
126 X86_SUBARCH_XEN,
127 X86_SUBARCH_MRST,
128 X86_SUBARCH_CE4100,
129 X86_NR_SUBARCHS,
130};
131
132
133
134#endif /* _ASM_X86_BOOTPARAM_H */
diff --git a/arch/x86/include/asm/byteorder.h b/arch/x86/include/asm/byteorder.h
new file mode 100644
index 00000000000..b13a7a88f3e
--- /dev/null
+++ b/arch/x86/include/asm/byteorder.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_X86_BYTEORDER_H
2#define _ASM_X86_BYTEORDER_H
3
4#include <linux/byteorder/little_endian.h>
5
6#endif /* _ASM_X86_BYTEORDER_H */
diff --git a/arch/x86/include/asm/errno.h b/arch/x86/include/asm/errno.h
new file mode 100644
index 00000000000..4c82b503d92
--- /dev/null
+++ b/arch/x86/include/asm/errno.h
@@ -0,0 +1 @@
#include <asm-generic/errno.h>
diff --git a/arch/x86/include/asm/fcntl.h b/arch/x86/include/asm/fcntl.h
new file mode 100644
index 00000000000..46ab12db573
--- /dev/null
+++ b/arch/x86/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/x86/include/asm/hyperv.h b/arch/x86/include/asm/hyperv.h
new file mode 100644
index 00000000000..5df477ac3af
--- /dev/null
+++ b/arch/x86/include/asm/hyperv.h
@@ -0,0 +1,193 @@
1#ifndef _ASM_X86_HYPERV_H
2#define _ASM_X86_HYPERV_H
3
4#include <linux/types.h>
5
6/*
7 * The below CPUID leaves are present if VersionAndFeatures.HypervisorPresent
8 * is set by CPUID(HvCpuIdFunctionVersionAndFeatures).
9 */
10#define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000
11#define HYPERV_CPUID_INTERFACE 0x40000001
12#define HYPERV_CPUID_VERSION 0x40000002
13#define HYPERV_CPUID_FEATURES 0x40000003
14#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004
15#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005
16
17#define HYPERV_HYPERVISOR_PRESENT_BIT 0x80000000
18#define HYPERV_CPUID_MIN 0x40000005
19#define HYPERV_CPUID_MAX 0x4000ffff
20
21/*
22 * Feature identification. EAX indicates which features are available
23 * to the partition based upon the current partition privileges.
24 */
25
26/* VP Runtime (HV_X64_MSR_VP_RUNTIME) available */
27#define HV_X64_MSR_VP_RUNTIME_AVAILABLE (1 << 0)
28/* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/
29#define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE (1 << 1)
30/*
31 * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
32 * and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available
33 */
34#define HV_X64_MSR_SYNIC_AVAILABLE (1 << 2)
35/*
36 * Synthetic Timer MSRs (HV_X64_MSR_STIMER0_CONFIG through
37 * HV_X64_MSR_STIMER3_COUNT) available
38 */
39#define HV_X64_MSR_SYNTIMER_AVAILABLE (1 << 3)
40/*
41 * APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR)
42 * are available
43 */
44#define HV_X64_MSR_APIC_ACCESS_AVAILABLE (1 << 4)
45/* Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL) available*/
46#define HV_X64_MSR_HYPERCALL_AVAILABLE (1 << 5)
47/* Access virtual processor index MSR (HV_X64_MSR_VP_INDEX) available*/
48#define HV_X64_MSR_VP_INDEX_AVAILABLE (1 << 6)
49/* Virtual system reset MSR (HV_X64_MSR_RESET) is available*/
50#define HV_X64_MSR_RESET_AVAILABLE (1 << 7)
51 /*
52 * Access statistics pages MSRs (HV_X64_MSR_STATS_PARTITION_RETAIL_PAGE,
53 * HV_X64_MSR_STATS_PARTITION_INTERNAL_PAGE, HV_X64_MSR_STATS_VP_RETAIL_PAGE,
54 * HV_X64_MSR_STATS_VP_INTERNAL_PAGE) available
55 */
56#define HV_X64_MSR_STAT_PAGES_AVAILABLE (1 << 8)
57
58/*
59 * Feature identification: EBX indicates which flags were specified at
60 * partition creation. The format is the same as the partition creation
61 * flag structure defined in section Partition Creation Flags.
62 */
63#define HV_X64_CREATE_PARTITIONS (1 << 0)
64#define HV_X64_ACCESS_PARTITION_ID (1 << 1)
65#define HV_X64_ACCESS_MEMORY_POOL (1 << 2)
66#define HV_X64_ADJUST_MESSAGE_BUFFERS (1 << 3)
67#define HV_X64_POST_MESSAGES (1 << 4)
68#define HV_X64_SIGNAL_EVENTS (1 << 5)
69#define HV_X64_CREATE_PORT (1 << 6)
70#define HV_X64_CONNECT_PORT (1 << 7)
71#define HV_X64_ACCESS_STATS (1 << 8)
72#define HV_X64_DEBUGGING (1 << 11)
73#define HV_X64_CPU_POWER_MANAGEMENT (1 << 12)
74#define HV_X64_CONFIGURE_PROFILER (1 << 13)
75
76/*
77 * Feature identification. EDX indicates which miscellaneous features
78 * are available to the partition.
79 */
80/* The MWAIT instruction is available (per section MONITOR / MWAIT) */
81#define HV_X64_MWAIT_AVAILABLE (1 << 0)
82/* Guest debugging support is available */
83#define HV_X64_GUEST_DEBUGGING_AVAILABLE (1 << 1)
84/* Performance Monitor support is available*/
85#define HV_X64_PERF_MONITOR_AVAILABLE (1 << 2)
86/* Support for physical CPU dynamic partitioning events is available*/
87#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE (1 << 3)
88/*
89 * Support for passing hypercall input parameter block via XMM
90 * registers is available
91 */
92#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE (1 << 4)
93/* Support for a virtual guest idle state is available */
94#define HV_X64_GUEST_IDLE_STATE_AVAILABLE (1 << 5)
95
96/*
97 * Implementation recommendations. Indicates which behaviors the hypervisor
98 * recommends the OS implement for optimal performance.
99 */
100 /*
101 * Recommend using hypercall for address space switches rather
102 * than MOV to CR3 instruction
103 */
104#define HV_X64_MWAIT_RECOMMENDED (1 << 0)
105/* Recommend using hypercall for local TLB flushes rather
106 * than INVLPG or MOV to CR3 instructions */
107#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED (1 << 1)
108/*
109 * Recommend using hypercall for remote TLB flushes rather
110 * than inter-processor interrupts
111 */
112#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED (1 << 2)
113/*
114 * Recommend using MSRs for accessing APIC registers
115 * EOI, ICR and TPR rather than their memory-mapped counterparts
116 */
117#define HV_X64_APIC_ACCESS_RECOMMENDED (1 << 3)
118/* Recommend using the hypervisor-provided MSR to initiate a system RESET */
119#define HV_X64_SYSTEM_RESET_RECOMMENDED (1 << 4)
120/*
121 * Recommend using relaxed timing for this partition. If used,
122 * the VM should disable any watchdog timeouts that rely on the
123 * timely delivery of external interrupts
124 */
125#define HV_X64_RELAXED_TIMING_RECOMMENDED (1 << 5)
126
127/* MSR used to identify the guest OS. */
128#define HV_X64_MSR_GUEST_OS_ID 0x40000000
129
130/* MSR used to setup pages used to communicate with the hypervisor. */
131#define HV_X64_MSR_HYPERCALL 0x40000001
132
133/* MSR used to provide vcpu index */
134#define HV_X64_MSR_VP_INDEX 0x40000002
135
136/* MSR used to read the per-partition time reference counter */
137#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
138
139/* Define the virtual APIC registers */
140#define HV_X64_MSR_EOI 0x40000070
141#define HV_X64_MSR_ICR 0x40000071
142#define HV_X64_MSR_TPR 0x40000072
143#define HV_X64_MSR_APIC_ASSIST_PAGE 0x40000073
144
145/* Define synthetic interrupt controller model specific registers. */
146#define HV_X64_MSR_SCONTROL 0x40000080
147#define HV_X64_MSR_SVERSION 0x40000081
148#define HV_X64_MSR_SIEFP 0x40000082
149#define HV_X64_MSR_SIMP 0x40000083
150#define HV_X64_MSR_EOM 0x40000084
151#define HV_X64_MSR_SINT0 0x40000090
152#define HV_X64_MSR_SINT1 0x40000091
153#define HV_X64_MSR_SINT2 0x40000092
154#define HV_X64_MSR_SINT3 0x40000093
155#define HV_X64_MSR_SINT4 0x40000094
156#define HV_X64_MSR_SINT5 0x40000095
157#define HV_X64_MSR_SINT6 0x40000096
158#define HV_X64_MSR_SINT7 0x40000097
159#define HV_X64_MSR_SINT8 0x40000098
160#define HV_X64_MSR_SINT9 0x40000099
161#define HV_X64_MSR_SINT10 0x4000009A
162#define HV_X64_MSR_SINT11 0x4000009B
163#define HV_X64_MSR_SINT12 0x4000009C
164#define HV_X64_MSR_SINT13 0x4000009D
165#define HV_X64_MSR_SINT14 0x4000009E
166#define HV_X64_MSR_SINT15 0x4000009F
167
168
169#define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001
170#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
171#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK \
172 (~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
173
174/* Declare the various hypercall operations. */
175#define HV_X64_HV_NOTIFY_LONG_SPIN_WAIT 0x0008
176
177#define HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE 0x00000001
178#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT 12
179#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_MASK \
180 (~((1ull << HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
181
182#define HV_PROCESSOR_POWER_STATE_C0 0
183#define HV_PROCESSOR_POWER_STATE_C1 1
184#define HV_PROCESSOR_POWER_STATE_C2 2
185#define HV_PROCESSOR_POWER_STATE_C3 3
186
187/* hypercall status code */
188#define HV_STATUS_SUCCESS 0
189#define HV_STATUS_INVALID_HYPERCALL_CODE 2
190#define HV_STATUS_INVALID_HYPERCALL_INPUT 3
191#define HV_STATUS_INVALID_ALIGNMENT 4
192
193#endif
diff --git a/arch/x86/include/asm/ioctl.h b/arch/x86/include/asm/ioctl.h
new file mode 100644
index 00000000000..b279fe06dfe
--- /dev/null
+++ b/arch/x86/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/x86/include/asm/ioctls.h b/arch/x86/include/asm/ioctls.h
new file mode 100644
index 00000000000..ec34c760665
--- /dev/null
+++ b/arch/x86/include/asm/ioctls.h
@@ -0,0 +1 @@
#include <asm-generic/ioctls.h>
diff --git a/arch/x86/include/asm/ipcbuf.h b/arch/x86/include/asm/ipcbuf.h
new file mode 100644
index 00000000000..84c7e51cb6d
--- /dev/null
+++ b/arch/x86/include/asm/ipcbuf.h
@@ -0,0 +1 @@
#include <asm-generic/ipcbuf.h>
diff --git a/arch/x86/include/asm/irq_controller.h b/arch/x86/include/asm/irq_controller.h
new file mode 100644
index 00000000000..423bbbddf36
--- /dev/null
+++ b/arch/x86/include/asm/irq_controller.h
@@ -0,0 +1,12 @@
1#ifndef __IRQ_CONTROLLER__
2#define __IRQ_CONTROLLER__
3
4struct irq_domain {
5 int (*xlate)(struct irq_domain *h, const u32 *intspec, u32 intsize,
6 u32 *out_hwirq, u32 *out_type);
7 void *priv;
8 struct device_node *controller;
9 struct list_head l;
10};
11
12#endif
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h
new file mode 100644
index 00000000000..4d8dcbdfc12
--- /dev/null
+++ b/arch/x86/include/asm/kvm.h
@@ -0,0 +1,324 @@
1#ifndef _ASM_X86_KVM_H
2#define _ASM_X86_KVM_H
3
4/*
5 * KVM x86 specific structures and definitions
6 *
7 */
8
9#include <linux/types.h>
10#include <linux/ioctl.h>
11
12/* Select x86 specific features in <linux/kvm.h> */
13#define __KVM_HAVE_PIT
14#define __KVM_HAVE_IOAPIC
15#define __KVM_HAVE_DEVICE_ASSIGNMENT
16#define __KVM_HAVE_MSI
17#define __KVM_HAVE_USER_NMI
18#define __KVM_HAVE_GUEST_DEBUG
19#define __KVM_HAVE_MSIX
20#define __KVM_HAVE_MCE
21#define __KVM_HAVE_PIT_STATE2
22#define __KVM_HAVE_XEN_HVM
23#define __KVM_HAVE_VCPU_EVENTS
24#define __KVM_HAVE_DEBUGREGS
25#define __KVM_HAVE_XSAVE
26#define __KVM_HAVE_XCRS
27
28/* Architectural interrupt line count. */
29#define KVM_NR_INTERRUPTS 256
30
31struct kvm_memory_alias {
32 __u32 slot; /* this has a different namespace than memory slots */
33 __u32 flags;
34 __u64 guest_phys_addr;
35 __u64 memory_size;
36 __u64 target_phys_addr;
37};
38
39/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
40struct kvm_pic_state {
41 __u8 last_irr; /* edge detection */
42 __u8 irr; /* interrupt request register */
43 __u8 imr; /* interrupt mask register */
44 __u8 isr; /* interrupt service register */
45 __u8 priority_add; /* highest irq priority */
46 __u8 irq_base;
47 __u8 read_reg_select;
48 __u8 poll;
49 __u8 special_mask;
50 __u8 init_state;
51 __u8 auto_eoi;
52 __u8 rotate_on_auto_eoi;
53 __u8 special_fully_nested_mode;
54 __u8 init4; /* true if 4 byte init */
55 __u8 elcr; /* PIIX edge/trigger selection */
56 __u8 elcr_mask;
57};
58
59#define KVM_IOAPIC_NUM_PINS 24
60struct kvm_ioapic_state {
61 __u64 base_address;
62 __u32 ioregsel;
63 __u32 id;
64 __u32 irr;
65 __u32 pad;
66 union {
67 __u64 bits;
68 struct {
69 __u8 vector;
70 __u8 delivery_mode:3;
71 __u8 dest_mode:1;
72 __u8 delivery_status:1;
73 __u8 polarity:1;
74 __u8 remote_irr:1;
75 __u8 trig_mode:1;
76 __u8 mask:1;
77 __u8 reserve:7;
78 __u8 reserved[4];
79 __u8 dest_id;
80 } fields;
81 } redirtbl[KVM_IOAPIC_NUM_PINS];
82};
83
84#define KVM_IRQCHIP_PIC_MASTER 0
85#define KVM_IRQCHIP_PIC_SLAVE 1
86#define KVM_IRQCHIP_IOAPIC 2
87#define KVM_NR_IRQCHIPS 3
88
89/* for KVM_GET_REGS and KVM_SET_REGS */
90struct kvm_regs {
91 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
92 __u64 rax, rbx, rcx, rdx;
93 __u64 rsi, rdi, rsp, rbp;
94 __u64 r8, r9, r10, r11;
95 __u64 r12, r13, r14, r15;
96 __u64 rip, rflags;
97};
98
99/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
100#define KVM_APIC_REG_SIZE 0x400
101struct kvm_lapic_state {
102 char regs[KVM_APIC_REG_SIZE];
103};
104
105struct kvm_segment {
106 __u64 base;
107 __u32 limit;
108 __u16 selector;
109 __u8 type;
110 __u8 present, dpl, db, s, l, g, avl;
111 __u8 unusable;
112 __u8 padding;
113};
114
115struct kvm_dtable {
116 __u64 base;
117 __u16 limit;
118 __u16 padding[3];
119};
120
121
122/* for KVM_GET_SREGS and KVM_SET_SREGS */
123struct kvm_sregs {
124 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
125 struct kvm_segment cs, ds, es, fs, gs, ss;
126 struct kvm_segment tr, ldt;
127 struct kvm_dtable gdt, idt;
128 __u64 cr0, cr2, cr3, cr4, cr8;
129 __u64 efer;
130 __u64 apic_base;
131 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
132};
133
134/* for KVM_GET_FPU and KVM_SET_FPU */
135struct kvm_fpu {
136 __u8 fpr[8][16];
137 __u16 fcw;
138 __u16 fsw;
139 __u8 ftwx; /* in fxsave format */
140 __u8 pad1;
141 __u16 last_opcode;
142 __u64 last_ip;
143 __u64 last_dp;
144 __u8 xmm[16][16];
145 __u32 mxcsr;
146 __u32 pad2;
147};
148
149struct kvm_msr_entry {
150 __u32 index;
151 __u32 reserved;
152 __u64 data;
153};
154
155/* for KVM_GET_MSRS and KVM_SET_MSRS */
156struct kvm_msrs {
157 __u32 nmsrs; /* number of msrs in entries */
158 __u32 pad;
159
160 struct kvm_msr_entry entries[0];
161};
162
163/* for KVM_GET_MSR_INDEX_LIST */
164struct kvm_msr_list {
165 __u32 nmsrs; /* number of msrs in entries */
166 __u32 indices[0];
167};
168
169
170struct kvm_cpuid_entry {
171 __u32 function;
172 __u32 eax;
173 __u32 ebx;
174 __u32 ecx;
175 __u32 edx;
176 __u32 padding;
177};
178
179/* for KVM_SET_CPUID */
180struct kvm_cpuid {
181 __u32 nent;
182 __u32 padding;
183 struct kvm_cpuid_entry entries[0];
184};
185
186struct kvm_cpuid_entry2 {
187 __u32 function;
188 __u32 index;
189 __u32 flags;
190 __u32 eax;
191 __u32 ebx;
192 __u32 ecx;
193 __u32 edx;
194 __u32 padding[3];
195};
196
197#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1
198#define KVM_CPUID_FLAG_STATEFUL_FUNC 2
199#define KVM_CPUID_FLAG_STATE_READ_NEXT 4
200
201/* for KVM_SET_CPUID2 */
202struct kvm_cpuid2 {
203 __u32 nent;
204 __u32 padding;
205 struct kvm_cpuid_entry2 entries[0];
206};
207
208/* for KVM_GET_PIT and KVM_SET_PIT */
209struct kvm_pit_channel_state {
210 __u32 count; /* can be 65536 */
211 __u16 latched_count;
212 __u8 count_latched;
213 __u8 status_latched;
214 __u8 status;
215 __u8 read_state;
216 __u8 write_state;
217 __u8 write_latch;
218 __u8 rw_mode;
219 __u8 mode;
220 __u8 bcd;
221 __u8 gate;
222 __s64 count_load_time;
223};
224
225struct kvm_debug_exit_arch {
226 __u32 exception;
227 __u32 pad;
228 __u64 pc;
229 __u64 dr6;
230 __u64 dr7;
231};
232
233#define KVM_GUESTDBG_USE_SW_BP 0x00010000
234#define KVM_GUESTDBG_USE_HW_BP 0x00020000
235#define KVM_GUESTDBG_INJECT_DB 0x00040000
236#define KVM_GUESTDBG_INJECT_BP 0x00080000
237
238/* for KVM_SET_GUEST_DEBUG */
239struct kvm_guest_debug_arch {
240 __u64 debugreg[8];
241};
242
243struct kvm_pit_state {
244 struct kvm_pit_channel_state channels[3];
245};
246
247#define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
248
249struct kvm_pit_state2 {
250 struct kvm_pit_channel_state channels[3];
251 __u32 flags;
252 __u32 reserved[9];
253};
254
255struct kvm_reinject_control {
256 __u8 pit_reinject;
257 __u8 reserved[31];
258};
259
260/* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
261#define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
262#define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
263#define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
264
265/* Interrupt shadow states */
266#define KVM_X86_SHADOW_INT_MOV_SS 0x01
267#define KVM_X86_SHADOW_INT_STI 0x02
268
269/* for KVM_GET/SET_VCPU_EVENTS */
270struct kvm_vcpu_events {
271 struct {
272 __u8 injected;
273 __u8 nr;
274 __u8 has_error_code;
275 __u8 pad;
276 __u32 error_code;
277 } exception;
278 struct {
279 __u8 injected;
280 __u8 nr;
281 __u8 soft;
282 __u8 shadow;
283 } interrupt;
284 struct {
285 __u8 injected;
286 __u8 pending;
287 __u8 masked;
288 __u8 pad;
289 } nmi;
290 __u32 sipi_vector;
291 __u32 flags;
292 __u32 reserved[10];
293};
294
295/* for KVM_GET/SET_DEBUGREGS */
296struct kvm_debugregs {
297 __u64 db[4];
298 __u64 dr6;
299 __u64 dr7;
300 __u64 flags;
301 __u64 reserved[9];
302};
303
304/* for KVM_CAP_XSAVE */
305struct kvm_xsave {
306 __u32 region[1024];
307};
308
309#define KVM_MAX_XCRS 16
310
311struct kvm_xcr {
312 __u32 xcr;
313 __u32 reserved;
314 __u64 value;
315};
316
317struct kvm_xcrs {
318 __u32 nr_xcrs;
319 __u32 flags;
320 struct kvm_xcr xcrs[KVM_MAX_XCRS];
321 __u64 padding[16];
322};
323
324#endif /* _ASM_X86_KVM_H */
diff --git a/arch/x86/include/asm/ldt.h b/arch/x86/include/asm/ldt.h
new file mode 100644
index 00000000000..46727eb37bf
--- /dev/null
+++ b/arch/x86/include/asm/ldt.h
@@ -0,0 +1,40 @@
1/*
2 * ldt.h
3 *
4 * Definitions of structures used with the modify_ldt system call.
5 */
6#ifndef _ASM_X86_LDT_H
7#define _ASM_X86_LDT_H
8
9/* Maximum number of LDT entries supported. */
10#define LDT_ENTRIES 8192
11/* The size of each LDT entry. */
12#define LDT_ENTRY_SIZE 8
13
14#ifndef __ASSEMBLY__
15/*
16 * Note on 64bit base and limit is ignored and you cannot set DS/ES/CS
17 * not to the default values if you still want to do syscalls. This
18 * call is more for 32bit mode therefore.
19 */
20struct user_desc {
21 unsigned int entry_number;
22 unsigned int base_addr;
23 unsigned int limit;
24 unsigned int seg_32bit:1;
25 unsigned int contents:2;
26 unsigned int read_exec_only:1;
27 unsigned int limit_in_pages:1;
28 unsigned int seg_not_present:1;
29 unsigned int useable:1;
30#ifdef __x86_64__
31 unsigned int lm:1;
32#endif
33};
34
35#define MODIFY_LDT_CONTENTS_DATA 0
36#define MODIFY_LDT_CONTENTS_STACK 1
37#define MODIFY_LDT_CONTENTS_CODE 2
38
39#endif /* !__ASSEMBLY__ */
40#endif /* _ASM_X86_LDT_H */
diff --git a/arch/x86/include/asm/mca.h b/arch/x86/include/asm/mca.h
new file mode 100644
index 00000000000..eedbb6cc1ef
--- /dev/null
+++ b/arch/x86/include/asm/mca.h
@@ -0,0 +1,43 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Platform specific MCA defines */
4#ifndef _ASM_X86_MCA_H
5#define _ASM_X86_MCA_H
6
7/* Maximal number of MCA slots - actually, some machines have less, but
8 * they all have sufficient number of POS registers to cover 8.
9 */
10#define MCA_MAX_SLOT_NR 8
11
12/* Most machines have only one MCA bus. The only multiple bus machines
13 * I know have at most two */
14#define MAX_MCA_BUSSES 2
15
16#define MCA_PRIMARY_BUS 0
17#define MCA_SECONDARY_BUS 1
18
19/* Dummy slot numbers on primary MCA for integrated functions */
20#define MCA_INTEGSCSI (MCA_MAX_SLOT_NR)
21#define MCA_INTEGVIDEO (MCA_MAX_SLOT_NR+1)
22#define MCA_MOTHERBOARD (MCA_MAX_SLOT_NR+2)
23
24/* Dummy POS values for integrated functions */
25#define MCA_DUMMY_POS_START 0x10000
26#define MCA_INTEGSCSI_POS (MCA_DUMMY_POS_START+1)
27#define MCA_INTEGVIDEO_POS (MCA_DUMMY_POS_START+2)
28#define MCA_MOTHERBOARD_POS (MCA_DUMMY_POS_START+3)
29
30/* MCA registers */
31
32#define MCA_MOTHERBOARD_SETUP_REG 0x94
33#define MCA_ADAPTER_SETUP_REG 0x96
34#define MCA_POS_REG(n) (0x100+(n))
35
36#define MCA_ENABLED 0x01 /* POS 2, set if adapter enabled */
37
38/* Max number of adapters, including both slots and various integrated
39 * things.
40 */
41#define MCA_NUMADAPTERS (MCA_MAX_SLOT_NR+3)
42
43#endif /* _ASM_X86_MCA_H */
diff --git a/arch/x86/include/asm/mca_dma.h b/arch/x86/include/asm/mca_dma.h
new file mode 100644
index 00000000000..45271aef82d
--- /dev/null
+++ b/arch/x86/include/asm/mca_dma.h
@@ -0,0 +1,201 @@
1#ifndef _ASM_X86_MCA_DMA_H
2#define _ASM_X86_MCA_DMA_H
3
4#include <asm/io.h>
5#include <linux/ioport.h>
6
7/*
8 * Microchannel specific DMA stuff. DMA on an MCA machine is fairly similar to
9 * standard PC dma, but it certainly has its quirks. DMA register addresses
10 * are in a different place and there are some added functions. Most of this
11 * should be pretty obvious on inspection. Note that the user must divide
12 * count by 2 when using 16-bit dma; that is not handled by these functions.
13 *
14 * Ramen Noodles are yummy.
15 *
16 * 1998 Tymm Twillman <tymm@computer.org>
17 */
18
19/*
20 * Registers that are used by the DMA controller; FN is the function register
21 * (tell the controller what to do) and EXE is the execution register (how
22 * to do it)
23 */
24
25#define MCA_DMA_REG_FN 0x18
26#define MCA_DMA_REG_EXE 0x1A
27
28/*
29 * Functions that the DMA controller can do
30 */
31
32#define MCA_DMA_FN_SET_IO 0x00
33#define MCA_DMA_FN_SET_ADDR 0x20
34#define MCA_DMA_FN_GET_ADDR 0x30
35#define MCA_DMA_FN_SET_COUNT 0x40
36#define MCA_DMA_FN_GET_COUNT 0x50
37#define MCA_DMA_FN_GET_STATUS 0x60
38#define MCA_DMA_FN_SET_MODE 0x70
39#define MCA_DMA_FN_SET_ARBUS 0x80
40#define MCA_DMA_FN_MASK 0x90
41#define MCA_DMA_FN_RESET_MASK 0xA0
42#define MCA_DMA_FN_MASTER_CLEAR 0xD0
43
44/*
45 * Modes (used by setting MCA_DMA_FN_MODE in the function register)
46 *
47 * Note that the MODE_READ is read from memory (write to device), and
48 * MODE_WRITE is vice-versa.
49 */
50
51#define MCA_DMA_MODE_XFER 0x04 /* read by default */
52#define MCA_DMA_MODE_READ 0x04 /* same as XFER */
53#define MCA_DMA_MODE_WRITE 0x08 /* OR with MODE_XFER to use */
54#define MCA_DMA_MODE_IO 0x01 /* DMA from IO register */
55#define MCA_DMA_MODE_16 0x40 /* 16 bit xfers */
56
57
58/**
59 * mca_enable_dma - channel to enable DMA on
60 * @dmanr: DMA channel
61 *
62 * Enable the MCA bus DMA on a channel. This can be called from
63 * IRQ context.
64 */
65
66static inline void mca_enable_dma(unsigned int dmanr)
67{
68 outb(MCA_DMA_FN_RESET_MASK | dmanr, MCA_DMA_REG_FN);
69}
70
71/**
72 * mca_disble_dma - channel to disable DMA on
73 * @dmanr: DMA channel
74 *
75 * Enable the MCA bus DMA on a channel. This can be called from
76 * IRQ context.
77 */
78
79static inline void mca_disable_dma(unsigned int dmanr)
80{
81 outb(MCA_DMA_FN_MASK | dmanr, MCA_DMA_REG_FN);
82}
83
84/**
85 * mca_set_dma_addr - load a 24bit DMA address
86 * @dmanr: DMA channel
87 * @a: 24bit bus address
88 *
89 * Load the address register in the DMA controller. This has a 24bit
90 * limitation (16Mb).
91 */
92
93static inline void mca_set_dma_addr(unsigned int dmanr, unsigned int a)
94{
95 outb(MCA_DMA_FN_SET_ADDR | dmanr, MCA_DMA_REG_FN);
96 outb(a & 0xff, MCA_DMA_REG_EXE);
97 outb((a >> 8) & 0xff, MCA_DMA_REG_EXE);
98 outb((a >> 16) & 0xff, MCA_DMA_REG_EXE);
99}
100
101/**
102 * mca_get_dma_addr - load a 24bit DMA address
103 * @dmanr: DMA channel
104 *
105 * Read the address register in the DMA controller. This has a 24bit
106 * limitation (16Mb). The return is a bus address.
107 */
108
109static inline unsigned int mca_get_dma_addr(unsigned int dmanr)
110{
111 unsigned int addr;
112
113 outb(MCA_DMA_FN_GET_ADDR | dmanr, MCA_DMA_REG_FN);
114 addr = inb(MCA_DMA_REG_EXE);
115 addr |= inb(MCA_DMA_REG_EXE) << 8;
116 addr |= inb(MCA_DMA_REG_EXE) << 16;
117
118 return addr;
119}
120
121/**
122 * mca_set_dma_count - load a 16bit transfer count
123 * @dmanr: DMA channel
124 * @count: count
125 *
126 * Set the DMA count for this channel. This can be up to 64Kbytes.
127 * Setting a count of zero will not do what you expect.
128 */
129
130static inline void mca_set_dma_count(unsigned int dmanr, unsigned int count)
131{
132 count--; /* transfers one more than count -- correct for this */
133
134 outb(MCA_DMA_FN_SET_COUNT | dmanr, MCA_DMA_REG_FN);
135 outb(count & 0xff, MCA_DMA_REG_EXE);
136 outb((count >> 8) & 0xff, MCA_DMA_REG_EXE);
137}
138
139/**
140 * mca_get_dma_residue - get the remaining bytes to transfer
141 * @dmanr: DMA channel
142 *
143 * This function returns the number of bytes left to transfer
144 * on this DMA channel.
145 */
146
147static inline unsigned int mca_get_dma_residue(unsigned int dmanr)
148{
149 unsigned short count;
150
151 outb(MCA_DMA_FN_GET_COUNT | dmanr, MCA_DMA_REG_FN);
152 count = 1 + inb(MCA_DMA_REG_EXE);
153 count += inb(MCA_DMA_REG_EXE) << 8;
154
155 return count;
156}
157
158/**
159 * mca_set_dma_io - set the port for an I/O transfer
160 * @dmanr: DMA channel
161 * @io_addr: an I/O port number
162 *
163 * Unlike the ISA bus DMA controllers the DMA on MCA bus can transfer
164 * with an I/O port target.
165 */
166
167static inline void mca_set_dma_io(unsigned int dmanr, unsigned int io_addr)
168{
169 /*
170 * DMA from a port address -- set the io address
171 */
172
173 outb(MCA_DMA_FN_SET_IO | dmanr, MCA_DMA_REG_FN);
174 outb(io_addr & 0xff, MCA_DMA_REG_EXE);
175 outb((io_addr >> 8) & 0xff, MCA_DMA_REG_EXE);
176}
177
178/**
179 * mca_set_dma_mode - set the DMA mode
180 * @dmanr: DMA channel
181 * @mode: mode to set
182 *
183 * The DMA controller supports several modes. The mode values you can
184 * set are-
185 *
186 * %MCA_DMA_MODE_READ when reading from the DMA device.
187 *
188 * %MCA_DMA_MODE_WRITE to writing to the DMA device.
189 *
190 * %MCA_DMA_MODE_IO to do DMA to or from an I/O port.
191 *
192 * %MCA_DMA_MODE_16 to do 16bit transfers.
193 */
194
195static inline void mca_set_dma_mode(unsigned int dmanr, unsigned int mode)
196{
197 outb(MCA_DMA_FN_SET_MODE | dmanr, MCA_DMA_REG_FN);
198 outb(mode, MCA_DMA_REG_EXE);
199}
200
201#endif /* _ASM_X86_MCA_DMA_H */
diff --git a/arch/x86/include/asm/memblock.h b/arch/x86/include/asm/memblock.h
new file mode 100644
index 00000000000..0cd3800f33b
--- /dev/null
+++ b/arch/x86/include/asm/memblock.h
@@ -0,0 +1,23 @@
1#ifndef _X86_MEMBLOCK_H
2#define _X86_MEMBLOCK_H
3
4#define ARCH_DISCARD_MEMBLOCK
5
6u64 memblock_x86_find_in_range_size(u64 start, u64 *sizep, u64 align);
7
8void memblock_x86_reserve_range(u64 start, u64 end, char *name);
9void memblock_x86_free_range(u64 start, u64 end);
10struct range;
11int __get_free_all_memory_range(struct range **range, int nodeid,
12 unsigned long start_pfn, unsigned long end_pfn);
13int get_free_all_memory_range(struct range **rangep, int nodeid);
14
15void memblock_x86_register_active_regions(int nid, unsigned long start_pfn,
16 unsigned long last_pfn);
17u64 memblock_x86_hole_size(u64 start, u64 end);
18u64 memblock_x86_find_in_range_node(int nid, u64 start, u64 end, u64 size, u64 align);
19u64 memblock_x86_free_memory_in_range(u64 addr, u64 limit);
20u64 memblock_x86_memory_in_range(u64 addr, u64 limit);
21bool memblock_x86_check_reserved_size(u64 *addrp, u64 *sizep, u64 align);
22
23#endif
diff --git a/arch/x86/include/asm/mman.h b/arch/x86/include/asm/mman.h
new file mode 100644
index 00000000000..593e51d4643
--- /dev/null
+++ b/arch/x86/include/asm/mman.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_X86_MMAN_H
2#define _ASM_X86_MMAN_H
3
4#define MAP_32BIT 0x40 /* only give out 32bit addresses */
5
6#include <asm-generic/mman.h>
7
8#endif /* _ASM_X86_MMAN_H */
diff --git a/arch/x86/include/asm/msgbuf.h b/arch/x86/include/asm/msgbuf.h
new file mode 100644
index 00000000000..809134c644a
--- /dev/null
+++ b/arch/x86/include/asm/msgbuf.h
@@ -0,0 +1 @@
#include <asm-generic/msgbuf.h>
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
new file mode 100644
index 00000000000..d52609aeeab
--- /dev/null
+++ b/arch/x86/include/asm/msr-index.h
@@ -0,0 +1,463 @@
1#ifndef _ASM_X86_MSR_INDEX_H
2#define _ASM_X86_MSR_INDEX_H
3
4/* CPU model specific register (MSR) numbers */
5
6/* x86-64 specific MSRs */
7#define MSR_EFER 0xc0000080 /* extended feature register */
8#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */
9#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */
10#define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */
11#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
12#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
13#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
14#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
15#define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */
16
17/* EFER bits: */
18#define _EFER_SCE 0 /* SYSCALL/SYSRET */
19#define _EFER_LME 8 /* Long mode enable */
20#define _EFER_LMA 10 /* Long mode active (read-only) */
21#define _EFER_NX 11 /* No execute enable */
22#define _EFER_SVME 12 /* Enable virtualization */
23#define _EFER_LMSLE 13 /* Long Mode Segment Limit Enable */
24#define _EFER_FFXSR 14 /* Enable Fast FXSAVE/FXRSTOR */
25
26#define EFER_SCE (1<<_EFER_SCE)
27#define EFER_LME (1<<_EFER_LME)
28#define EFER_LMA (1<<_EFER_LMA)
29#define EFER_NX (1<<_EFER_NX)
30#define EFER_SVME (1<<_EFER_SVME)
31#define EFER_LMSLE (1<<_EFER_LMSLE)
32#define EFER_FFXSR (1<<_EFER_FFXSR)
33
34/* Intel MSRs. Some also available on other CPUs */
35#define MSR_IA32_PERFCTR0 0x000000c1
36#define MSR_IA32_PERFCTR1 0x000000c2
37#define MSR_FSB_FREQ 0x000000cd
38
39#define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
40#define NHM_C3_AUTO_DEMOTE (1UL << 25)
41#define NHM_C1_AUTO_DEMOTE (1UL << 26)
42#define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25)
43
44#define MSR_MTRRcap 0x000000fe
45#define MSR_IA32_BBL_CR_CTL 0x00000119
46#define MSR_IA32_BBL_CR_CTL3 0x0000011e
47
48#define MSR_IA32_SYSENTER_CS 0x00000174
49#define MSR_IA32_SYSENTER_ESP 0x00000175
50#define MSR_IA32_SYSENTER_EIP 0x00000176
51
52#define MSR_IA32_MCG_CAP 0x00000179
53#define MSR_IA32_MCG_STATUS 0x0000017a
54#define MSR_IA32_MCG_CTL 0x0000017b
55
56#define MSR_OFFCORE_RSP_0 0x000001a6
57#define MSR_OFFCORE_RSP_1 0x000001a7
58
59#define MSR_IA32_PEBS_ENABLE 0x000003f1
60#define MSR_IA32_DS_AREA 0x00000600
61#define MSR_IA32_PERF_CAPABILITIES 0x00000345
62
63#define MSR_MTRRfix64K_00000 0x00000250
64#define MSR_MTRRfix16K_80000 0x00000258
65#define MSR_MTRRfix16K_A0000 0x00000259
66#define MSR_MTRRfix4K_C0000 0x00000268
67#define MSR_MTRRfix4K_C8000 0x00000269
68#define MSR_MTRRfix4K_D0000 0x0000026a
69#define MSR_MTRRfix4K_D8000 0x0000026b
70#define MSR_MTRRfix4K_E0000 0x0000026c
71#define MSR_MTRRfix4K_E8000 0x0000026d
72#define MSR_MTRRfix4K_F0000 0x0000026e
73#define MSR_MTRRfix4K_F8000 0x0000026f
74#define MSR_MTRRdefType 0x000002ff
75
76#define MSR_IA32_CR_PAT 0x00000277
77
78#define MSR_IA32_DEBUGCTLMSR 0x000001d9
79#define MSR_IA32_LASTBRANCHFROMIP 0x000001db
80#define MSR_IA32_LASTBRANCHTOIP 0x000001dc
81#define MSR_IA32_LASTINTFROMIP 0x000001dd
82#define MSR_IA32_LASTINTTOIP 0x000001de
83
84/* DEBUGCTLMSR bits (others vary by model): */
85#define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */
86#define DEBUGCTLMSR_BTF (1UL << 1) /* single-step on branches */
87#define DEBUGCTLMSR_TR (1UL << 6)
88#define DEBUGCTLMSR_BTS (1UL << 7)
89#define DEBUGCTLMSR_BTINT (1UL << 8)
90#define DEBUGCTLMSR_BTS_OFF_OS (1UL << 9)
91#define DEBUGCTLMSR_BTS_OFF_USR (1UL << 10)
92#define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI (1UL << 11)
93
94#define MSR_IA32_MC0_CTL 0x00000400
95#define MSR_IA32_MC0_STATUS 0x00000401
96#define MSR_IA32_MC0_ADDR 0x00000402
97#define MSR_IA32_MC0_MISC 0x00000403
98
99#define MSR_AMD64_MC0_MASK 0xc0010044
100
101#define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x))
102#define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x))
103#define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x))
104#define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x))
105
106#define MSR_AMD64_MCx_MASK(x) (MSR_AMD64_MC0_MASK + (x))
107
108/* These are consecutive and not in the normal 4er MCE bank block */
109#define MSR_IA32_MC0_CTL2 0x00000280
110#define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x))
111
112#define MSR_P6_PERFCTR0 0x000000c1
113#define MSR_P6_PERFCTR1 0x000000c2
114#define MSR_P6_EVNTSEL0 0x00000186
115#define MSR_P6_EVNTSEL1 0x00000187
116
117/* AMD64 MSRs. Not complete. See the architecture manual for a more
118 complete list. */
119
120#define MSR_AMD64_PATCH_LEVEL 0x0000008b
121#define MSR_AMD64_TSC_RATIO 0xc0000104
122#define MSR_AMD64_NB_CFG 0xc001001f
123#define MSR_AMD64_PATCH_LOADER 0xc0010020
124#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
125#define MSR_AMD64_OSVW_STATUS 0xc0010141
126#define MSR_AMD64_DC_CFG 0xc0011022
127#define MSR_AMD64_IBSFETCHCTL 0xc0011030
128#define MSR_AMD64_IBSFETCHLINAD 0xc0011031
129#define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032
130#define MSR_AMD64_IBSOPCTL 0xc0011033
131#define MSR_AMD64_IBSOPRIP 0xc0011034
132#define MSR_AMD64_IBSOPDATA 0xc0011035
133#define MSR_AMD64_IBSOPDATA2 0xc0011036
134#define MSR_AMD64_IBSOPDATA3 0xc0011037
135#define MSR_AMD64_IBSDCLINAD 0xc0011038
136#define MSR_AMD64_IBSDCPHYSAD 0xc0011039
137#define MSR_AMD64_IBSCTL 0xc001103a
138#define MSR_AMD64_IBSBRTARGET 0xc001103b
139
140/* Fam 15h MSRs */
141#define MSR_F15H_PERF_CTL 0xc0010200
142#define MSR_F15H_PERF_CTR 0xc0010201
143
144/* Fam 10h MSRs */
145#define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
146#define FAM10H_MMIO_CONF_ENABLE (1<<0)
147#define FAM10H_MMIO_CONF_BUSRANGE_MASK 0xf
148#define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2
149#define FAM10H_MMIO_CONF_BASE_MASK 0xfffffffULL
150#define FAM10H_MMIO_CONF_BASE_SHIFT 20
151#define MSR_FAM10H_NODE_ID 0xc001100c
152
153/* K8 MSRs */
154#define MSR_K8_TOP_MEM1 0xc001001a
155#define MSR_K8_TOP_MEM2 0xc001001d
156#define MSR_K8_SYSCFG 0xc0010010
157#define MSR_K8_INT_PENDING_MSG 0xc0010055
158/* C1E active bits in int pending message */
159#define K8_INTP_C1E_ACTIVE_MASK 0x18000000
160#define MSR_K8_TSEG_ADDR 0xc0010112
161#define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */
162#define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */
163#define K8_MTRR_RDMEM_WRMEM_MASK 0x18181818 /* Mask: RdMem|WrMem */
164
165/* K7 MSRs */
166#define MSR_K7_EVNTSEL0 0xc0010000
167#define MSR_K7_PERFCTR0 0xc0010004
168#define MSR_K7_EVNTSEL1 0xc0010001
169#define MSR_K7_PERFCTR1 0xc0010005
170#define MSR_K7_EVNTSEL2 0xc0010002
171#define MSR_K7_PERFCTR2 0xc0010006
172#define MSR_K7_EVNTSEL3 0xc0010003
173#define MSR_K7_PERFCTR3 0xc0010007
174#define MSR_K7_CLK_CTL 0xc001001b
175#define MSR_K7_HWCR 0xc0010015
176#define MSR_K7_FID_VID_CTL 0xc0010041
177#define MSR_K7_FID_VID_STATUS 0xc0010042
178
179/* K6 MSRs */
180#define MSR_K6_WHCR 0xc0000082
181#define MSR_K6_UWCCR 0xc0000085
182#define MSR_K6_EPMR 0xc0000086
183#define MSR_K6_PSOR 0xc0000087
184#define MSR_K6_PFIR 0xc0000088
185
186/* Centaur-Hauls/IDT defined MSRs. */
187#define MSR_IDT_FCR1 0x00000107
188#define MSR_IDT_FCR2 0x00000108
189#define MSR_IDT_FCR3 0x00000109
190#define MSR_IDT_FCR4 0x0000010a
191
192#define MSR_IDT_MCR0 0x00000110
193#define MSR_IDT_MCR1 0x00000111
194#define MSR_IDT_MCR2 0x00000112
195#define MSR_IDT_MCR3 0x00000113
196#define MSR_IDT_MCR4 0x00000114
197#define MSR_IDT_MCR5 0x00000115
198#define MSR_IDT_MCR6 0x00000116
199#define MSR_IDT_MCR7 0x00000117
200#define MSR_IDT_MCR_CTRL 0x00000120
201
202/* VIA Cyrix defined MSRs*/
203#define MSR_VIA_FCR 0x00001107
204#define MSR_VIA_LONGHAUL 0x0000110a
205#define MSR_VIA_RNG 0x0000110b
206#define MSR_VIA_BCR2 0x00001147
207
208/* Transmeta defined MSRs */
209#define MSR_TMTA_LONGRUN_CTRL 0x80868010
210#define MSR_TMTA_LONGRUN_FLAGS 0x80868011
211#define MSR_TMTA_LRTI_READOUT 0x80868018
212#define MSR_TMTA_LRTI_VOLT_MHZ 0x8086801a
213
214/* Intel defined MSRs. */
215#define MSR_IA32_P5_MC_ADDR 0x00000000
216#define MSR_IA32_P5_MC_TYPE 0x00000001
217#define MSR_IA32_TSC 0x00000010
218#define MSR_IA32_PLATFORM_ID 0x00000017
219#define MSR_IA32_EBL_CR_POWERON 0x0000002a
220#define MSR_EBC_FREQUENCY_ID 0x0000002c
221#define MSR_IA32_FEATURE_CONTROL 0x0000003a
222
223#define FEATURE_CONTROL_LOCKED (1<<0)
224#define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1)
225#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
226
227#define MSR_IA32_APICBASE 0x0000001b
228#define MSR_IA32_APICBASE_BSP (1<<8)
229#define MSR_IA32_APICBASE_ENABLE (1<<11)
230#define MSR_IA32_APICBASE_BASE (0xfffff<<12)
231
232#define MSR_IA32_UCODE_WRITE 0x00000079
233#define MSR_IA32_UCODE_REV 0x0000008b
234
235#define MSR_IA32_PERF_STATUS 0x00000198
236#define MSR_IA32_PERF_CTL 0x00000199
237
238#define MSR_IA32_MPERF 0x000000e7
239#define MSR_IA32_APERF 0x000000e8
240
241#define MSR_IA32_THERM_CONTROL 0x0000019a
242#define MSR_IA32_THERM_INTERRUPT 0x0000019b
243
244#define THERM_INT_HIGH_ENABLE (1 << 0)
245#define THERM_INT_LOW_ENABLE (1 << 1)
246#define THERM_INT_PLN_ENABLE (1 << 24)
247
248#define MSR_IA32_THERM_STATUS 0x0000019c
249
250#define THERM_STATUS_PROCHOT (1 << 0)
251#define THERM_STATUS_POWER_LIMIT (1 << 10)
252
253#define MSR_THERM2_CTL 0x0000019d
254
255#define MSR_THERM2_CTL_TM_SELECT (1ULL << 16)
256
257#define MSR_IA32_MISC_ENABLE 0x000001a0
258
259#define MSR_IA32_TEMPERATURE_TARGET 0x000001a2
260
261#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0
262#define ENERGY_PERF_BIAS_PERFORMANCE 0
263#define ENERGY_PERF_BIAS_NORMAL 6
264#define ENERGY_PERF_BIAS_POWERSAVE 15
265
266#define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1
267
268#define PACKAGE_THERM_STATUS_PROCHOT (1 << 0)
269#define PACKAGE_THERM_STATUS_POWER_LIMIT (1 << 10)
270
271#define MSR_IA32_PACKAGE_THERM_INTERRUPT 0x000001b2
272
273#define PACKAGE_THERM_INT_HIGH_ENABLE (1 << 0)
274#define PACKAGE_THERM_INT_LOW_ENABLE (1 << 1)
275#define PACKAGE_THERM_INT_PLN_ENABLE (1 << 24)
276
277/* Thermal Thresholds Support */
278#define THERM_INT_THRESHOLD0_ENABLE (1 << 15)
279#define THERM_SHIFT_THRESHOLD0 8
280#define THERM_MASK_THRESHOLD0 (0x7f << THERM_SHIFT_THRESHOLD0)
281#define THERM_INT_THRESHOLD1_ENABLE (1 << 23)
282#define THERM_SHIFT_THRESHOLD1 16
283#define THERM_MASK_THRESHOLD1 (0x7f << THERM_SHIFT_THRESHOLD1)
284#define THERM_STATUS_THRESHOLD0 (1 << 6)
285#define THERM_LOG_THRESHOLD0 (1 << 7)
286#define THERM_STATUS_THRESHOLD1 (1 << 8)
287#define THERM_LOG_THRESHOLD1 (1 << 9)
288
289/* MISC_ENABLE bits: architectural */
290#define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0)
291#define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1)
292#define MSR_IA32_MISC_ENABLE_EMON (1ULL << 7)
293#define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL (1ULL << 11)
294#define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1ULL << 12)
295#define MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP (1ULL << 16)
296#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << 18)
297#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << 22)
298#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << 23)
299#define MSR_IA32_MISC_ENABLE_XD_DISABLE (1ULL << 34)
300
301/* MISC_ENABLE bits: model-specific, meaning may vary from core to core */
302#define MSR_IA32_MISC_ENABLE_X87_COMPAT (1ULL << 2)
303#define MSR_IA32_MISC_ENABLE_TM1 (1ULL << 3)
304#define MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE (1ULL << 4)
305#define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << 6)
306#define MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK (1ULL << 8)
307#define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE (1ULL << 9)
308#define MSR_IA32_MISC_ENABLE_FERR (1ULL << 10)
309#define MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX (1ULL << 10)
310#define MSR_IA32_MISC_ENABLE_TM2 (1ULL << 13)
311#define MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE (1ULL << 19)
312#define MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK (1ULL << 20)
313#define MSR_IA32_MISC_ENABLE_L1D_CONTEXT (1ULL << 24)
314#define MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE (1ULL << 37)
315#define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38)
316#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39)
317
318/* P4/Xeon+ specific */
319#define MSR_IA32_MCG_EAX 0x00000180
320#define MSR_IA32_MCG_EBX 0x00000181
321#define MSR_IA32_MCG_ECX 0x00000182
322#define MSR_IA32_MCG_EDX 0x00000183
323#define MSR_IA32_MCG_ESI 0x00000184
324#define MSR_IA32_MCG_EDI 0x00000185
325#define MSR_IA32_MCG_EBP 0x00000186
326#define MSR_IA32_MCG_ESP 0x00000187
327#define MSR_IA32_MCG_EFLAGS 0x00000188
328#define MSR_IA32_MCG_EIP 0x00000189
329#define MSR_IA32_MCG_RESERVED 0x0000018a
330
331/* Pentium IV performance counter MSRs */
332#define MSR_P4_BPU_PERFCTR0 0x00000300
333#define MSR_P4_BPU_PERFCTR1 0x00000301
334#define MSR_P4_BPU_PERFCTR2 0x00000302
335#define MSR_P4_BPU_PERFCTR3 0x00000303
336#define MSR_P4_MS_PERFCTR0 0x00000304
337#define MSR_P4_MS_PERFCTR1 0x00000305
338#define MSR_P4_MS_PERFCTR2 0x00000306
339#define MSR_P4_MS_PERFCTR3 0x00000307
340#define MSR_P4_FLAME_PERFCTR0 0x00000308
341#define MSR_P4_FLAME_PERFCTR1 0x00000309
342#define MSR_P4_FLAME_PERFCTR2 0x0000030a
343#define MSR_P4_FLAME_PERFCTR3 0x0000030b
344#define MSR_P4_IQ_PERFCTR0 0x0000030c
345#define MSR_P4_IQ_PERFCTR1 0x0000030d
346#define MSR_P4_IQ_PERFCTR2 0x0000030e
347#define MSR_P4_IQ_PERFCTR3 0x0000030f
348#define MSR_P4_IQ_PERFCTR4 0x00000310
349#define MSR_P4_IQ_PERFCTR5 0x00000311
350#define MSR_P4_BPU_CCCR0 0x00000360
351#define MSR_P4_BPU_CCCR1 0x00000361
352#define MSR_P4_BPU_CCCR2 0x00000362
353#define MSR_P4_BPU_CCCR3 0x00000363
354#define MSR_P4_MS_CCCR0 0x00000364
355#define MSR_P4_MS_CCCR1 0x00000365
356#define MSR_P4_MS_CCCR2 0x00000366
357#define MSR_P4_MS_CCCR3 0x00000367
358#define MSR_P4_FLAME_CCCR0 0x00000368
359#define MSR_P4_FLAME_CCCR1 0x00000369
360#define MSR_P4_FLAME_CCCR2 0x0000036a
361#define MSR_P4_FLAME_CCCR3 0x0000036b
362#define MSR_P4_IQ_CCCR0 0x0000036c
363#define MSR_P4_IQ_CCCR1 0x0000036d
364#define MSR_P4_IQ_CCCR2 0x0000036e
365#define MSR_P4_IQ_CCCR3 0x0000036f
366#define MSR_P4_IQ_CCCR4 0x00000370
367#define MSR_P4_IQ_CCCR5 0x00000371
368#define MSR_P4_ALF_ESCR0 0x000003ca
369#define MSR_P4_ALF_ESCR1 0x000003cb
370#define MSR_P4_BPU_ESCR0 0x000003b2
371#define MSR_P4_BPU_ESCR1 0x000003b3
372#define MSR_P4_BSU_ESCR0 0x000003a0
373#define MSR_P4_BSU_ESCR1 0x000003a1
374#define MSR_P4_CRU_ESCR0 0x000003b8
375#define MSR_P4_CRU_ESCR1 0x000003b9
376#define MSR_P4_CRU_ESCR2 0x000003cc
377#define MSR_P4_CRU_ESCR3 0x000003cd
378#define MSR_P4_CRU_ESCR4 0x000003e0
379#define MSR_P4_CRU_ESCR5 0x000003e1
380#define MSR_P4_DAC_ESCR0 0x000003a8
381#define MSR_P4_DAC_ESCR1 0x000003a9
382#define MSR_P4_FIRM_ESCR0 0x000003a4
383#define MSR_P4_FIRM_ESCR1 0x000003a5
384#define MSR_P4_FLAME_ESCR0 0x000003a6
385#define MSR_P4_FLAME_ESCR1 0x000003a7
386#define MSR_P4_FSB_ESCR0 0x000003a2
387#define MSR_P4_FSB_ESCR1 0x000003a3
388#define MSR_P4_IQ_ESCR0 0x000003ba
389#define MSR_P4_IQ_ESCR1 0x000003bb
390#define MSR_P4_IS_ESCR0 0x000003b4
391#define MSR_P4_IS_ESCR1 0x000003b5
392#define MSR_P4_ITLB_ESCR0 0x000003b6
393#define MSR_P4_ITLB_ESCR1 0x000003b7
394#define MSR_P4_IX_ESCR0 0x000003c8
395#define MSR_P4_IX_ESCR1 0x000003c9
396#define MSR_P4_MOB_ESCR0 0x000003aa
397#define MSR_P4_MOB_ESCR1 0x000003ab
398#define MSR_P4_MS_ESCR0 0x000003c0
399#define MSR_P4_MS_ESCR1 0x000003c1
400#define MSR_P4_PMH_ESCR0 0x000003ac
401#define MSR_P4_PMH_ESCR1 0x000003ad
402#define MSR_P4_RAT_ESCR0 0x000003bc
403#define MSR_P4_RAT_ESCR1 0x000003bd
404#define MSR_P4_SAAT_ESCR0 0x000003ae
405#define MSR_P4_SAAT_ESCR1 0x000003af
406#define MSR_P4_SSU_ESCR0 0x000003be
407#define MSR_P4_SSU_ESCR1 0x000003bf /* guess: not in manual */
408
409#define MSR_P4_TBPU_ESCR0 0x000003c2
410#define MSR_P4_TBPU_ESCR1 0x000003c3
411#define MSR_P4_TC_ESCR0 0x000003c4
412#define MSR_P4_TC_ESCR1 0x000003c5
413#define MSR_P4_U2L_ESCR0 0x000003b0
414#define MSR_P4_U2L_ESCR1 0x000003b1
415
416#define MSR_P4_PEBS_MATRIX_VERT 0x000003f2
417
418/* Intel Core-based CPU performance counters */
419#define MSR_CORE_PERF_FIXED_CTR0 0x00000309
420#define MSR_CORE_PERF_FIXED_CTR1 0x0000030a
421#define MSR_CORE_PERF_FIXED_CTR2 0x0000030b
422#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x0000038d
423#define MSR_CORE_PERF_GLOBAL_STATUS 0x0000038e
424#define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f
425#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390
426
427/* Geode defined MSRs */
428#define MSR_GEODE_BUSCONT_CONF0 0x00001900
429
430/* Intel VT MSRs */
431#define MSR_IA32_VMX_BASIC 0x00000480
432#define MSR_IA32_VMX_PINBASED_CTLS 0x00000481
433#define MSR_IA32_VMX_PROCBASED_CTLS 0x00000482
434#define MSR_IA32_VMX_EXIT_CTLS 0x00000483
435#define MSR_IA32_VMX_ENTRY_CTLS 0x00000484
436#define MSR_IA32_VMX_MISC 0x00000485
437#define MSR_IA32_VMX_CR0_FIXED0 0x00000486
438#define MSR_IA32_VMX_CR0_FIXED1 0x00000487
439#define MSR_IA32_VMX_CR4_FIXED0 0x00000488
440#define MSR_IA32_VMX_CR4_FIXED1 0x00000489
441#define MSR_IA32_VMX_VMCS_ENUM 0x0000048a
442#define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b
443#define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c
444#define MSR_IA32_VMX_TRUE_PINBASED_CTLS 0x0000048d
445#define MSR_IA32_VMX_TRUE_PROCBASED_CTLS 0x0000048e
446#define MSR_IA32_VMX_TRUE_EXIT_CTLS 0x0000048f
447#define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x00000490
448
449/* VMX_BASIC bits and bitmasks */
450#define VMX_BASIC_VMCS_SIZE_SHIFT 32
451#define VMX_BASIC_64 0x0001000000000000LLU
452#define VMX_BASIC_MEM_TYPE_SHIFT 50
453#define VMX_BASIC_MEM_TYPE_MASK 0x003c000000000000LLU
454#define VMX_BASIC_MEM_TYPE_WB 6LLU
455#define VMX_BASIC_INOUT 0x0040000000000000LLU
456
457/* AMD-V MSRs */
458
459#define MSR_VM_CR 0xc0010114
460#define MSR_VM_IGNNE 0xc0010115
461#define MSR_VM_HSAVE_PA 0xc0010117
462
463#endif /* _ASM_X86_MSR_INDEX_H */
diff --git a/arch/x86/include/asm/param.h b/arch/x86/include/asm/param.h
new file mode 100644
index 00000000000..965d4542797
--- /dev/null
+++ b/arch/x86/include/asm/param.h
@@ -0,0 +1 @@
#include <asm-generic/param.h>
diff --git a/arch/x86/include/asm/poll.h b/arch/x86/include/asm/poll.h
new file mode 100644
index 00000000000..c98509d3149
--- /dev/null
+++ b/arch/x86/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/x86/include/asm/posix_types_32.h b/arch/x86/include/asm/posix_types_32.h
new file mode 100644
index 00000000000..f7d9adf82e5
--- /dev/null
+++ b/arch/x86/include/asm/posix_types_32.h
@@ -0,0 +1,85 @@
1#ifndef _ASM_X86_POSIX_TYPES_32_H
2#define _ASM_X86_POSIX_TYPES_32_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48#define __FD_SET(fd,fdsetp) \
49 asm volatile("btsl %1,%0": \
50 "+m" (*(__kernel_fd_set *)(fdsetp)) \
51 : "r" ((int)(fd)))
52
53#undef __FD_CLR
54#define __FD_CLR(fd,fdsetp) \
55 asm volatile("btrl %1,%0": \
56 "+m" (*(__kernel_fd_set *)(fdsetp)) \
57 : "r" ((int) (fd)))
58
59#undef __FD_ISSET
60#define __FD_ISSET(fd,fdsetp) \
61 (__extension__ \
62 ({ \
63 unsigned char __result; \
64 asm volatile("btl %1,%2 ; setb %0" \
65 : "=q" (__result) \
66 : "r" ((int)(fd)), \
67 "m" (*(__kernel_fd_set *)(fdsetp))); \
68 __result; \
69}))
70
71#undef __FD_ZERO
72#define __FD_ZERO(fdsetp) \
73do { \
74 int __d0, __d1; \
75 asm volatile("cld ; rep ; stosl" \
76 : "=m" (*(__kernel_fd_set *)(fdsetp)), \
77 "=&c" (__d0), "=&D" (__d1) \
78 : "a" (0), "1" (__FDSET_LONGS), \
79 "2" ((__kernel_fd_set *)(fdsetp)) \
80 : "memory"); \
81} while (0)
82
83#endif /* defined(__KERNEL__) */
84
85#endif /* _ASM_X86_POSIX_TYPES_32_H */
diff --git a/arch/x86/include/asm/posix_types_64.h b/arch/x86/include/asm/posix_types_64.h
new file mode 100644
index 00000000000..eb8d2d92b63
--- /dev/null
+++ b/arch/x86/include/asm/posix_types_64.h
@@ -0,0 +1,119 @@
1#ifndef _ASM_X86_POSIX_TYPES_64_H
2#define _ASM_X86_POSIX_TYPES_64_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned int __kernel_mode_t;
12typedef unsigned long __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef int __kernel_ipc_pid_t;
16typedef unsigned int __kernel_uid_t;
17typedef unsigned int __kernel_gid_t;
18typedef unsigned long __kernel_size_t;
19typedef long __kernel_ssize_t;
20typedef long __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30
31#ifdef __GNUC__
32typedef long long __kernel_loff_t;
33#endif
34
35typedef struct {
36 int val[2];
37} __kernel_fsid_t;
38
39typedef unsigned short __kernel_old_uid_t;
40typedef unsigned short __kernel_old_gid_t;
41typedef __kernel_uid_t __kernel_uid32_t;
42typedef __kernel_gid_t __kernel_gid32_t;
43
44typedef unsigned long __kernel_old_dev_t;
45
46#ifdef __KERNEL__
47
48#undef __FD_SET
49static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
50{
51 unsigned long _tmp = fd / __NFDBITS;
52 unsigned long _rem = fd % __NFDBITS;
53 fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
54}
55
56#undef __FD_CLR
57static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
58{
59 unsigned long _tmp = fd / __NFDBITS;
60 unsigned long _rem = fd % __NFDBITS;
61 fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
62}
63
64#undef __FD_ISSET
65static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
66{
67 unsigned long _tmp = fd / __NFDBITS;
68 unsigned long _rem = fd % __NFDBITS;
69 return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
70}
71
72/*
73 * This will unroll the loop for the normal constant cases (8 or 32 longs,
74 * for 256 and 1024-bit fd_sets respectively)
75 */
76#undef __FD_ZERO
77static inline void __FD_ZERO(__kernel_fd_set *p)
78{
79 unsigned long *tmp = p->fds_bits;
80 int i;
81
82 if (__builtin_constant_p(__FDSET_LONGS)) {
83 switch (__FDSET_LONGS) {
84 case 32:
85 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
86 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
87 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
88 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
89 tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
90 tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
91 tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
92 tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
93 return;
94 case 16:
95 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
96 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
97 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
98 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
99 return;
100 case 8:
101 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
102 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
103 return;
104 case 4:
105 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
106 return;
107 }
108 }
109 i = __FDSET_LONGS;
110 while (i) {
111 i--;
112 *tmp = 0;
113 tmp++;
114 }
115}
116
117#endif /* defined(__KERNEL__) */
118
119#endif /* _ASM_X86_POSIX_TYPES_64_H */
diff --git a/arch/x86/include/asm/prctl.h b/arch/x86/include/asm/prctl.h
new file mode 100644
index 00000000000..3ac5032fae0
--- /dev/null
+++ b/arch/x86/include/asm/prctl.h
@@ -0,0 +1,9 @@
1#ifndef _ASM_X86_PRCTL_H
2#define _ASM_X86_PRCTL_H
3
4#define ARCH_SET_GS 0x1001
5#define ARCH_SET_FS 0x1002
6#define ARCH_GET_FS 0x1003
7#define ARCH_GET_GS 0x1004
8
9#endif /* _ASM_X86_PRCTL_H */
diff --git a/arch/x86/include/asm/ptrace-abi.h b/arch/x86/include/asm/ptrace-abi.h
new file mode 100644
index 00000000000..7b0a55a8885
--- /dev/null
+++ b/arch/x86/include/asm/ptrace-abi.h
@@ -0,0 +1,87 @@
1#ifndef _ASM_X86_PTRACE_ABI_H
2#define _ASM_X86_PTRACE_ABI_H
3
4#ifdef __i386__
5
6#define EBX 0
7#define ECX 1
8#define EDX 2
9#define ESI 3
10#define EDI 4
11#define EBP 5
12#define EAX 6
13#define DS 7
14#define ES 8
15#define FS 9
16#define GS 10
17#define ORIG_EAX 11
18#define EIP 12
19#define CS 13
20#define EFL 14
21#define UESP 15
22#define SS 16
23#define FRAME_SIZE 17
24
25#else /* __i386__ */
26
27#if defined(__ASSEMBLY__) || defined(__FRAME_OFFSETS)
28#define R15 0
29#define R14 8
30#define R13 16
31#define R12 24
32#define RBP 32
33#define RBX 40
34/* arguments: interrupts/non tracing syscalls only save up to here*/
35#define R11 48
36#define R10 56
37#define R9 64
38#define R8 72
39#define RAX 80
40#define RCX 88
41#define RDX 96
42#define RSI 104
43#define RDI 112
44#define ORIG_RAX 120 /* = ERROR */
45/* end of arguments */
46/* cpu exception frame or undefined in case of fast syscall. */
47#define RIP 128
48#define CS 136
49#define EFLAGS 144
50#define RSP 152
51#define SS 160
52#define ARGOFFSET R11
53#endif /* __ASSEMBLY__ */
54
55/* top of stack page */
56#define FRAME_SIZE 168
57
58#endif /* !__i386__ */
59
60/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
61#define PTRACE_GETREGS 12
62#define PTRACE_SETREGS 13
63#define PTRACE_GETFPREGS 14
64#define PTRACE_SETFPREGS 15
65#define PTRACE_GETFPXREGS 18
66#define PTRACE_SETFPXREGS 19
67
68#define PTRACE_OLDSETOPTIONS 21
69
70/* only useful for access 32bit programs / kernels */
71#define PTRACE_GET_THREAD_AREA 25
72#define PTRACE_SET_THREAD_AREA 26
73
74#ifdef __x86_64__
75# define PTRACE_ARCH_PRCTL 30
76#endif
77
78#define PTRACE_SYSEMU 31
79#define PTRACE_SYSEMU_SINGLESTEP 32
80
81#define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */
82
83#ifndef __ASSEMBLY__
84#include <linux/types.h>
85#endif
86
87#endif /* _ASM_X86_PTRACE_ABI_H */
diff --git a/arch/x86/include/asm/resource.h b/arch/x86/include/asm/resource.h
new file mode 100644
index 00000000000..04bc4db8921
--- /dev/null
+++ b/arch/x86/include/asm/resource.h
@@ -0,0 +1 @@
#include <asm-generic/resource.h>
diff --git a/arch/x86/include/asm/sembuf.h b/arch/x86/include/asm/sembuf.h
new file mode 100644
index 00000000000..ee50c801f7b
--- /dev/null
+++ b/arch/x86/include/asm/sembuf.h
@@ -0,0 +1,24 @@
1#ifndef _ASM_X86_SEMBUF_H
2#define _ASM_X86_SEMBUF_H
3
4/*
5 * The semid64_ds structure for x86 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13struct semid64_ds {
14 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
15 __kernel_time_t sem_otime; /* last semop time */
16 unsigned long __unused1;
17 __kernel_time_t sem_ctime; /* last change time */
18 unsigned long __unused2;
19 unsigned long sem_nsems; /* no. of semaphores in array */
20 unsigned long __unused3;
21 unsigned long __unused4;
22};
23
24#endif /* _ASM_X86_SEMBUF_H */
diff --git a/arch/x86/include/asm/shmbuf.h b/arch/x86/include/asm/shmbuf.h
new file mode 100644
index 00000000000..83c05fc2de3
--- /dev/null
+++ b/arch/x86/include/asm/shmbuf.h
@@ -0,0 +1 @@
#include <asm-generic/shmbuf.h>
diff --git a/arch/x86/include/asm/sigcontext32.h b/arch/x86/include/asm/sigcontext32.h
new file mode 100644
index 00000000000..ad1478c4ae1
--- /dev/null
+++ b/arch/x86/include/asm/sigcontext32.h
@@ -0,0 +1,77 @@
1#ifndef _ASM_X86_SIGCONTEXT32_H
2#define _ASM_X86_SIGCONTEXT32_H
3
4#include <linux/types.h>
5
6/* signal context for 32bit programs. */
7
8#define X86_FXSR_MAGIC 0x0000
9
10struct _fpreg {
11 unsigned short significand[4];
12 unsigned short exponent;
13};
14
15struct _fpxreg {
16 unsigned short significand[4];
17 unsigned short exponent;
18 unsigned short padding[3];
19};
20
21struct _xmmreg {
22 __u32 element[4];
23};
24
25/* FSAVE frame with extensions */
26struct _fpstate_ia32 {
27 /* Regular FPU environment */
28 __u32 cw;
29 __u32 sw;
30 __u32 tag; /* not compatible to 64bit twd */
31 __u32 ipoff;
32 __u32 cssel;
33 __u32 dataoff;
34 __u32 datasel;
35 struct _fpreg _st[8];
36 unsigned short status;
37 unsigned short magic; /* 0xffff = regular FPU data only */
38
39 /* FXSR FPU environment */
40 __u32 _fxsr_env[6];
41 __u32 mxcsr;
42 __u32 reserved;
43 struct _fpxreg _fxsr_st[8];
44 struct _xmmreg _xmm[8]; /* It's actually 16 */
45 __u32 padding[44];
46 union {
47 __u32 padding2[12];
48 struct _fpx_sw_bytes sw_reserved;
49 };
50};
51
52struct sigcontext_ia32 {
53 unsigned short gs, __gsh;
54 unsigned short fs, __fsh;
55 unsigned short es, __esh;
56 unsigned short ds, __dsh;
57 unsigned int di;
58 unsigned int si;
59 unsigned int bp;
60 unsigned int sp;
61 unsigned int bx;
62 unsigned int dx;
63 unsigned int cx;
64 unsigned int ax;
65 unsigned int trapno;
66 unsigned int err;
67 unsigned int ip;
68 unsigned short cs, __csh;
69 unsigned int flags;
70 unsigned int sp_at_signal;
71 unsigned short ss, __ssh;
72 unsigned int fpstate; /* really (struct _fpstate_ia32 *) */
73 unsigned int oldmask;
74 unsigned int cr2;
75};
76
77#endif /* _ASM_X86_SIGCONTEXT32_H */
diff --git a/arch/x86/include/asm/siginfo.h b/arch/x86/include/asm/siginfo.h
new file mode 100644
index 00000000000..fc1aa553564
--- /dev/null
+++ b/arch/x86/include/asm/siginfo.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_X86_SIGINFO_H
2#define _ASM_X86_SIGINFO_H
3
4#ifdef __x86_64__
5# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
6#endif
7
8#include <asm-generic/siginfo.h>
9
10#endif /* _ASM_X86_SIGINFO_H */
diff --git a/arch/x86/include/asm/socket.h b/arch/x86/include/asm/socket.h
new file mode 100644
index 00000000000..6b71384b9d8
--- /dev/null
+++ b/arch/x86/include/asm/socket.h
@@ -0,0 +1 @@
#include <asm-generic/socket.h>
diff --git a/arch/x86/include/asm/sockios.h b/arch/x86/include/asm/sockios.h
new file mode 100644
index 00000000000..def6d4746ee
--- /dev/null
+++ b/arch/x86/include/asm/sockios.h
@@ -0,0 +1 @@
#include <asm-generic/sockios.h>
diff --git a/arch/x86/include/asm/stat.h b/arch/x86/include/asm/stat.h
new file mode 100644
index 00000000000..e0b1d9bbcbc
--- /dev/null
+++ b/arch/x86/include/asm/stat.h
@@ -0,0 +1,114 @@
1#ifndef _ASM_X86_STAT_H
2#define _ASM_X86_STAT_H
3
4#define STAT_HAVE_NSEC 1
5
6#ifdef __i386__
7struct stat {
8 unsigned long st_dev;
9 unsigned long st_ino;
10 unsigned short st_mode;
11 unsigned short st_nlink;
12 unsigned short st_uid;
13 unsigned short st_gid;
14 unsigned long st_rdev;
15 unsigned long st_size;
16 unsigned long st_blksize;
17 unsigned long st_blocks;
18 unsigned long st_atime;
19 unsigned long st_atime_nsec;
20 unsigned long st_mtime;
21 unsigned long st_mtime_nsec;
22 unsigned long st_ctime;
23 unsigned long st_ctime_nsec;
24 unsigned long __unused4;
25 unsigned long __unused5;
26};
27
28#define STAT64_HAS_BROKEN_ST_INO 1
29
30/* This matches struct stat64 in glibc2.1, hence the absolutely
31 * insane amounts of padding around dev_t's.
32 */
33struct stat64 {
34 unsigned long long st_dev;
35 unsigned char __pad0[4];
36
37 unsigned long __st_ino;
38
39 unsigned int st_mode;
40 unsigned int st_nlink;
41
42 unsigned long st_uid;
43 unsigned long st_gid;
44
45 unsigned long long st_rdev;
46 unsigned char __pad3[4];
47
48 long long st_size;
49 unsigned long st_blksize;
50
51 /* Number 512-byte blocks allocated. */
52 unsigned long long st_blocks;
53
54 unsigned long st_atime;
55 unsigned long st_atime_nsec;
56
57 unsigned long st_mtime;
58 unsigned int st_mtime_nsec;
59
60 unsigned long st_ctime;
61 unsigned long st_ctime_nsec;
62
63 unsigned long long st_ino;
64};
65
66#else /* __i386__ */
67
68struct stat {
69 unsigned long st_dev;
70 unsigned long st_ino;
71 unsigned long st_nlink;
72
73 unsigned int st_mode;
74 unsigned int st_uid;
75 unsigned int st_gid;
76 unsigned int __pad0;
77 unsigned long st_rdev;
78 long st_size;
79 long st_blksize;
80 long st_blocks; /* Number 512-byte blocks allocated. */
81
82 unsigned long st_atime;
83 unsigned long st_atime_nsec;
84 unsigned long st_mtime;
85 unsigned long st_mtime_nsec;
86 unsigned long st_ctime;
87 unsigned long st_ctime_nsec;
88 long __unused[3];
89};
90#endif
91
92/* for 32bit emulation and 32 bit kernels */
93struct __old_kernel_stat {
94 unsigned short st_dev;
95 unsigned short st_ino;
96 unsigned short st_mode;
97 unsigned short st_nlink;
98 unsigned short st_uid;
99 unsigned short st_gid;
100 unsigned short st_rdev;
101#ifdef __i386__
102 unsigned long st_size;
103 unsigned long st_atime;
104 unsigned long st_mtime;
105 unsigned long st_ctime;
106#else
107 unsigned int st_size;
108 unsigned int st_atime;
109 unsigned int st_mtime;
110 unsigned int st_ctime;
111#endif
112};
113
114#endif /* _ASM_X86_STAT_H */
diff --git a/arch/x86/include/asm/statfs.h b/arch/x86/include/asm/statfs.h
new file mode 100644
index 00000000000..2d0adbf99a8
--- /dev/null
+++ b/arch/x86/include/asm/statfs.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_X86_STATFS_H
2#define _ASM_X86_STATFS_H
3
4/*
5 * We need compat_statfs64 to be packed, because the i386 ABI won't
6 * add padding at the end to bring it to a multiple of 8 bytes, but
7 * the x86_64 ABI will.
8 */
9#define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4)))
10
11#include <asm-generic/statfs.h>
12#endif /* _ASM_X86_STATFS_H */
diff --git a/arch/x86/include/asm/swab.h b/arch/x86/include/asm/swab.h
new file mode 100644
index 00000000000..557cd9f0066
--- /dev/null
+++ b/arch/x86/include/asm/swab.h
@@ -0,0 +1,61 @@
1#ifndef _ASM_X86_SWAB_H
2#define _ASM_X86_SWAB_H
3
4#include <linux/types.h>
5#include <linux/compiler.h>
6
7static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
8{
9#ifdef __i386__
10# ifdef CONFIG_X86_BSWAP
11 asm("bswap %0" : "=r" (val) : "0" (val));
12# else
13 asm("xchgb %b0,%h0\n\t" /* swap lower bytes */
14 "rorl $16,%0\n\t" /* swap words */
15 "xchgb %b0,%h0" /* swap higher bytes */
16 : "=q" (val)
17 : "0" (val));
18# endif
19
20#else /* __i386__ */
21 asm("bswapl %0"
22 : "=r" (val)
23 : "0" (val));
24#endif
25 return val;
26}
27#define __arch_swab32 __arch_swab32
28
29static inline __attribute_const__ __u64 __arch_swab64(__u64 val)
30{
31#ifdef __i386__
32 union {
33 struct {
34 __u32 a;
35 __u32 b;
36 } s;
37 __u64 u;
38 } v;
39 v.u = val;
40# ifdef CONFIG_X86_BSWAP
41 asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
42 : "=r" (v.s.a), "=r" (v.s.b)
43 : "0" (v.s.a), "1" (v.s.b));
44# else
45 v.s.a = __arch_swab32(v.s.a);
46 v.s.b = __arch_swab32(v.s.b);
47 asm("xchgl %0,%1"
48 : "=r" (v.s.a), "=r" (v.s.b)
49 : "0" (v.s.a), "1" (v.s.b));
50# endif
51 return v.u;
52#else /* __i386__ */
53 asm("bswapq %0"
54 : "=r" (val)
55 : "0" (val));
56 return val;
57#endif
58}
59#define __arch_swab64 __arch_swab64
60
61#endif /* _ASM_X86_SWAB_H */
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
new file mode 100644
index 00000000000..2d2f01ce6dc
--- /dev/null
+++ b/arch/x86/include/asm/system.h
@@ -0,0 +1,523 @@
1#ifndef _ASM_X86_SYSTEM_H
2#define _ASM_X86_SYSTEM_H
3
4#include <asm/asm.h>
5#include <asm/segment.h>
6#include <asm/cpufeature.h>
7#include <asm/cmpxchg.h>
8#include <asm/nops.h>
9
10#include <linux/kernel.h>
11#include <linux/irqflags.h>
12
13/* entries in ARCH_DLINFO: */
14#if defined(CONFIG_IA32_EMULATION) || !defined(CONFIG_X86_64)
15# define AT_VECTOR_SIZE_ARCH 2
16#else /* else it's non-compat x86-64 */
17# define AT_VECTOR_SIZE_ARCH 1
18#endif
19
20struct task_struct; /* one of the stranger aspects of C forward declarations */
21struct task_struct *__switch_to(struct task_struct *prev,
22 struct task_struct *next);
23struct tss_struct;
24void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
25 struct tss_struct *tss);
26extern void show_regs_common(void);
27
28#ifdef CONFIG_X86_32
29
30#ifdef CONFIG_CC_STACKPROTECTOR
31#define __switch_canary \
32 "movl %P[task_canary](%[next]), %%ebx\n\t" \
33 "movl %%ebx, "__percpu_arg([stack_canary])"\n\t"
34#define __switch_canary_oparam \
35 , [stack_canary] "=m" (stack_canary.canary)
36#define __switch_canary_iparam \
37 , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
38#else /* CC_STACKPROTECTOR */
39#define __switch_canary
40#define __switch_canary_oparam
41#define __switch_canary_iparam
42#endif /* CC_STACKPROTECTOR */
43
44/*
45 * Saving eflags is important. It switches not only IOPL between tasks,
46 * it also protects other tasks from NT leaking through sysenter etc.
47 */
48#define switch_to(prev, next, last) \
49do { \
50 /* \
51 * Context-switching clobbers all registers, so we clobber \
52 * them explicitly, via unused output variables. \
53 * (EAX and EBP is not listed because EBP is saved/restored \
54 * explicitly for wchan access and EAX is the return value of \
55 * __switch_to()) \
56 */ \
57 unsigned long ebx, ecx, edx, esi, edi; \
58 \
59 asm volatile("pushfl\n\t" /* save flags */ \
60 "pushl %%ebp\n\t" /* save EBP */ \
61 "movl %%esp,%[prev_sp]\n\t" /* save ESP */ \
62 "movl %[next_sp],%%esp\n\t" /* restore ESP */ \
63 "movl $1f,%[prev_ip]\n\t" /* save EIP */ \
64 "pushl %[next_ip]\n\t" /* restore EIP */ \
65 __switch_canary \
66 "jmp __switch_to\n" /* regparm call */ \
67 "1:\t" \
68 "popl %%ebp\n\t" /* restore EBP */ \
69 "popfl\n" /* restore flags */ \
70 \
71 /* output parameters */ \
72 : [prev_sp] "=m" (prev->thread.sp), \
73 [prev_ip] "=m" (prev->thread.ip), \
74 "=a" (last), \
75 \
76 /* clobbered output registers: */ \
77 "=b" (ebx), "=c" (ecx), "=d" (edx), \
78 "=S" (esi), "=D" (edi) \
79 \
80 __switch_canary_oparam \
81 \
82 /* input parameters: */ \
83 : [next_sp] "m" (next->thread.sp), \
84 [next_ip] "m" (next->thread.ip), \
85 \
86 /* regparm parameters for __switch_to(): */ \
87 [prev] "a" (prev), \
88 [next] "d" (next) \
89 \
90 __switch_canary_iparam \
91 \
92 : /* reloaded segment registers */ \
93 "memory"); \
94} while (0)
95
96/*
97 * disable hlt during certain critical i/o operations
98 */
99#define HAVE_DISABLE_HLT
100#else
101
102/* frame pointer must be last for get_wchan */
103#define SAVE_CONTEXT "pushf ; pushq %%rbp ; movq %%rsi,%%rbp\n\t"
104#define RESTORE_CONTEXT "movq %%rbp,%%rsi ; popq %%rbp ; popf\t"
105
106#define __EXTRA_CLOBBER \
107 , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \
108 "r12", "r13", "r14", "r15"
109
110#ifdef CONFIG_CC_STACKPROTECTOR
111#define __switch_canary \
112 "movq %P[task_canary](%%rsi),%%r8\n\t" \
113 "movq %%r8,"__percpu_arg([gs_canary])"\n\t"
114#define __switch_canary_oparam \
115 , [gs_canary] "=m" (irq_stack_union.stack_canary)
116#define __switch_canary_iparam \
117 , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
118#else /* CC_STACKPROTECTOR */
119#define __switch_canary
120#define __switch_canary_oparam
121#define __switch_canary_iparam
122#endif /* CC_STACKPROTECTOR */
123
124/* Save restore flags to clear handle leaking NT */
125#define switch_to(prev, next, last) \
126 asm volatile(SAVE_CONTEXT \
127 "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \
128 "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \
129 "call __switch_to\n\t" \
130 "movq "__percpu_arg([current_task])",%%rsi\n\t" \
131 __switch_canary \
132 "movq %P[thread_info](%%rsi),%%r8\n\t" \
133 "movq %%rax,%%rdi\n\t" \
134 "testl %[_tif_fork],%P[ti_flags](%%r8)\n\t" \
135 "jnz ret_from_fork\n\t" \
136 RESTORE_CONTEXT \
137 : "=a" (last) \
138 __switch_canary_oparam \
139 : [next] "S" (next), [prev] "D" (prev), \
140 [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \
141 [ti_flags] "i" (offsetof(struct thread_info, flags)), \
142 [_tif_fork] "i" (_TIF_FORK), \
143 [thread_info] "i" (offsetof(struct task_struct, stack)), \
144 [current_task] "m" (current_task) \
145 __switch_canary_iparam \
146 : "memory", "cc" __EXTRA_CLOBBER)
147#endif
148
149#ifdef __KERNEL__
150
151extern void native_load_gs_index(unsigned);
152
153/*
154 * Load a segment. Fall back on loading the zero
155 * segment if something goes wrong..
156 */
157#define loadsegment(seg, value) \
158do { \
159 unsigned short __val = (value); \
160 \
161 asm volatile(" \n" \
162 "1: movl %k0,%%" #seg " \n" \
163 \
164 ".section .fixup,\"ax\" \n" \
165 "2: xorl %k0,%k0 \n" \
166 " jmp 1b \n" \
167 ".previous \n" \
168 \
169 _ASM_EXTABLE(1b, 2b) \
170 \
171 : "+r" (__val) : : "memory"); \
172} while (0)
173
174/*
175 * Save a segment register away
176 */
177#define savesegment(seg, value) \
178 asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
179
180/*
181 * x86_32 user gs accessors.
182 */
183#ifdef CONFIG_X86_32
184#ifdef CONFIG_X86_32_LAZY_GS
185#define get_user_gs(regs) (u16)({unsigned long v; savesegment(gs, v); v;})
186#define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
187#define task_user_gs(tsk) ((tsk)->thread.gs)
188#define lazy_save_gs(v) savesegment(gs, (v))
189#define lazy_load_gs(v) loadsegment(gs, (v))
190#else /* X86_32_LAZY_GS */
191#define get_user_gs(regs) (u16)((regs)->gs)
192#define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
193#define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
194#define lazy_save_gs(v) do { } while (0)
195#define lazy_load_gs(v) do { } while (0)
196#endif /* X86_32_LAZY_GS */
197#endif /* X86_32 */
198
199static inline unsigned long get_limit(unsigned long segment)
200{
201 unsigned long __limit;
202 asm("lsll %1,%0" : "=r" (__limit) : "r" (segment));
203 return __limit + 1;
204}
205
206static inline void native_clts(void)
207{
208 asm volatile("clts");
209}
210
211/*
212 * Volatile isn't enough to prevent the compiler from reordering the
213 * read/write functions for the control registers and messing everything up.
214 * A memory clobber would solve the problem, but would prevent reordering of
215 * all loads stores around it, which can hurt performance. Solution is to
216 * use a variable and mimic reads and writes to it to enforce serialization
217 */
218static unsigned long __force_order;
219
220static inline unsigned long native_read_cr0(void)
221{
222 unsigned long val;
223 asm volatile("mov %%cr0,%0\n\t" : "=r" (val), "=m" (__force_order));
224 return val;
225}
226
227static inline void native_write_cr0(unsigned long val)
228{
229 asm volatile("mov %0,%%cr0": : "r" (val), "m" (__force_order));
230}
231
232static inline unsigned long native_read_cr2(void)
233{
234 unsigned long val;
235 asm volatile("mov %%cr2,%0\n\t" : "=r" (val), "=m" (__force_order));
236 return val;
237}
238
239static inline void native_write_cr2(unsigned long val)
240{
241 asm volatile("mov %0,%%cr2": : "r" (val), "m" (__force_order));
242}
243
244static inline unsigned long native_read_cr3(void)
245{
246 unsigned long val;
247 asm volatile("mov %%cr3,%0\n\t" : "=r" (val), "=m" (__force_order));
248 return val;
249}
250
251static inline void native_write_cr3(unsigned long val)
252{
253 asm volatile("mov %0,%%cr3": : "r" (val), "m" (__force_order));
254}
255
256static inline unsigned long native_read_cr4(void)
257{
258 unsigned long val;
259 asm volatile("mov %%cr4,%0\n\t" : "=r" (val), "=m" (__force_order));
260 return val;
261}
262
263static inline unsigned long native_read_cr4_safe(void)
264{
265 unsigned long val;
266 /* This could fault if %cr4 does not exist. In x86_64, a cr4 always
267 * exists, so it will never fail. */
268#ifdef CONFIG_X86_32
269 asm volatile("1: mov %%cr4, %0\n"
270 "2:\n"
271 _ASM_EXTABLE(1b, 2b)
272 : "=r" (val), "=m" (__force_order) : "0" (0));
273#else
274 val = native_read_cr4();
275#endif
276 return val;
277}
278
279static inline void native_write_cr4(unsigned long val)
280{
281 asm volatile("mov %0,%%cr4": : "r" (val), "m" (__force_order));
282}
283
284#ifdef CONFIG_X86_64
285static inline unsigned long native_read_cr8(void)
286{
287 unsigned long cr8;
288 asm volatile("movq %%cr8,%0" : "=r" (cr8));
289 return cr8;
290}
291
292static inline void native_write_cr8(unsigned long val)
293{
294 asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
295}
296#endif
297
298static inline void native_wbinvd(void)
299{
300 asm volatile("wbinvd": : :"memory");
301}
302
303#ifdef CONFIG_PARAVIRT
304#include <asm/paravirt.h>
305#else
306
307static inline unsigned long read_cr0(void)
308{
309 return native_read_cr0();
310}
311
312static inline void write_cr0(unsigned long x)
313{
314 native_write_cr0(x);
315}
316
317static inline unsigned long read_cr2(void)
318{
319 return native_read_cr2();
320}
321
322static inline void write_cr2(unsigned long x)
323{
324 native_write_cr2(x);
325}
326
327static inline unsigned long read_cr3(void)
328{
329 return native_read_cr3();
330}
331
332static inline void write_cr3(unsigned long x)
333{
334 native_write_cr3(x);
335}
336
337static inline unsigned long read_cr4(void)
338{
339 return native_read_cr4();
340}
341
342static inline unsigned long read_cr4_safe(void)
343{
344 return native_read_cr4_safe();
345}
346
347static inline void write_cr4(unsigned long x)
348{
349 native_write_cr4(x);
350}
351
352static inline void wbinvd(void)
353{
354 native_wbinvd();
355}
356
357#ifdef CONFIG_X86_64
358
359static inline unsigned long read_cr8(void)
360{
361 return native_read_cr8();
362}
363
364static inline void write_cr8(unsigned long x)
365{
366 native_write_cr8(x);
367}
368
369static inline void load_gs_index(unsigned selector)
370{
371 native_load_gs_index(selector);
372}
373
374#endif
375
376/* Clear the 'TS' bit */
377static inline void clts(void)
378{
379 native_clts();
380}
381
382#endif/* CONFIG_PARAVIRT */
383
384#define stts() write_cr0(read_cr0() | X86_CR0_TS)
385
386#endif /* __KERNEL__ */
387
388static inline void clflush(volatile void *__p)
389{
390 asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));
391}
392
393#define nop() asm volatile ("nop")
394
395void disable_hlt(void);
396void enable_hlt(void);
397
398void cpu_idle_wait(void);
399
400extern unsigned long arch_align_stack(unsigned long sp);
401extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
402
403void default_idle(void);
404bool set_pm_idle_to_default(void);
405
406void stop_this_cpu(void *dummy);
407
408/*
409 * Force strict CPU ordering.
410 * And yes, this is required on UP too when we're talking
411 * to devices.
412 */
413#ifdef CONFIG_X86_32
414/*
415 * Some non-Intel clones support out of order store. wmb() ceases to be a
416 * nop for these.
417 */
418#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
419#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
420#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
421#else
422#define mb() asm volatile("mfence":::"memory")
423#define rmb() asm volatile("lfence":::"memory")
424#define wmb() asm volatile("sfence" ::: "memory")
425#endif
426
427/**
428 * read_barrier_depends - Flush all pending reads that subsequents reads
429 * depend on.
430 *
431 * No data-dependent reads from memory-like regions are ever reordered
432 * over this barrier. All reads preceding this primitive are guaranteed
433 * to access memory (but not necessarily other CPUs' caches) before any
434 * reads following this primitive that depend on the data return by
435 * any of the preceding reads. This primitive is much lighter weight than
436 * rmb() on most CPUs, and is never heavier weight than is
437 * rmb().
438 *
439 * These ordering constraints are respected by both the local CPU
440 * and the compiler.
441 *
442 * Ordering is not guaranteed by anything other than these primitives,
443 * not even by data dependencies. See the documentation for
444 * memory_barrier() for examples and URLs to more information.
445 *
446 * For example, the following code would force ordering (the initial
447 * value of "a" is zero, "b" is one, and "p" is "&a"):
448 *
449 * <programlisting>
450 * CPU 0 CPU 1
451 *
452 * b = 2;
453 * memory_barrier();
454 * p = &b; q = p;
455 * read_barrier_depends();
456 * d = *q;
457 * </programlisting>
458 *
459 * because the read of "*q" depends on the read of "p" and these
460 * two reads are separated by a read_barrier_depends(). However,
461 * the following code, with the same initial values for "a" and "b":
462 *
463 * <programlisting>
464 * CPU 0 CPU 1
465 *
466 * a = 2;
467 * memory_barrier();
468 * b = 3; y = b;
469 * read_barrier_depends();
470 * x = a;
471 * </programlisting>
472 *
473 * does not enforce ordering, since there is no data dependency between
474 * the read of "a" and the read of "b". Therefore, on some CPUs, such
475 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
476 * in cases like this where there are no data dependencies.
477 **/
478
479#define read_barrier_depends() do { } while (0)
480
481#ifdef CONFIG_SMP
482#define smp_mb() mb()
483#ifdef CONFIG_X86_PPRO_FENCE
484# define smp_rmb() rmb()
485#else
486# define smp_rmb() barrier()
487#endif
488#ifdef CONFIG_X86_OOSTORE
489# define smp_wmb() wmb()
490#else
491# define smp_wmb() barrier()
492#endif
493#define smp_read_barrier_depends() read_barrier_depends()
494#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
495#else
496#define smp_mb() barrier()
497#define smp_rmb() barrier()
498#define smp_wmb() barrier()
499#define smp_read_barrier_depends() do { } while (0)
500#define set_mb(var, value) do { var = value; barrier(); } while (0)
501#endif
502
503/*
504 * Stop RDTSC speculation. This is needed when you need to use RDTSC
505 * (or get_cycles or vread that possibly accesses the TSC) in a defined
506 * code region.
507 *
508 * (Could use an alternative three way for this if there was one.)
509 */
510static __always_inline void rdtsc_barrier(void)
511{
512 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
513 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
514}
515
516/*
517 * We handle most unaligned accesses in hardware. On the other hand
518 * unaligned DMA can be quite expensive on some Nehalem processors.
519 *
520 * Based on this we disable the IP header alignment in network drivers.
521 */
522#define NET_IP_ALIGN 0
523#endif /* _ASM_X86_SYSTEM_H */
diff --git a/arch/x86/include/asm/termbits.h b/arch/x86/include/asm/termbits.h
new file mode 100644
index 00000000000..3935b106de7
--- /dev/null
+++ b/arch/x86/include/asm/termbits.h
@@ -0,0 +1 @@
#include <asm-generic/termbits.h>
diff --git a/arch/x86/include/asm/termios.h b/arch/x86/include/asm/termios.h
new file mode 100644
index 00000000000..280d78a9d96
--- /dev/null
+++ b/arch/x86/include/asm/termios.h
@@ -0,0 +1 @@
#include <asm-generic/termios.h>
diff --git a/arch/x86/include/asm/trampoline.h b/arch/x86/include/asm/trampoline.h
new file mode 100644
index 00000000000..feca3118a73
--- /dev/null
+++ b/arch/x86/include/asm/trampoline.h
@@ -0,0 +1,39 @@
1#ifndef _ASM_X86_TRAMPOLINE_H
2#define _ASM_X86_TRAMPOLINE_H
3
4#ifndef __ASSEMBLY__
5
6#include <linux/types.h>
7#include <asm/io.h>
8
9/*
10 * Trampoline 80x86 program as an array. These are in the init rodata
11 * segment, but that's okay, because we only care about the relative
12 * addresses of the symbols.
13 */
14extern const unsigned char x86_trampoline_start [];
15extern const unsigned char x86_trampoline_end [];
16extern unsigned char *x86_trampoline_base;
17
18extern unsigned long init_rsp;
19extern unsigned long initial_code;
20extern unsigned long initial_gs;
21
22extern void __init setup_trampolines(void);
23
24extern const unsigned char trampoline_data[];
25extern const unsigned char trampoline_status[];
26
27#define TRAMPOLINE_SYM(x) \
28 ((void *)(x86_trampoline_base + \
29 ((const unsigned char *)(x) - x86_trampoline_start)))
30
31/* Address of the SMP trampoline */
32static inline unsigned long trampoline_address(void)
33{
34 return virt_to_phys(TRAMPOLINE_SYM(trampoline_data));
35}
36
37#endif /* __ASSEMBLY__ */
38
39#endif /* _ASM_X86_TRAMPOLINE_H */
diff --git a/arch/x86/include/asm/types.h b/arch/x86/include/asm/types.h
new file mode 100644
index 00000000000..8e8c23fef08
--- /dev/null
+++ b/arch/x86/include/asm/types.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_X86_TYPES_H
2#define _ASM_X86_TYPES_H
3
4#include <asm-generic/types.h>
5
6#endif /* _ASM_X86_TYPES_H */
diff --git a/arch/x86/include/asm/ucontext.h b/arch/x86/include/asm/ucontext.h
new file mode 100644
index 00000000000..b7c29c8017f
--- /dev/null
+++ b/arch/x86/include/asm/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_X86_UCONTEXT_H
2#define _ASM_X86_UCONTEXT_H
3
4#define UC_FP_XSTATE 0x1 /* indicates the presence of extended state
5 * information in the memory layout pointed
6 * by the fpstate pointer in the ucontext's
7 * sigcontext struct (uc_mcontext).
8 */
9
10#include <asm-generic/ucontext.h>
11
12#endif /* _ASM_X86_UCONTEXT_H */
diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h
new file mode 100644
index 00000000000..593485b38ab
--- /dev/null
+++ b/arch/x86/include/asm/unistd_32.h
@@ -0,0 +1,399 @@
1#ifndef _ASM_X86_UNISTD_32_H
2#define _ASM_X86_UNISTD_32_H
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24#define __NR_lchown 16
25#define __NR_break 17
26#define __NR_oldstat 18
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31#define __NR_setuid 23
32#define __NR_getuid 24
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36#define __NR_oldfstat 28
37#define __NR_pause 29
38#define __NR_utime 30
39#define __NR_stty 31
40#define __NR_gtty 32
41#define __NR_access 33
42#define __NR_nice 34
43#define __NR_ftime 35
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52#define __NR_prof 44
53#define __NR_brk 45
54#define __NR_setgid 46
55#define __NR_getgid 47
56#define __NR_signal 48
57#define __NR_geteuid 49
58#define __NR_getegid 50
59#define __NR_acct 51
60#define __NR_umount2 52
61#define __NR_lock 53
62#define __NR_ioctl 54
63#define __NR_fcntl 55
64#define __NR_mpx 56
65#define __NR_setpgid 57
66#define __NR_ulimit 58
67#define __NR_oldolduname 59
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75#define __NR_sigaction 67
76#define __NR_sgetmask 68
77#define __NR_ssetmask 69
78#define __NR_setreuid 70
79#define __NR_setregid 71
80#define __NR_sigsuspend 72
81#define __NR_sigpending 73
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88#define __NR_getgroups 80
89#define __NR_setgroups 81
90#define __NR_select 82
91#define __NR_symlink 83
92#define __NR_oldlstat 84
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97#define __NR_readdir 89
98#define __NR_mmap 90
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103#define __NR_fchown 95
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106#define __NR_profil 98
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109#define __NR_ioperm 101
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117#define __NR_olduname 109
118#define __NR_iopl 110
119#define __NR_vhangup 111
120#define __NR_idle 112
121#define __NR_vm86old 113
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127#define __NR_sigreturn 119
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131#define __NR_modify_ldt 123
132#define __NR_adjtimex 124
133#define __NR_mprotect 125
134#define __NR_sigprocmask 126
135#define __NR_create_module 127
136#define __NR_init_module 128
137#define __NR_delete_module 129
138#define __NR_get_kernel_syms 130
139#define __NR_quotactl 131
140#define __NR_getpgid 132
141#define __NR_fchdir 133
142#define __NR_bdflush 134
143#define __NR_sysfs 135
144#define __NR_personality 136
145#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
146#define __NR_setfsuid 138
147#define __NR_setfsgid 139
148#define __NR__llseek 140
149#define __NR_getdents 141
150#define __NR__newselect 142
151#define __NR_flock 143
152#define __NR_msync 144
153#define __NR_readv 145
154#define __NR_writev 146
155#define __NR_getsid 147
156#define __NR_fdatasync 148
157#define __NR__sysctl 149
158#define __NR_mlock 150
159#define __NR_munlock 151
160#define __NR_mlockall 152
161#define __NR_munlockall 153
162#define __NR_sched_setparam 154
163#define __NR_sched_getparam 155
164#define __NR_sched_setscheduler 156
165#define __NR_sched_getscheduler 157
166#define __NR_sched_yield 158
167#define __NR_sched_get_priority_max 159
168#define __NR_sched_get_priority_min 160
169#define __NR_sched_rr_get_interval 161
170#define __NR_nanosleep 162
171#define __NR_mremap 163
172#define __NR_setresuid 164
173#define __NR_getresuid 165
174#define __NR_vm86 166
175#define __NR_query_module 167
176#define __NR_poll 168
177#define __NR_nfsservctl 169
178#define __NR_setresgid 170
179#define __NR_getresgid 171
180#define __NR_prctl 172
181#define __NR_rt_sigreturn 173
182#define __NR_rt_sigaction 174
183#define __NR_rt_sigprocmask 175
184#define __NR_rt_sigpending 176
185#define __NR_rt_sigtimedwait 177
186#define __NR_rt_sigqueueinfo 178
187#define __NR_rt_sigsuspend 179
188#define __NR_pread64 180
189#define __NR_pwrite64 181
190#define __NR_chown 182
191#define __NR_getcwd 183
192#define __NR_capget 184
193#define __NR_capset 185
194#define __NR_sigaltstack 186
195#define __NR_sendfile 187
196#define __NR_getpmsg 188 /* some people actually want streams */
197#define __NR_putpmsg 189 /* some people actually want streams */
198#define __NR_vfork 190
199#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
200#define __NR_mmap2 192
201#define __NR_truncate64 193
202#define __NR_ftruncate64 194
203#define __NR_stat64 195
204#define __NR_lstat64 196
205#define __NR_fstat64 197
206#define __NR_lchown32 198
207#define __NR_getuid32 199
208#define __NR_getgid32 200
209#define __NR_geteuid32 201
210#define __NR_getegid32 202
211#define __NR_setreuid32 203
212#define __NR_setregid32 204
213#define __NR_getgroups32 205
214#define __NR_setgroups32 206
215#define __NR_fchown32 207
216#define __NR_setresuid32 208
217#define __NR_getresuid32 209
218#define __NR_setresgid32 210
219#define __NR_getresgid32 211
220#define __NR_chown32 212
221#define __NR_setuid32 213
222#define __NR_setgid32 214
223#define __NR_setfsuid32 215
224#define __NR_setfsgid32 216
225#define __NR_pivot_root 217
226#define __NR_mincore 218
227#define __NR_madvise 219
228#define __NR_madvise1 219 /* delete when C lib stub is removed */
229#define __NR_getdents64 220
230#define __NR_fcntl64 221
231/* 223 is unused */
232#define __NR_gettid 224
233#define __NR_readahead 225
234#define __NR_setxattr 226
235#define __NR_lsetxattr 227
236#define __NR_fsetxattr 228
237#define __NR_getxattr 229
238#define __NR_lgetxattr 230
239#define __NR_fgetxattr 231
240#define __NR_listxattr 232
241#define __NR_llistxattr 233
242#define __NR_flistxattr 234
243#define __NR_removexattr 235
244#define __NR_lremovexattr 236
245#define __NR_fremovexattr 237
246#define __NR_tkill 238
247#define __NR_sendfile64 239
248#define __NR_futex 240
249#define __NR_sched_setaffinity 241
250#define __NR_sched_getaffinity 242
251#define __NR_set_thread_area 243
252#define __NR_get_thread_area 244
253#define __NR_io_setup 245
254#define __NR_io_destroy 246
255#define __NR_io_getevents 247
256#define __NR_io_submit 248
257#define __NR_io_cancel 249
258#define __NR_fadvise64 250
259/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
260#define __NR_exit_group 252
261#define __NR_lookup_dcookie 253
262#define __NR_epoll_create 254
263#define __NR_epoll_ctl 255
264#define __NR_epoll_wait 256
265#define __NR_remap_file_pages 257
266#define __NR_set_tid_address 258
267#define __NR_timer_create 259
268#define __NR_timer_settime (__NR_timer_create+1)
269#define __NR_timer_gettime (__NR_timer_create+2)
270#define __NR_timer_getoverrun (__NR_timer_create+3)
271#define __NR_timer_delete (__NR_timer_create+4)
272#define __NR_clock_settime (__NR_timer_create+5)
273#define __NR_clock_gettime (__NR_timer_create+6)
274#define __NR_clock_getres (__NR_timer_create+7)
275#define __NR_clock_nanosleep (__NR_timer_create+8)
276#define __NR_statfs64 268
277#define __NR_fstatfs64 269
278#define __NR_tgkill 270
279#define __NR_utimes 271
280#define __NR_fadvise64_64 272
281#define __NR_vserver 273
282#define __NR_mbind 274
283#define __NR_get_mempolicy 275
284#define __NR_set_mempolicy 276
285#define __NR_mq_open 277
286#define __NR_mq_unlink (__NR_mq_open+1)
287#define __NR_mq_timedsend (__NR_mq_open+2)
288#define __NR_mq_timedreceive (__NR_mq_open+3)
289#define __NR_mq_notify (__NR_mq_open+4)
290#define __NR_mq_getsetattr (__NR_mq_open+5)
291#define __NR_kexec_load 283
292#define __NR_waitid 284
293/* #define __NR_sys_setaltroot 285 */
294#define __NR_add_key 286
295#define __NR_request_key 287
296#define __NR_keyctl 288
297#define __NR_ioprio_set 289
298#define __NR_ioprio_get 290
299#define __NR_inotify_init 291
300#define __NR_inotify_add_watch 292
301#define __NR_inotify_rm_watch 293
302#define __NR_migrate_pages 294
303#define __NR_openat 295
304#define __NR_mkdirat 296
305#define __NR_mknodat 297
306#define __NR_fchownat 298
307#define __NR_futimesat 299
308#define __NR_fstatat64 300
309#define __NR_unlinkat 301
310#define __NR_renameat 302
311#define __NR_linkat 303
312#define __NR_symlinkat 304
313#define __NR_readlinkat 305
314#define __NR_fchmodat 306
315#define __NR_faccessat 307
316#define __NR_pselect6 308
317#define __NR_ppoll 309
318#define __NR_unshare 310
319#define __NR_set_robust_list 311
320#define __NR_get_robust_list 312
321#define __NR_splice 313
322#define __NR_sync_file_range 314
323#define __NR_tee 315
324#define __NR_vmsplice 316
325#define __NR_move_pages 317
326#define __NR_getcpu 318
327#define __NR_epoll_pwait 319
328#define __NR_utimensat 320
329#define __NR_signalfd 321
330#define __NR_timerfd_create 322
331#define __NR_eventfd 323
332#define __NR_fallocate 324
333#define __NR_timerfd_settime 325
334#define __NR_timerfd_gettime 326
335#define __NR_signalfd4 327
336#define __NR_eventfd2 328
337#define __NR_epoll_create1 329
338#define __NR_dup3 330
339#define __NR_pipe2 331
340#define __NR_inotify_init1 332
341#define __NR_preadv 333
342#define __NR_pwritev 334
343#define __NR_rt_tgsigqueueinfo 335
344#define __NR_perf_event_open 336
345#define __NR_recvmmsg 337
346#define __NR_fanotify_init 338
347#define __NR_fanotify_mark 339
348#define __NR_prlimit64 340
349#define __NR_name_to_handle_at 341
350#define __NR_open_by_handle_at 342
351#define __NR_clock_adjtime 343
352#define __NR_syncfs 344
353#define __NR_sendmmsg 345
354#define __NR_setns 346
355
356#ifdef __KERNEL__
357
358#define NR_syscalls 347
359
360#define __ARCH_WANT_IPC_PARSE_VERSION
361#define __ARCH_WANT_OLD_READDIR
362#define __ARCH_WANT_OLD_STAT
363#define __ARCH_WANT_STAT64
364#define __ARCH_WANT_SYS_ALARM
365#define __ARCH_WANT_SYS_GETHOSTNAME
366#define __ARCH_WANT_SYS_IPC
367#define __ARCH_WANT_SYS_PAUSE
368#define __ARCH_WANT_SYS_SGETMASK
369#define __ARCH_WANT_SYS_SIGNAL
370#define __ARCH_WANT_SYS_TIME
371#define __ARCH_WANT_SYS_UTIME
372#define __ARCH_WANT_SYS_WAITPID
373#define __ARCH_WANT_SYS_SOCKETCALL
374#define __ARCH_WANT_SYS_FADVISE64
375#define __ARCH_WANT_SYS_GETPGRP
376#define __ARCH_WANT_SYS_LLSEEK
377#define __ARCH_WANT_SYS_NICE
378#define __ARCH_WANT_SYS_OLD_GETRLIMIT
379#define __ARCH_WANT_SYS_OLD_UNAME
380#define __ARCH_WANT_SYS_OLD_MMAP
381#define __ARCH_WANT_SYS_OLD_SELECT
382#define __ARCH_WANT_SYS_OLDUMOUNT
383#define __ARCH_WANT_SYS_SIGPENDING
384#define __ARCH_WANT_SYS_SIGPROCMASK
385#define __ARCH_WANT_SYS_RT_SIGACTION
386#define __ARCH_WANT_SYS_RT_SIGSUSPEND
387
388/*
389 * "Conditional" syscalls
390 *
391 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
392 * but it doesn't work on all toolchains, so we just do it by hand
393 */
394#ifndef cond_syscall
395#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
396#endif
397
398#endif /* __KERNEL__ */
399#endif /* _ASM_X86_UNISTD_32_H */
diff --git a/arch/x86/include/asm/unistd_64.h b/arch/x86/include/asm/unistd_64.h
new file mode 100644
index 00000000000..20104057344
--- /dev/null
+++ b/arch/x86/include/asm/unistd_64.h
@@ -0,0 +1,729 @@
1#ifndef _ASM_X86_UNISTD_64_H
2#define _ASM_X86_UNISTD_64_H
3
4#ifndef __SYSCALL
5#define __SYSCALL(a, b)
6#endif
7
8/*
9 * This file contains the system call numbers.
10 *
11 * Note: holes are not allowed.
12 */
13
14/* at least 8 syscall per cacheline */
15#define __NR_read 0
16__SYSCALL(__NR_read, sys_read)
17#define __NR_write 1
18__SYSCALL(__NR_write, sys_write)
19#define __NR_open 2
20__SYSCALL(__NR_open, sys_open)
21#define __NR_close 3
22__SYSCALL(__NR_close, sys_close)
23#define __NR_stat 4
24__SYSCALL(__NR_stat, sys_newstat)
25#define __NR_fstat 5
26__SYSCALL(__NR_fstat, sys_newfstat)
27#define __NR_lstat 6
28__SYSCALL(__NR_lstat, sys_newlstat)
29#define __NR_poll 7
30__SYSCALL(__NR_poll, sys_poll)
31
32#define __NR_lseek 8
33__SYSCALL(__NR_lseek, sys_lseek)
34#define __NR_mmap 9
35__SYSCALL(__NR_mmap, sys_mmap)
36#define __NR_mprotect 10
37__SYSCALL(__NR_mprotect, sys_mprotect)
38#define __NR_munmap 11
39__SYSCALL(__NR_munmap, sys_munmap)
40#define __NR_brk 12
41__SYSCALL(__NR_brk, sys_brk)
42#define __NR_rt_sigaction 13
43__SYSCALL(__NR_rt_sigaction, sys_rt_sigaction)
44#define __NR_rt_sigprocmask 14
45__SYSCALL(__NR_rt_sigprocmask, sys_rt_sigprocmask)
46#define __NR_rt_sigreturn 15
47__SYSCALL(__NR_rt_sigreturn, stub_rt_sigreturn)
48
49#define __NR_ioctl 16
50__SYSCALL(__NR_ioctl, sys_ioctl)
51#define __NR_pread64 17
52__SYSCALL(__NR_pread64, sys_pread64)
53#define __NR_pwrite64 18
54__SYSCALL(__NR_pwrite64, sys_pwrite64)
55#define __NR_readv 19
56__SYSCALL(__NR_readv, sys_readv)
57#define __NR_writev 20
58__SYSCALL(__NR_writev, sys_writev)
59#define __NR_access 21
60__SYSCALL(__NR_access, sys_access)
61#define __NR_pipe 22
62__SYSCALL(__NR_pipe, sys_pipe)
63#define __NR_select 23
64__SYSCALL(__NR_select, sys_select)
65
66#define __NR_sched_yield 24
67__SYSCALL(__NR_sched_yield, sys_sched_yield)
68#define __NR_mremap 25
69__SYSCALL(__NR_mremap, sys_mremap)
70#define __NR_msync 26
71__SYSCALL(__NR_msync, sys_msync)
72#define __NR_mincore 27
73__SYSCALL(__NR_mincore, sys_mincore)
74#define __NR_madvise 28
75__SYSCALL(__NR_madvise, sys_madvise)
76#define __NR_shmget 29
77__SYSCALL(__NR_shmget, sys_shmget)
78#define __NR_shmat 30
79__SYSCALL(__NR_shmat, sys_shmat)
80#define __NR_shmctl 31
81__SYSCALL(__NR_shmctl, sys_shmctl)
82
83#define __NR_dup 32
84__SYSCALL(__NR_dup, sys_dup)
85#define __NR_dup2 33
86__SYSCALL(__NR_dup2, sys_dup2)
87#define __NR_pause 34
88__SYSCALL(__NR_pause, sys_pause)
89#define __NR_nanosleep 35
90__SYSCALL(__NR_nanosleep, sys_nanosleep)
91#define __NR_getitimer 36
92__SYSCALL(__NR_getitimer, sys_getitimer)
93#define __NR_alarm 37
94__SYSCALL(__NR_alarm, sys_alarm)
95#define __NR_setitimer 38
96__SYSCALL(__NR_setitimer, sys_setitimer)
97#define __NR_getpid 39
98__SYSCALL(__NR_getpid, sys_getpid)
99
100#define __NR_sendfile 40
101__SYSCALL(__NR_sendfile, sys_sendfile64)
102#define __NR_socket 41
103__SYSCALL(__NR_socket, sys_socket)
104#define __NR_connect 42
105__SYSCALL(__NR_connect, sys_connect)
106#define __NR_accept 43
107__SYSCALL(__NR_accept, sys_accept)
108#define __NR_sendto 44
109__SYSCALL(__NR_sendto, sys_sendto)
110#define __NR_recvfrom 45
111__SYSCALL(__NR_recvfrom, sys_recvfrom)
112#define __NR_sendmsg 46
113__SYSCALL(__NR_sendmsg, sys_sendmsg)
114#define __NR_recvmsg 47
115__SYSCALL(__NR_recvmsg, sys_recvmsg)
116
117#define __NR_shutdown 48
118__SYSCALL(__NR_shutdown, sys_shutdown)
119#define __NR_bind 49
120__SYSCALL(__NR_bind, sys_bind)
121#define __NR_listen 50
122__SYSCALL(__NR_listen, sys_listen)
123#define __NR_getsockname 51
124__SYSCALL(__NR_getsockname, sys_getsockname)
125#define __NR_getpeername 52
126__SYSCALL(__NR_getpeername, sys_getpeername)
127#define __NR_socketpair 53
128__SYSCALL(__NR_socketpair, sys_socketpair)
129#define __NR_setsockopt 54
130__SYSCALL(__NR_setsockopt, sys_setsockopt)
131#define __NR_getsockopt 55
132__SYSCALL(__NR_getsockopt, sys_getsockopt)
133
134#define __NR_clone 56
135__SYSCALL(__NR_clone, stub_clone)
136#define __NR_fork 57
137__SYSCALL(__NR_fork, stub_fork)
138#define __NR_vfork 58
139__SYSCALL(__NR_vfork, stub_vfork)
140#define __NR_execve 59
141__SYSCALL(__NR_execve, stub_execve)
142#define __NR_exit 60
143__SYSCALL(__NR_exit, sys_exit)
144#define __NR_wait4 61
145__SYSCALL(__NR_wait4, sys_wait4)
146#define __NR_kill 62
147__SYSCALL(__NR_kill, sys_kill)
148#define __NR_uname 63
149__SYSCALL(__NR_uname, sys_newuname)
150
151#define __NR_semget 64
152__SYSCALL(__NR_semget, sys_semget)
153#define __NR_semop 65
154__SYSCALL(__NR_semop, sys_semop)
155#define __NR_semctl 66
156__SYSCALL(__NR_semctl, sys_semctl)
157#define __NR_shmdt 67
158__SYSCALL(__NR_shmdt, sys_shmdt)
159#define __NR_msgget 68
160__SYSCALL(__NR_msgget, sys_msgget)
161#define __NR_msgsnd 69
162__SYSCALL(__NR_msgsnd, sys_msgsnd)
163#define __NR_msgrcv 70
164__SYSCALL(__NR_msgrcv, sys_msgrcv)
165#define __NR_msgctl 71
166__SYSCALL(__NR_msgctl, sys_msgctl)
167
168#define __NR_fcntl 72
169__SYSCALL(__NR_fcntl, sys_fcntl)
170#define __NR_flock 73
171__SYSCALL(__NR_flock, sys_flock)
172#define __NR_fsync 74
173__SYSCALL(__NR_fsync, sys_fsync)
174#define __NR_fdatasync 75
175__SYSCALL(__NR_fdatasync, sys_fdatasync)
176#define __NR_truncate 76
177__SYSCALL(__NR_truncate, sys_truncate)
178#define __NR_ftruncate 77
179__SYSCALL(__NR_ftruncate, sys_ftruncate)
180#define __NR_getdents 78
181__SYSCALL(__NR_getdents, sys_getdents)
182#define __NR_getcwd 79
183__SYSCALL(__NR_getcwd, sys_getcwd)
184
185#define __NR_chdir 80
186__SYSCALL(__NR_chdir, sys_chdir)
187#define __NR_fchdir 81
188__SYSCALL(__NR_fchdir, sys_fchdir)
189#define __NR_rename 82
190__SYSCALL(__NR_rename, sys_rename)
191#define __NR_mkdir 83
192__SYSCALL(__NR_mkdir, sys_mkdir)
193#define __NR_rmdir 84
194__SYSCALL(__NR_rmdir, sys_rmdir)
195#define __NR_creat 85
196__SYSCALL(__NR_creat, sys_creat)
197#define __NR_link 86
198__SYSCALL(__NR_link, sys_link)
199#define __NR_unlink 87
200__SYSCALL(__NR_unlink, sys_unlink)
201
202#define __NR_symlink 88
203__SYSCALL(__NR_symlink, sys_symlink)
204#define __NR_readlink 89
205__SYSCALL(__NR_readlink, sys_readlink)
206#define __NR_chmod 90
207__SYSCALL(__NR_chmod, sys_chmod)
208#define __NR_fchmod 91
209__SYSCALL(__NR_fchmod, sys_fchmod)
210#define __NR_chown 92
211__SYSCALL(__NR_chown, sys_chown)
212#define __NR_fchown 93
213__SYSCALL(__NR_fchown, sys_fchown)
214#define __NR_lchown 94
215__SYSCALL(__NR_lchown, sys_lchown)
216#define __NR_umask 95
217__SYSCALL(__NR_umask, sys_umask)
218
219#define __NR_gettimeofday 96
220__SYSCALL(__NR_gettimeofday, sys_gettimeofday)
221#define __NR_getrlimit 97
222__SYSCALL(__NR_getrlimit, sys_getrlimit)
223#define __NR_getrusage 98
224__SYSCALL(__NR_getrusage, sys_getrusage)
225#define __NR_sysinfo 99
226__SYSCALL(__NR_sysinfo, sys_sysinfo)
227#define __NR_times 100
228__SYSCALL(__NR_times, sys_times)
229#define __NR_ptrace 101
230__SYSCALL(__NR_ptrace, sys_ptrace)
231#define __NR_getuid 102
232__SYSCALL(__NR_getuid, sys_getuid)
233#define __NR_syslog 103
234__SYSCALL(__NR_syslog, sys_syslog)
235
236/* at the very end the stuff that never runs during the benchmarks */
237#define __NR_getgid 104
238__SYSCALL(__NR_getgid, sys_getgid)
239#define __NR_setuid 105
240__SYSCALL(__NR_setuid, sys_setuid)
241#define __NR_setgid 106
242__SYSCALL(__NR_setgid, sys_setgid)
243#define __NR_geteuid 107
244__SYSCALL(__NR_geteuid, sys_geteuid)
245#define __NR_getegid 108
246__SYSCALL(__NR_getegid, sys_getegid)
247#define __NR_setpgid 109
248__SYSCALL(__NR_setpgid, sys_setpgid)
249#define __NR_getppid 110
250__SYSCALL(__NR_getppid, sys_getppid)
251#define __NR_getpgrp 111
252__SYSCALL(__NR_getpgrp, sys_getpgrp)
253
254#define __NR_setsid 112
255__SYSCALL(__NR_setsid, sys_setsid)
256#define __NR_setreuid 113
257__SYSCALL(__NR_setreuid, sys_setreuid)
258#define __NR_setregid 114
259__SYSCALL(__NR_setregid, sys_setregid)
260#define __NR_getgroups 115
261__SYSCALL(__NR_getgroups, sys_getgroups)
262#define __NR_setgroups 116
263__SYSCALL(__NR_setgroups, sys_setgroups)
264#define __NR_setresuid 117
265__SYSCALL(__NR_setresuid, sys_setresuid)
266#define __NR_getresuid 118
267__SYSCALL(__NR_getresuid, sys_getresuid)
268#define __NR_setresgid 119
269__SYSCALL(__NR_setresgid, sys_setresgid)
270
271#define __NR_getresgid 120
272__SYSCALL(__NR_getresgid, sys_getresgid)
273#define __NR_getpgid 121
274__SYSCALL(__NR_getpgid, sys_getpgid)
275#define __NR_setfsuid 122
276__SYSCALL(__NR_setfsuid, sys_setfsuid)
277#define __NR_setfsgid 123
278__SYSCALL(__NR_setfsgid, sys_setfsgid)
279#define __NR_getsid 124
280__SYSCALL(__NR_getsid, sys_getsid)
281#define __NR_capget 125
282__SYSCALL(__NR_capget, sys_capget)
283#define __NR_capset 126
284__SYSCALL(__NR_capset, sys_capset)
285
286#define __NR_rt_sigpending 127
287__SYSCALL(__NR_rt_sigpending, sys_rt_sigpending)
288#define __NR_rt_sigtimedwait 128
289__SYSCALL(__NR_rt_sigtimedwait, sys_rt_sigtimedwait)
290#define __NR_rt_sigqueueinfo 129
291__SYSCALL(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo)
292#define __NR_rt_sigsuspend 130
293__SYSCALL(__NR_rt_sigsuspend, sys_rt_sigsuspend)
294#define __NR_sigaltstack 131
295__SYSCALL(__NR_sigaltstack, stub_sigaltstack)
296#define __NR_utime 132
297__SYSCALL(__NR_utime, sys_utime)
298#define __NR_mknod 133
299__SYSCALL(__NR_mknod, sys_mknod)
300
301/* Only needed for a.out */
302#define __NR_uselib 134
303__SYSCALL(__NR_uselib, sys_ni_syscall)
304#define __NR_personality 135
305__SYSCALL(__NR_personality, sys_personality)
306
307#define __NR_ustat 136
308__SYSCALL(__NR_ustat, sys_ustat)
309#define __NR_statfs 137
310__SYSCALL(__NR_statfs, sys_statfs)
311#define __NR_fstatfs 138
312__SYSCALL(__NR_fstatfs, sys_fstatfs)
313#define __NR_sysfs 139
314__SYSCALL(__NR_sysfs, sys_sysfs)
315
316#define __NR_getpriority 140
317__SYSCALL(__NR_getpriority, sys_getpriority)
318#define __NR_setpriority 141
319__SYSCALL(__NR_setpriority, sys_setpriority)
320#define __NR_sched_setparam 142
321__SYSCALL(__NR_sched_setparam, sys_sched_setparam)
322#define __NR_sched_getparam 143
323__SYSCALL(__NR_sched_getparam, sys_sched_getparam)
324#define __NR_sched_setscheduler 144
325__SYSCALL(__NR_sched_setscheduler, sys_sched_setscheduler)
326#define __NR_sched_getscheduler 145
327__SYSCALL(__NR_sched_getscheduler, sys_sched_getscheduler)
328#define __NR_sched_get_priority_max 146
329__SYSCALL(__NR_sched_get_priority_max, sys_sched_get_priority_max)
330#define __NR_sched_get_priority_min 147
331__SYSCALL(__NR_sched_get_priority_min, sys_sched_get_priority_min)
332#define __NR_sched_rr_get_interval 148
333__SYSCALL(__NR_sched_rr_get_interval, sys_sched_rr_get_interval)
334
335#define __NR_mlock 149
336__SYSCALL(__NR_mlock, sys_mlock)
337#define __NR_munlock 150
338__SYSCALL(__NR_munlock, sys_munlock)
339#define __NR_mlockall 151
340__SYSCALL(__NR_mlockall, sys_mlockall)
341#define __NR_munlockall 152
342__SYSCALL(__NR_munlockall, sys_munlockall)
343
344#define __NR_vhangup 153
345__SYSCALL(__NR_vhangup, sys_vhangup)
346
347#define __NR_modify_ldt 154
348__SYSCALL(__NR_modify_ldt, sys_modify_ldt)
349
350#define __NR_pivot_root 155
351__SYSCALL(__NR_pivot_root, sys_pivot_root)
352
353#define __NR__sysctl 156
354__SYSCALL(__NR__sysctl, sys_sysctl)
355
356#define __NR_prctl 157
357__SYSCALL(__NR_prctl, sys_prctl)
358#define __NR_arch_prctl 158
359__SYSCALL(__NR_arch_prctl, sys_arch_prctl)
360
361#define __NR_adjtimex 159
362__SYSCALL(__NR_adjtimex, sys_adjtimex)
363
364#define __NR_setrlimit 160
365__SYSCALL(__NR_setrlimit, sys_setrlimit)
366
367#define __NR_chroot 161
368__SYSCALL(__NR_chroot, sys_chroot)
369
370#define __NR_sync 162
371__SYSCALL(__NR_sync, sys_sync)
372
373#define __NR_acct 163
374__SYSCALL(__NR_acct, sys_acct)
375
376#define __NR_settimeofday 164
377__SYSCALL(__NR_settimeofday, sys_settimeofday)
378
379#define __NR_mount 165
380__SYSCALL(__NR_mount, sys_mount)
381#define __NR_umount2 166
382__SYSCALL(__NR_umount2, sys_umount)
383
384#define __NR_swapon 167
385__SYSCALL(__NR_swapon, sys_swapon)
386#define __NR_swapoff 168
387__SYSCALL(__NR_swapoff, sys_swapoff)
388
389#define __NR_reboot 169
390__SYSCALL(__NR_reboot, sys_reboot)
391
392#define __NR_sethostname 170
393__SYSCALL(__NR_sethostname, sys_sethostname)
394#define __NR_setdomainname 171
395__SYSCALL(__NR_setdomainname, sys_setdomainname)
396
397#define __NR_iopl 172
398__SYSCALL(__NR_iopl, stub_iopl)
399#define __NR_ioperm 173
400__SYSCALL(__NR_ioperm, sys_ioperm)
401
402#define __NR_create_module 174
403__SYSCALL(__NR_create_module, sys_ni_syscall)
404#define __NR_init_module 175
405__SYSCALL(__NR_init_module, sys_init_module)
406#define __NR_delete_module 176
407__SYSCALL(__NR_delete_module, sys_delete_module)
408#define __NR_get_kernel_syms 177
409__SYSCALL(__NR_get_kernel_syms, sys_ni_syscall)
410#define __NR_query_module 178
411__SYSCALL(__NR_query_module, sys_ni_syscall)
412
413#define __NR_quotactl 179
414__SYSCALL(__NR_quotactl, sys_quotactl)
415
416#define __NR_nfsservctl 180
417__SYSCALL(__NR_nfsservctl, sys_ni_syscall)
418
419/* reserved for LiS/STREAMS */
420#define __NR_getpmsg 181
421__SYSCALL(__NR_getpmsg, sys_ni_syscall)
422#define __NR_putpmsg 182
423__SYSCALL(__NR_putpmsg, sys_ni_syscall)
424
425/* reserved for AFS */
426#define __NR_afs_syscall 183
427__SYSCALL(__NR_afs_syscall, sys_ni_syscall)
428
429/* reserved for tux */
430#define __NR_tuxcall 184
431__SYSCALL(__NR_tuxcall, sys_ni_syscall)
432
433#define __NR_security 185
434__SYSCALL(__NR_security, sys_ni_syscall)
435
436#define __NR_gettid 186
437__SYSCALL(__NR_gettid, sys_gettid)
438
439#define __NR_readahead 187
440__SYSCALL(__NR_readahead, sys_readahead)
441#define __NR_setxattr 188
442__SYSCALL(__NR_setxattr, sys_setxattr)
443#define __NR_lsetxattr 189
444__SYSCALL(__NR_lsetxattr, sys_lsetxattr)
445#define __NR_fsetxattr 190
446__SYSCALL(__NR_fsetxattr, sys_fsetxattr)
447#define __NR_getxattr 191
448__SYSCALL(__NR_getxattr, sys_getxattr)
449#define __NR_lgetxattr 192
450__SYSCALL(__NR_lgetxattr, sys_lgetxattr)
451#define __NR_fgetxattr 193
452__SYSCALL(__NR_fgetxattr, sys_fgetxattr)
453#define __NR_listxattr 194
454__SYSCALL(__NR_listxattr, sys_listxattr)
455#define __NR_llistxattr 195
456__SYSCALL(__NR_llistxattr, sys_llistxattr)
457#define __NR_flistxattr 196
458__SYSCALL(__NR_flistxattr, sys_flistxattr)
459#define __NR_removexattr 197
460__SYSCALL(__NR_removexattr, sys_removexattr)
461#define __NR_lremovexattr 198
462__SYSCALL(__NR_lremovexattr, sys_lremovexattr)
463#define __NR_fremovexattr 199
464__SYSCALL(__NR_fremovexattr, sys_fremovexattr)
465#define __NR_tkill 200
466__SYSCALL(__NR_tkill, sys_tkill)
467#define __NR_time 201
468__SYSCALL(__NR_time, sys_time)
469#define __NR_futex 202
470__SYSCALL(__NR_futex, sys_futex)
471#define __NR_sched_setaffinity 203
472__SYSCALL(__NR_sched_setaffinity, sys_sched_setaffinity)
473#define __NR_sched_getaffinity 204
474__SYSCALL(__NR_sched_getaffinity, sys_sched_getaffinity)
475#define __NR_set_thread_area 205
476__SYSCALL(__NR_set_thread_area, sys_ni_syscall) /* use arch_prctl */
477#define __NR_io_setup 206
478__SYSCALL(__NR_io_setup, sys_io_setup)
479#define __NR_io_destroy 207
480__SYSCALL(__NR_io_destroy, sys_io_destroy)
481#define __NR_io_getevents 208
482__SYSCALL(__NR_io_getevents, sys_io_getevents)
483#define __NR_io_submit 209
484__SYSCALL(__NR_io_submit, sys_io_submit)
485#define __NR_io_cancel 210
486__SYSCALL(__NR_io_cancel, sys_io_cancel)
487#define __NR_get_thread_area 211
488__SYSCALL(__NR_get_thread_area, sys_ni_syscall) /* use arch_prctl */
489#define __NR_lookup_dcookie 212
490__SYSCALL(__NR_lookup_dcookie, sys_lookup_dcookie)
491#define __NR_epoll_create 213
492__SYSCALL(__NR_epoll_create, sys_epoll_create)
493#define __NR_epoll_ctl_old 214
494__SYSCALL(__NR_epoll_ctl_old, sys_ni_syscall)
495#define __NR_epoll_wait_old 215
496__SYSCALL(__NR_epoll_wait_old, sys_ni_syscall)
497#define __NR_remap_file_pages 216
498__SYSCALL(__NR_remap_file_pages, sys_remap_file_pages)
499#define __NR_getdents64 217
500__SYSCALL(__NR_getdents64, sys_getdents64)
501#define __NR_set_tid_address 218
502__SYSCALL(__NR_set_tid_address, sys_set_tid_address)
503#define __NR_restart_syscall 219
504__SYSCALL(__NR_restart_syscall, sys_restart_syscall)
505#define __NR_semtimedop 220
506__SYSCALL(__NR_semtimedop, sys_semtimedop)
507#define __NR_fadvise64 221
508__SYSCALL(__NR_fadvise64, sys_fadvise64)
509#define __NR_timer_create 222
510__SYSCALL(__NR_timer_create, sys_timer_create)
511#define __NR_timer_settime 223
512__SYSCALL(__NR_timer_settime, sys_timer_settime)
513#define __NR_timer_gettime 224
514__SYSCALL(__NR_timer_gettime, sys_timer_gettime)
515#define __NR_timer_getoverrun 225
516__SYSCALL(__NR_timer_getoverrun, sys_timer_getoverrun)
517#define __NR_timer_delete 226
518__SYSCALL(__NR_timer_delete, sys_timer_delete)
519#define __NR_clock_settime 227
520__SYSCALL(__NR_clock_settime, sys_clock_settime)
521#define __NR_clock_gettime 228
522__SYSCALL(__NR_clock_gettime, sys_clock_gettime)
523#define __NR_clock_getres 229
524__SYSCALL(__NR_clock_getres, sys_clock_getres)
525#define __NR_clock_nanosleep 230
526__SYSCALL(__NR_clock_nanosleep, sys_clock_nanosleep)
527#define __NR_exit_group 231
528__SYSCALL(__NR_exit_group, sys_exit_group)
529#define __NR_epoll_wait 232
530__SYSCALL(__NR_epoll_wait, sys_epoll_wait)
531#define __NR_epoll_ctl 233
532__SYSCALL(__NR_epoll_ctl, sys_epoll_ctl)
533#define __NR_tgkill 234
534__SYSCALL(__NR_tgkill, sys_tgkill)
535#define __NR_utimes 235
536__SYSCALL(__NR_utimes, sys_utimes)
537#define __NR_vserver 236
538__SYSCALL(__NR_vserver, sys_ni_syscall)
539#define __NR_mbind 237
540__SYSCALL(__NR_mbind, sys_mbind)
541#define __NR_set_mempolicy 238
542__SYSCALL(__NR_set_mempolicy, sys_set_mempolicy)
543#define __NR_get_mempolicy 239
544__SYSCALL(__NR_get_mempolicy, sys_get_mempolicy)
545#define __NR_mq_open 240
546__SYSCALL(__NR_mq_open, sys_mq_open)
547#define __NR_mq_unlink 241
548__SYSCALL(__NR_mq_unlink, sys_mq_unlink)
549#define __NR_mq_timedsend 242
550__SYSCALL(__NR_mq_timedsend, sys_mq_timedsend)
551#define __NR_mq_timedreceive 243
552__SYSCALL(__NR_mq_timedreceive, sys_mq_timedreceive)
553#define __NR_mq_notify 244
554__SYSCALL(__NR_mq_notify, sys_mq_notify)
555#define __NR_mq_getsetattr 245
556__SYSCALL(__NR_mq_getsetattr, sys_mq_getsetattr)
557#define __NR_kexec_load 246
558__SYSCALL(__NR_kexec_load, sys_kexec_load)
559#define __NR_waitid 247
560__SYSCALL(__NR_waitid, sys_waitid)
561#define __NR_add_key 248
562__SYSCALL(__NR_add_key, sys_add_key)
563#define __NR_request_key 249
564__SYSCALL(__NR_request_key, sys_request_key)
565#define __NR_keyctl 250
566__SYSCALL(__NR_keyctl, sys_keyctl)
567#define __NR_ioprio_set 251
568__SYSCALL(__NR_ioprio_set, sys_ioprio_set)
569#define __NR_ioprio_get 252
570__SYSCALL(__NR_ioprio_get, sys_ioprio_get)
571#define __NR_inotify_init 253
572__SYSCALL(__NR_inotify_init, sys_inotify_init)
573#define __NR_inotify_add_watch 254
574__SYSCALL(__NR_inotify_add_watch, sys_inotify_add_watch)
575#define __NR_inotify_rm_watch 255
576__SYSCALL(__NR_inotify_rm_watch, sys_inotify_rm_watch)
577#define __NR_migrate_pages 256
578__SYSCALL(__NR_migrate_pages, sys_migrate_pages)
579#define __NR_openat 257
580__SYSCALL(__NR_openat, sys_openat)
581#define __NR_mkdirat 258
582__SYSCALL(__NR_mkdirat, sys_mkdirat)
583#define __NR_mknodat 259
584__SYSCALL(__NR_mknodat, sys_mknodat)
585#define __NR_fchownat 260
586__SYSCALL(__NR_fchownat, sys_fchownat)
587#define __NR_futimesat 261
588__SYSCALL(__NR_futimesat, sys_futimesat)
589#define __NR_newfstatat 262
590__SYSCALL(__NR_newfstatat, sys_newfstatat)
591#define __NR_unlinkat 263
592__SYSCALL(__NR_unlinkat, sys_unlinkat)
593#define __NR_renameat 264
594__SYSCALL(__NR_renameat, sys_renameat)
595#define __NR_linkat 265
596__SYSCALL(__NR_linkat, sys_linkat)
597#define __NR_symlinkat 266
598__SYSCALL(__NR_symlinkat, sys_symlinkat)
599#define __NR_readlinkat 267
600__SYSCALL(__NR_readlinkat, sys_readlinkat)
601#define __NR_fchmodat 268
602__SYSCALL(__NR_fchmodat, sys_fchmodat)
603#define __NR_faccessat 269
604__SYSCALL(__NR_faccessat, sys_faccessat)
605#define __NR_pselect6 270
606__SYSCALL(__NR_pselect6, sys_pselect6)
607#define __NR_ppoll 271
608__SYSCALL(__NR_ppoll, sys_ppoll)
609#define __NR_unshare 272
610__SYSCALL(__NR_unshare, sys_unshare)
611#define __NR_set_robust_list 273
612__SYSCALL(__NR_set_robust_list, sys_set_robust_list)
613#define __NR_get_robust_list 274
614__SYSCALL(__NR_get_robust_list, sys_get_robust_list)
615#define __NR_splice 275
616__SYSCALL(__NR_splice, sys_splice)
617#define __NR_tee 276
618__SYSCALL(__NR_tee, sys_tee)
619#define __NR_sync_file_range 277
620__SYSCALL(__NR_sync_file_range, sys_sync_file_range)
621#define __NR_vmsplice 278
622__SYSCALL(__NR_vmsplice, sys_vmsplice)
623#define __NR_move_pages 279
624__SYSCALL(__NR_move_pages, sys_move_pages)
625#define __NR_utimensat 280
626__SYSCALL(__NR_utimensat, sys_utimensat)
627#define __IGNORE_getcpu /* implemented as a vsyscall */
628#define __NR_epoll_pwait 281
629__SYSCALL(__NR_epoll_pwait, sys_epoll_pwait)
630#define __NR_signalfd 282
631__SYSCALL(__NR_signalfd, sys_signalfd)
632#define __NR_timerfd_create 283
633__SYSCALL(__NR_timerfd_create, sys_timerfd_create)
634#define __NR_eventfd 284
635__SYSCALL(__NR_eventfd, sys_eventfd)
636#define __NR_fallocate 285
637__SYSCALL(__NR_fallocate, sys_fallocate)
638#define __NR_timerfd_settime 286
639__SYSCALL(__NR_timerfd_settime, sys_timerfd_settime)
640#define __NR_timerfd_gettime 287
641__SYSCALL(__NR_timerfd_gettime, sys_timerfd_gettime)
642#define __NR_accept4 288
643__SYSCALL(__NR_accept4, sys_accept4)
644#define __NR_signalfd4 289
645__SYSCALL(__NR_signalfd4, sys_signalfd4)
646#define __NR_eventfd2 290
647__SYSCALL(__NR_eventfd2, sys_eventfd2)
648#define __NR_epoll_create1 291
649__SYSCALL(__NR_epoll_create1, sys_epoll_create1)
650#define __NR_dup3 292
651__SYSCALL(__NR_dup3, sys_dup3)
652#define __NR_pipe2 293
653__SYSCALL(__NR_pipe2, sys_pipe2)
654#define __NR_inotify_init1 294
655__SYSCALL(__NR_inotify_init1, sys_inotify_init1)
656#define __NR_preadv 295
657__SYSCALL(__NR_preadv, sys_preadv)
658#define __NR_pwritev 296
659__SYSCALL(__NR_pwritev, sys_pwritev)
660#define __NR_rt_tgsigqueueinfo 297
661__SYSCALL(__NR_rt_tgsigqueueinfo, sys_rt_tgsigqueueinfo)
662#define __NR_perf_event_open 298
663__SYSCALL(__NR_perf_event_open, sys_perf_event_open)
664#define __NR_recvmmsg 299
665__SYSCALL(__NR_recvmmsg, sys_recvmmsg)
666#define __NR_fanotify_init 300
667__SYSCALL(__NR_fanotify_init, sys_fanotify_init)
668#define __NR_fanotify_mark 301
669__SYSCALL(__NR_fanotify_mark, sys_fanotify_mark)
670#define __NR_prlimit64 302
671__SYSCALL(__NR_prlimit64, sys_prlimit64)
672#define __NR_name_to_handle_at 303
673__SYSCALL(__NR_name_to_handle_at, sys_name_to_handle_at)
674#define __NR_open_by_handle_at 304
675__SYSCALL(__NR_open_by_handle_at, sys_open_by_handle_at)
676#define __NR_clock_adjtime 305
677__SYSCALL(__NR_clock_adjtime, sys_clock_adjtime)
678#define __NR_syncfs 306
679__SYSCALL(__NR_syncfs, sys_syncfs)
680#define __NR_sendmmsg 307
681__SYSCALL(__NR_sendmmsg, sys_sendmmsg)
682#define __NR_setns 308
683__SYSCALL(__NR_setns, sys_setns)
684#define __NR_getcpu 309
685__SYSCALL(__NR_getcpu, sys_getcpu)
686
687#ifndef __NO_STUBS
688#define __ARCH_WANT_OLD_READDIR
689#define __ARCH_WANT_OLD_STAT
690#define __ARCH_WANT_SYS_ALARM
691#define __ARCH_WANT_SYS_GETHOSTNAME
692#define __ARCH_WANT_SYS_PAUSE
693#define __ARCH_WANT_SYS_SGETMASK
694#define __ARCH_WANT_SYS_SIGNAL
695#define __ARCH_WANT_SYS_UTIME
696#define __ARCH_WANT_SYS_WAITPID
697#define __ARCH_WANT_SYS_SOCKETCALL
698#define __ARCH_WANT_SYS_FADVISE64
699#define __ARCH_WANT_SYS_GETPGRP
700#define __ARCH_WANT_SYS_LLSEEK
701#define __ARCH_WANT_SYS_NICE
702#define __ARCH_WANT_SYS_OLD_GETRLIMIT
703#define __ARCH_WANT_SYS_OLD_UNAME
704#define __ARCH_WANT_SYS_OLDUMOUNT
705#define __ARCH_WANT_SYS_SIGPENDING
706#define __ARCH_WANT_SYS_SIGPROCMASK
707#define __ARCH_WANT_SYS_RT_SIGACTION
708#define __ARCH_WANT_SYS_RT_SIGSUSPEND
709#define __ARCH_WANT_SYS_TIME
710#define __ARCH_WANT_COMPAT_SYS_TIME
711#endif /* __NO_STUBS */
712
713#ifdef __KERNEL__
714
715#ifndef COMPILE_OFFSETS
716#include <asm/asm-offsets.h>
717#define NR_syscalls (__NR_syscall_max + 1)
718#endif
719
720/*
721 * "Conditional" syscalls
722 *
723 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
724 * but it doesn't work on all toolchains, so we just do it by hand
725 */
726#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
727#endif /* __KERNEL__ */
728
729#endif /* _ASM_X86_UNISTD_64_H */
diff --git a/arch/x86/include/asm/xen/grant_table.h b/arch/x86/include/asm/xen/grant_table.h
new file mode 100644
index 00000000000..fdbbb45767a
--- /dev/null
+++ b/arch/x86/include/asm/xen/grant_table.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_X86_XEN_GRANT_TABLE_H
2#define _ASM_X86_XEN_GRANT_TABLE_H
3
4#define xen_alloc_vm_area(size) alloc_vm_area(size)
5#define xen_free_vm_area(area) free_vm_area(area)
6
7#endif /* _ASM_X86_XEN_GRANT_TABLE_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-18 06:26:05 -0400