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-rw-r--r--arch/sh/boards/dreamcast/Makefile6
-rw-r--r--arch/sh/boards/dreamcast/irq.c160
-rw-r--r--arch/sh/boards/dreamcast/rtc.c81
-rw-r--r--arch/sh/boards/dreamcast/setup.c83
4 files changed, 330 insertions, 0 deletions
diff --git a/arch/sh/boards/dreamcast/Makefile b/arch/sh/boards/dreamcast/Makefile
new file mode 100644
index 00000000000..7b97546c7e5
--- /dev/null
+++ b/arch/sh/boards/dreamcast/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for the Sega Dreamcast specific parts of the kernel
3#
4
5obj-y := setup.o irq.o rtc.o
6
diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c
new file mode 100644
index 00000000000..b10a6b11c03
--- /dev/null
+++ b/arch/sh/boards/dreamcast/irq.c
@@ -0,0 +1,160 @@
1/*
2 * arch/sh/boards/dreamcast/irq.c
3 *
4 * Holly IRQ support for the Sega Dreamcast.
5 *
6 * Copyright (c) 2001, 2002 M. R. Brown <mrbrown@0xd6.org>
7 *
8 * This file is part of the LinuxDC project (www.linuxdc.org)
9 * Released under the terms of the GNU GPL v2.0
10 */
11
12#include <linux/irq.h>
13
14#include <asm/io.h>
15#include <asm/irq.h>
16#include <asm/dreamcast/sysasic.h>
17
18/* Dreamcast System ASIC Hardware Events -
19
20 The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving
21 hardware events from system peripherals and triggering an SH7750 IRQ.
22 Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are
23 set in the Event Mask Registers (EMRs). When a hardware event is
24 triggered, it's corresponding bit in the Event Status Registers (ESRs)
25 is set, and that bit should be rewritten to the ESR to acknowledge that
26 event.
27
28 There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event
29 types can be found in include/asm-sh/dc_sysasic.h. There are three groups
30 of EMRs that parallel the ESRs. Each EMR group corresponds to an IRQ, so
31 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 triggers
32 IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9.
33
34 In the kernel, these events are mapped to virtual IRQs so that drivers can
35 respond to them as they would a normal interrupt. In order to keep this
36 mapping simple, the events are mapped as:
37
38 6900/6910 - Events 0-31, IRQ 13
39 6904/6924 - Events 32-63, IRQ 11
40 6908/6938 - Events 64-95, IRQ 9
41
42*/
43
44#define ESR_BASE 0x005f6900 /* Base event status register */
45#define EMR_BASE 0x005f6910 /* Base event mask register */
46
47/* Helps us determine the EMR group that this event belongs to: 0 = 0x6910,
48 1 = 0x6920, 2 = 0x6930; also determine the event offset */
49#define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32)
50
51/* Return the hardware event's bit positon within the EMR/ESR */
52#define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31)
53
54/* For each of these *_irq routines, the IRQ passed in is the virtual IRQ
55 (logically mapped to the corresponding bit for the hardware event). */
56
57/* Disable the hardware event by masking its bit in its EMR */
58static inline void disable_systemasic_irq(unsigned int irq)
59{
60 unsigned long flags;
61 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
62 __u32 mask;
63
64 local_irq_save(flags);
65 mask = inl(emr);
66 mask &= ~(1 << EVENT_BIT(irq));
67 outl(mask, emr);
68 local_irq_restore(flags);
69}
70
71/* Enable the hardware event by setting its bit in its EMR */
72static inline void enable_systemasic_irq(unsigned int irq)
73{
74 unsigned long flags;
75 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
76 __u32 mask;
77
78 local_irq_save(flags);
79 mask = inl(emr);
80 mask |= (1 << EVENT_BIT(irq));
81 outl(mask, emr);
82 local_irq_restore(flags);
83}
84
85/* Acknowledge a hardware event by writing its bit back to its ESR */
86static void ack_systemasic_irq(unsigned int irq)
87{
88 __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
89 disable_systemasic_irq(irq);
90 outl((1 << EVENT_BIT(irq)), esr);
91}
92
93/* After a IRQ has been ack'd and responded to, it needs to be renabled */
94static void end_systemasic_irq(unsigned int irq)
95{
96 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
97 enable_systemasic_irq(irq);
98}
99
100static unsigned int startup_systemasic_irq(unsigned int irq)
101{
102 enable_systemasic_irq(irq);
103
104 return 0;
105}
106
107static void shutdown_systemasic_irq(unsigned int irq)
108{
109 disable_systemasic_irq(irq);
110}
111
112struct hw_interrupt_type systemasic_int = {
113 .typename = "System ASIC",
114 .startup = startup_systemasic_irq,
115 .shutdown = shutdown_systemasic_irq,
116 .enable = enable_systemasic_irq,
117 .disable = disable_systemasic_irq,
118 .ack = ack_systemasic_irq,
119 .end = end_systemasic_irq,
120};
121
122/*
123 * Map the hardware event indicated by the processor IRQ to a virtual IRQ.
124 */
125int systemasic_irq_demux(int irq)
126{
127 __u32 emr, esr, status, level;
128 __u32 j, bit;
129
130 switch (irq) {
131 case 13:
132 level = 0;
133 break;
134 case 11:
135 level = 1;
136 break;
137 case 9:
138 level = 2;
139 break;
140 default:
141 return irq;
142 }
143 emr = EMR_BASE + (level << 4) + (level << 2);
144 esr = ESR_BASE + (level << 2);
145
146 /* Mask the ESR to filter any spurious, unwanted interrtupts */
147 status = inl(esr);
148 status &= inl(emr);
149
150 /* Now scan and find the first set bit as the event to map */
151 for (bit = 1, j = 0; j < 32; bit <<= 1, j++) {
152 if (status & bit) {
153 irq = HW_EVENT_IRQ_BASE + j + (level << 5);
154 return irq;
155 }
156 }
157
158 /* Not reached */
159 return irq;
160}
diff --git a/arch/sh/boards/dreamcast/rtc.c b/arch/sh/boards/dreamcast/rtc.c
new file mode 100644
index 00000000000..379de162913
--- /dev/null
+++ b/arch/sh/boards/dreamcast/rtc.c
@@ -0,0 +1,81 @@
1/* arch/sh/kernel/rtc-aica.c
2 *
3 * Dreamcast AICA RTC routines.
4 *
5 * Copyright (c) 2001, 2002 M. R. Brown <mrbrown@0xd6.org>
6 * Copyright (c) 2002 Paul Mundt <lethal@chaoticdreams.org>
7 *
8 * Released under the terms of the GNU GPL v2.0.
9 *
10 */
11
12#include <linux/time.h>
13
14#include <asm/io.h>
15
16extern void (*rtc_get_time)(struct timespec *);
17extern int (*rtc_set_time)(const time_t);
18
19/* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in
20 seconds to get the standard Unix Epoch when getting the time, and add 20
21 years when setting the time. */
22#define TWENTY_YEARS ((20 * 365LU + 5) * 86400)
23
24/* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit
25 registers.*/
26#define AICA_RTC_SECS_H 0xa0710000
27#define AICA_RTC_SECS_L 0xa0710004
28
29/**
30 * aica_rtc_gettimeofday - Get the time from the AICA RTC
31 * @ts: pointer to resulting timespec
32 *
33 * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch.
34 */
35void aica_rtc_gettimeofday(struct timespec *ts) {
36 unsigned long val1, val2;
37
38 do {
39 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
40 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
41
42 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
43 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
44 } while (val1 != val2);
45
46 ts->tv_sec = val1 - TWENTY_YEARS;
47
48 /* Can't get nanoseconds with just a seconds counter. */
49 ts->tv_nsec = 0;
50}
51
52/**
53 * aica_rtc_settimeofday - Set the AICA RTC to the current time
54 * @secs: contains the time_t to set
55 *
56 * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter.
57 */
58int aica_rtc_settimeofday(const time_t secs) {
59 unsigned long val1, val2;
60 unsigned long adj = secs + TWENTY_YEARS;
61
62 do {
63 ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H);
64 ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L);
65
66 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
67 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
68
69 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
70 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
71 } while (val1 != val2);
72
73 return 0;
74}
75
76void aica_time_init(void)
77{
78 rtc_get_time = aica_rtc_gettimeofday;
79 rtc_set_time = aica_rtc_settimeofday;
80}
81
diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c
new file mode 100644
index 00000000000..55dece35cde
--- /dev/null
+++ b/arch/sh/boards/dreamcast/setup.c
@@ -0,0 +1,83 @@
1/*
2 * arch/sh/boards/dreamcast/setup.c
3 *
4 * Hardware support for the Sega Dreamcast.
5 *
6 * Copyright (c) 2001, 2002 M. R. Brown <mrbrown@linuxdc.org>
7 * Copyright (c) 2002, 2003, 2004 Paul Mundt <lethal@linux-sh.org>
8 *
9 * This file is part of the LinuxDC project (www.linuxdc.org)
10 *
11 * Released under the terms of the GNU GPL v2.0.
12 *
13 * This file originally bore the message (with enclosed-$):
14 * Id: setup_dc.c,v 1.5 2001/05/24 05:09:16 mrbrown Exp
15 * SEGA Dreamcast support
16 */
17
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/param.h>
21#include <linux/interrupt.h>
22#include <linux/init.h>
23#include <linux/irq.h>
24#include <linux/device.h>
25
26#include <asm/io.h>
27#include <asm/irq.h>
28#include <asm/machvec.h>
29#include <asm/machvec_init.h>
30#include <asm/mach/sysasic.h>
31
32extern struct hw_interrupt_type systemasic_int;
33/* XXX: Move this into it's proper header. */
34extern void (*board_time_init)(void);
35extern void aica_time_init(void);
36extern int gapspci_init(void);
37extern int systemasic_irq_demux(int);
38
39void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, int);
40int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t);
41
42const char *get_system_type(void)
43{
44 return "Sega Dreamcast";
45}
46
47struct sh_machine_vector mv_dreamcast __initmv = {
48 .mv_nr_irqs = NR_IRQS,
49
50 .mv_irq_demux = systemasic_irq_demux,
51
52#ifdef CONFIG_PCI
53 .mv_consistent_alloc = dreamcast_consistent_alloc,
54 .mv_consistent_free = dreamcast_consistent_free,
55#endif
56};
57ALIAS_MV(dreamcast)
58
59int __init platform_setup(void)
60{
61 int i;
62
63 /* Mask all hardware events */
64 /* XXX */
65
66 /* Acknowledge any previous events */
67 /* XXX */
68
69 __set_io_port_base(0xa0000000);
70
71 /* Assign all virtual IRQs to the System ASIC int. handler */
72 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
73 irq_desc[i].handler = &systemasic_int;
74
75 board_time_init = aica_time_init;
76
77#ifdef CONFIG_PCI
78 if (gapspci_init() < 0)
79 printk(KERN_WARNING "GAPSPCI was not detected.\n");
80#endif
81
82 return 0;
83}
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 01:40:26 -0400