68 files changed, 4081 insertions, 0 deletions

diff --git a/arch/sh/include/asm/auxvec.h b/arch/sh/include/asm/auxvec.h
new file mode 100644
index 00000000000..483effd65e0
--- /dev/null
+++ b/arch/sh/include/asm/auxvec.h
@@ -0,0 +1,36 @@
+#ifndef __ASM_SH_AUXVEC_H
+#define __ASM_SH_AUXVEC_H
+
+/*
+ * Architecture-neutral AT_ values in 0-17, leave some room
+ * for more of them.
+ */
+
+/*
+ * This entry gives some information about the FPU initialization
+ * performed by the kernel.
+ */
+#define AT_FPUCW                18      /* Used FPU control word.  */
+
+#if defined(CONFIG_VSYSCALL) || !defined(__KERNEL__)
+/*
+ * Only define this in the vsyscall case, the entry point to
+ * the vsyscall page gets placed here. The kernel will attempt
+ * to build a gate VMA we don't care about otherwise..
+ */
+#define AT_SYSINFO_EHDR         33
+#endif
+
+/*
+ * More complete cache descriptions than AT_[DIU]CACHEBSIZE.  If the
+ * value is -1, then the cache doesn't exist.  Otherwise:
+ *
+ *    bit 0-3:    Cache set-associativity; 0 means fully associative.
+ *    bit 4-7:    Log2 of cacheline size.
+ *    bit 8-31:   Size of the entire cache >> 8.
+ */
+#define AT_L1I_CACHESHAPE       34
+#define AT_L1D_CACHESHAPE       35
+#define AT_L2_CACHESHAPE        36
+
+#endif /* __ASM_SH_AUXVEC_H */
diff --git a/arch/sh/include/asm/bitsperlong.h b/arch/sh/include/asm/bitsperlong.h
new file mode 100644
index 00000000000..6dc0bb0c13b
--- /dev/null
+++ b/arch/sh/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/sh/include/asm/byteorder.h b/arch/sh/include/asm/byteorder.h
new file mode 100644
index 00000000000..db2f5d7cb17
--- /dev/null
+++ b/arch/sh/include/asm/byteorder.h
@@ -0,0 +1,10 @@
+#ifndef __ASM_SH_BYTEORDER_H
+#define __ASM_SH_BYTEORDER_H
+
+#ifdef __LITTLE_ENDIAN__
+#include <linux/byteorder/little_endian.h>
+#else
+#include <linux/byteorder/big_endian.h>
+#endif
+
+#endif /* __ASM_SH_BYTEORDER_H */
diff --git a/arch/sh/include/asm/cachectl.h b/arch/sh/include/asm/cachectl.h
new file mode 100644
index 00000000000..6ffb4b7a212
--- /dev/null
+++ b/arch/sh/include/asm/cachectl.h
@@ -0,0 +1,19 @@
+#ifndef _SH_CACHECTL_H
+#define _SH_CACHECTL_H
+
+/* Definitions for the cacheflush system call.  */
+
+#define CACHEFLUSH_D_INVAL      0x1     /* invalidate (without write back) */
+#define CACHEFLUSH_D_WB         0x2     /* write back (without invalidate) */
+#define CACHEFLUSH_D_PURGE      0x3     /* writeback and invalidate */
+
+#define CACHEFLUSH_I            0x4
+
+/*
+ * Options for cacheflush system call
+ */
+#define ICACHE  CACHEFLUSH_I            /* flush instruction cache */
+#define DCACHE  CACHEFLUSH_D_PURGE      /* writeback and flush data cache */
+#define BCACHE  (ICACHE|DCACHE)         /* flush both caches */
+
+#endif /* _SH_CACHECTL_H */
diff --git a/arch/sh/include/asm/cpu-features.h b/arch/sh/include/asm/cpu-features.h
new file mode 100644
index 00000000000..694abe490ed
--- /dev/null
+++ b/arch/sh/include/asm/cpu-features.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_SH_CPU_FEATURES_H
+#define __ASM_SH_CPU_FEATURES_H
+
+/*
+ * Processor flags
+ *
+ * Note: When adding a new flag, keep cpu_flags[] in
+ * arch/sh/kernel/setup.c in sync so symbolic name
+ * mapping of the processor flags has a chance of being
+ * reasonably accurate.
+ *
+ * These flags are also available through the ELF
+ * auxiliary vector as AT_HWCAP.
+ */
+#define CPU_HAS_FPU             0x0001  /* Hardware FPU support */
+#define CPU_HAS_P2_FLUSH_BUG    0x0002  /* Need to flush the cache in P2 area */
+#define CPU_HAS_MMU_PAGE_ASSOC  0x0004  /* SH3: TLB way selection bit support */
+#define CPU_HAS_DSP             0x0008  /* SH-DSP: DSP support */
+#define CPU_HAS_PERF_COUNTER    0x0010  /* Hardware performance counters */
+#define CPU_HAS_PTEA            0x0020  /* PTEA register */
+#define CPU_HAS_LLSC            0x0040  /* movli.l/movco.l */
+#define CPU_HAS_L2_CACHE        0x0080  /* Secondary cache / URAM */
+#define CPU_HAS_OP32            0x0100  /* 32-bit instruction support */
+#define CPU_HAS_PTEAEX          0x0200  /* PTE ASID Extension support */
+
+#endif /* __ASM_SH_CPU_FEATURES_H */
diff --git a/arch/sh/include/asm/cputime.h b/arch/sh/include/asm/cputime.h
new file mode 100644
index 00000000000..6ca395d1393
--- /dev/null
+++ b/arch/sh/include/asm/cputime.h
@@ -0,0 +1,6 @@
+#ifndef __SH_CPUTIME_H
+#define __SH_CPUTIME_H
+
+#include <asm-generic/cputime.h>
+
+#endif /* __SH_CPUTIME_H */
diff --git a/arch/sh/include/asm/current.h b/arch/sh/include/asm/current.h
new file mode 100644
index 00000000000..4c51401b553
--- /dev/null
+++ b/arch/sh/include/asm/current.h
@@ -0,0 +1 @@
+#include <asm-generic/current.h>
diff --git a/arch/sh/include/asm/delay.h b/arch/sh/include/asm/delay.h
new file mode 100644
index 00000000000..9670e127b7b
--- /dev/null
+++ b/arch/sh/include/asm/delay.h
@@ -0,0 +1 @@
+#include <asm-generic/delay.h>
diff --git a/arch/sh/include/asm/div64.h b/arch/sh/include/asm/div64.h
new file mode 100644
index 00000000000..6cd978cefb2
--- /dev/null
+++ b/arch/sh/include/asm/div64.h
@@ -0,0 +1 @@
+#include <asm-generic/div64.h>
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
new file mode 100644
index 00000000000..f3acb8e34c6
--- /dev/null
+++ b/arch/sh/include/asm/dma-sh.h
@@ -0,0 +1,87 @@
+/*
+ * arch/sh/include/asm/dma-sh.h
+ *
+ * Copyright (C) 2000  Takashi YOSHII
+ * Copyright (C) 2003  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __DMA_SH_H
+#define __DMA_SH_H
+
+#include <asm/dma-register.h>
+#include <cpu/dma-register.h>
+#include <cpu/dma.h>
+
+/* DMAOR contorl: The DMAOR access size is different by CPU.*/
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7724)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7780)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7785)
+#define dmaor_read_reg(n) \
+    (n ? __raw_readw(SH_DMAC_BASE1 + DMAOR) \
+        : __raw_readw(SH_DMAC_BASE0 + DMAOR))
+#define dmaor_write_reg(n, data) \
+    (n ? __raw_writew(data, SH_DMAC_BASE1 + DMAOR) \
+    : __raw_writew(data, SH_DMAC_BASE0 + DMAOR))
+#else /* Other CPU */
+#define dmaor_read_reg(n) __raw_readw(SH_DMAC_BASE0 + DMAOR)
+#define dmaor_write_reg(n, data) __raw_writew(data, SH_DMAC_BASE0 + DMAOR)
+#endif
+
+static int dmte_irq_map[] __maybe_unused = {
+#if (MAX_DMA_CHANNELS >= 4)
+    DMTE0_IRQ,
+    DMTE0_IRQ + 1,
+    DMTE0_IRQ + 2,
+    DMTE0_IRQ + 3,
+#endif
+#if (MAX_DMA_CHANNELS >= 6)
+    DMTE4_IRQ,
+    DMTE4_IRQ + 1,
+#endif
+#if (MAX_DMA_CHANNELS >= 8)
+    DMTE6_IRQ,
+    DMTE6_IRQ + 1,
+#endif
+#if (MAX_DMA_CHANNELS >= 12)
+    DMTE8_IRQ,
+    DMTE9_IRQ,
+    DMTE10_IRQ,
+    DMTE11_IRQ,
+#endif
+};
+
+/*
+ * Define the default configuration for dual address memory-memory transfer.
+ * The 0x400 value represents auto-request, external->external.
+ */
+#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))
+
+/* DMA base address */
+static u32 dma_base_addr[] __maybe_unused = {
+#if (MAX_DMA_CHANNELS >= 4)
+        SH_DMAC_BASE0 + 0x00,   /* channel 0 */
+        SH_DMAC_BASE0 + 0x10,
+        SH_DMAC_BASE0 + 0x20,
+        SH_DMAC_BASE0 + 0x30,
+#endif
+#if (MAX_DMA_CHANNELS >= 6)
+        SH_DMAC_BASE0 + 0x50,
+        SH_DMAC_BASE0 + 0x60,
+#endif
+#if (MAX_DMA_CHANNELS >= 8)
+        SH_DMAC_BASE1 + 0x00,
+        SH_DMAC_BASE1 + 0x10,
+#endif
+#if (MAX_DMA_CHANNELS >= 12)
+        SH_DMAC_BASE1 + 0x20,
+        SH_DMAC_BASE1 + 0x30,
+        SH_DMAC_BASE1 + 0x50,
+        SH_DMAC_BASE1 + 0x60, /* channel 11 */
+#endif
+};
+
+#endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/emergency-restart.h b/arch/sh/include/asm/emergency-restart.h
new file mode 100644
index 00000000000..108d8c48e42
--- /dev/null
+++ b/arch/sh/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_EMERGENCY_RESTART_H
+#define _ASM_EMERGENCY_RESTART_H
+
+#include <asm-generic/emergency-restart.h>
+
+#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/sh/include/asm/errno.h b/arch/sh/include/asm/errno.h
new file mode 100644
index 00000000000..51cf6f9cebb
--- /dev/null
+++ b/arch/sh/include/asm/errno.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_SH_ERRNO_H
+#define __ASM_SH_ERRNO_H
+
+#include <asm-generic/errno.h>
+
+#endif /* __ASM_SH_ERRNO_H */
diff --git a/arch/sh/include/asm/fcntl.h b/arch/sh/include/asm/fcntl.h
new file mode 100644
index 00000000000..46ab12db573
--- /dev/null
+++ b/arch/sh/include/asm/fcntl.h
@@ -0,0 +1 @@
+#include <asm-generic/fcntl.h>
diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h
new file mode 100644
index 00000000000..855e945c619
--- /dev/null
+++ b/arch/sh/include/asm/hwblk.h
@@ -0,0 +1,70 @@
+#ifndef __ASM_SH_HWBLK_H
+#define __ASM_SH_HWBLK_H
+
+#include <asm/clock.h>
+#include <asm/io.h>
+
+#define HWBLK_CNT_USAGE 0
+#define HWBLK_CNT_IDLE 1
+#define HWBLK_CNT_DEVICES 2
+#define HWBLK_CNT_NR 3
+
+#define HWBLK_AREA_FLAG_PARENT (1 << 0) /* valid parent */
+
+#define HWBLK_AREA(_flags, _parent)             \
+{                                               \
+        .flags = _flags,                        \
+        .parent = _parent,                      \
+}
+
+struct hwblk_area {
+        int cnt[HWBLK_CNT_NR];
+        unsigned char parent;
+        unsigned char flags;
+};
+
+#define HWBLK(_mstp, _bit, _area)               \
+{                                               \
+        .mstp = (void __iomem *)_mstp,          \
+        .bit = _bit,                            \
+        .area = _area,                          \
+}
+
+struct hwblk {
+        void __iomem *mstp;
+        unsigned char bit;
+        unsigned char area;
+        int cnt[HWBLK_CNT_NR];
+};
+
+struct hwblk_info {
+        struct hwblk_area *areas;
+        int nr_areas;
+        struct hwblk *hwblks;
+        int nr_hwblks;
+};
+
+/* Should be defined by processor-specific code */
+int arch_hwblk_init(void);
+int arch_hwblk_sleep_mode(void);
+
+int hwblk_register(struct hwblk_info *info);
+int hwblk_init(void);
+
+void hwblk_enable(struct hwblk_info *info, int hwblk);
+void hwblk_disable(struct hwblk_info *info, int hwblk);
+
+void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int cnt);
+void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt);
+
+/* allow clocks to enable and disable hardware blocks */
+#define SH_HWBLK_CLK(_hwblk, _parent, _flags)   \
+[_hwblk] = {                                    \
+        .parent         = _parent,              \
+        .arch_flags     = _hwblk,               \
+        .flags          = _flags,               \
+}
+
+int sh_hwblk_clk_register(struct clk *clks, int nr);
+
+#endif /* __ASM_SH_HWBLK_H */
diff --git a/arch/sh/include/asm/ioctl.h b/arch/sh/include/asm/ioctl.h
new file mode 100644
index 00000000000..b279fe06dfe
--- /dev/null
+++ b/arch/sh/include/asm/ioctl.h
@@ -0,0 +1 @@
+#include <asm-generic/ioctl.h>
diff --git a/arch/sh/include/asm/ioctls.h b/arch/sh/include/asm/ioctls.h
new file mode 100644
index 00000000000..a6769f352bf
--- /dev/null
+++ b/arch/sh/include/asm/ioctls.h
@@ -0,0 +1,107 @@
+#ifndef __ASM_SH_IOCTLS_H
+#define __ASM_SH_IOCTLS_H
+
+#include <asm/ioctl.h>
+
+#define FIOCLEX         _IO('f', 1)
+#define FIONCLEX        _IO('f', 2)
+#define FIOASYNC        _IOW('f', 125, int)
+#define FIONBIO         _IOW('f', 126, int)
+#define FIONREAD        _IOR('f', 127, int)
+#define TIOCINQ         FIONREAD
+#define FIOQSIZE        _IOR('f', 128, loff_t)
+
+#define TCGETS          0x5401
+#define TCSETS          0x5402
+#define TCSETSW         0x5403
+#define TCSETSF         0x5404
+
+#define TCGETA          0x80127417      /* _IOR('t', 23, struct termio) */
+#define TCSETA          0x40127418      /* _IOW('t', 24, struct termio) */
+#define TCSETAW         0x40127419      /* _IOW('t', 25, struct termio) */
+#define TCSETAF         0x4012741C      /* _IOW('t', 28, struct termio) */
+
+#define TCSBRK          _IO('t', 29)
+#define TCXONC          _IO('t', 30)
+#define TCFLSH          _IO('t', 31)
+
+#define TIOCSWINSZ      0x40087467      /* _IOW('t', 103, struct winsize) */
+#define TIOCGWINSZ      0x80087468      /* _IOR('t', 104, struct winsize) */
+#define TIOCSTART       _IO('t', 110)           /* start output, like ^Q */
+#define TIOCSTOP        _IO('t', 111)           /* stop output, like ^S */
+#define TIOCOUTQ        _IOR('t', 115, int)     /* output queue size */
+
+#define TIOCSPGRP       _IOW('t', 118, int)
+#define TIOCGPGRP       _IOR('t', 119, int)
+
+#define TIOCEXCL        _IO('T', 12) /* 0x540C */
+#define TIOCNXCL        _IO('T', 13) /* 0x540D */
+#define TIOCSCTTY       _IO('T', 14) /* 0x540E */
+
+#define TIOCSTI         _IOW('T', 18, char) /* 0x5412 */
+#define TIOCMGET        _IOR('T', 21, unsigned int) /* 0x5415 */
+#define TIOCMBIS        _IOW('T', 22, unsigned int) /* 0x5416 */
+#define TIOCMBIC        _IOW('T', 23, unsigned int) /* 0x5417 */
+#define TIOCMSET        _IOW('T', 24, unsigned int) /* 0x5418 */
+# define TIOCM_LE       0x001
+# define TIOCM_DTR      0x002
+# define TIOCM_RTS      0x004
+# define TIOCM_ST       0x008
+# define TIOCM_SR       0x010
+# define TIOCM_CTS      0x020
+# define TIOCM_CAR      0x040
+# define TIOCM_RNG      0x080
+# define TIOCM_DSR      0x100
+# define TIOCM_CD       TIOCM_CAR
+# define TIOCM_RI       TIOCM_RNG
+
+#define TIOCGSOFTCAR    _IOR('T', 25, unsigned int) /* 0x5419 */
+#define TIOCSSOFTCAR    _IOW('T', 26, unsigned int) /* 0x541A */
+#define TIOCLINUX       _IOW('T', 28, char) /* 0x541C */
+#define TIOCCONS        _IO('T', 29) /* 0x541D */
+#define TIOCGSERIAL     0x803C541E      /* _IOR('T', 30, struct serial_struct) 0x541E */
+#define TIOCSSERIAL     0x403C541F      /* _IOW('T', 31, struct serial_struct) 0x541F */
+#define TIOCPKT         _IOW('T', 32, int) /* 0x5420 */
+# define TIOCPKT_DATA            0
+# define TIOCPKT_FLUSHREAD       1
+# define TIOCPKT_FLUSHWRITE      2
+# define TIOCPKT_STOP            4
+# define TIOCPKT_START           8
+# define TIOCPKT_NOSTOP         16
+# define TIOCPKT_DOSTOP         32
+# define TIOCPKT_IOCTL          64
+
+
+#define TIOCNOTTY       _IO('T', 34) /* 0x5422 */
+#define TIOCSETD        _IOW('T', 35, int) /* 0x5423 */
+#define TIOCGETD        _IOR('T', 36, int) /* 0x5424 */
+#define TCSBRKP         _IOW('T', 37, int) /* 0x5425 */ /* Needed for POSIX tcsendbreak() */
+#define TIOCSBRK        _IO('T', 39) /* 0x5427 */ /* BSD compatibility */
+#define TIOCCBRK        _IO('T', 40) /* 0x5428 */ /* BSD compatibility */
+#define TIOCGSID        _IOR('T', 41, pid_t) /* 0x5429 */ /* Return the session ID of FD */
+#define TCGETS2         _IOR('T', 42, struct termios2)
+#define TCSETS2         _IOW('T', 43, struct termios2)
+#define TCSETSW2        _IOW('T', 44, struct termios2)
+#define TCSETSF2        _IOW('T', 45, struct termios2)
+#define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
+#define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
+#define TIOCGDEV        _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
+#define TIOCSIG         _IOW('T',0x36, int)  /* Generate signal on Pty slave */
+#define TIOCVHANGUP     _IO('T', 0x37)
+
+#define TIOCSERCONFIG   _IO('T', 83) /* 0x5453 */
+#define TIOCSERGWILD    _IOR('T', 84,  int) /* 0x5454 */
+#define TIOCSERSWILD    _IOW('T', 85,  int) /* 0x5455 */
+#define TIOCGLCKTRMIOS  0x5456
+#define TIOCSLCKTRMIOS  0x5457
+#define TIOCSERGSTRUCT  0x80d85458      /* _IOR('T', 88, struct async_struct) 0x5458 */ /* For debugging only */
+#define TIOCSERGETLSR   _IOR('T', 89, unsigned int) /* 0x5459 */ /* Get line status register */
+  /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+# define TIOCSER_TEMT    0x01   /* Transmitter physically empty */
+#define TIOCSERGETMULTI 0x80A8545A      /* _IOR('T', 90, struct serial_multiport_struct) 0x545A */ /* Get multiport config */
+#define TIOCSERSETMULTI 0x40A8545B      /* _IOW('T', 91, struct serial_multiport_struct) 0x545B */ /* Set multiport config */
+
+#define TIOCMIWAIT      _IO('T', 92) /* 0x545C */       /* wait for a change on serial input line(s) */
+#define TIOCGICOUNT     0x545D  /* read serial port inline interrupt counts */
+
+#endif /* __ASM_SH_IOCTLS_H */
diff --git a/arch/sh/include/asm/ipcbuf.h b/arch/sh/include/asm/ipcbuf.h
new file mode 100644
index 00000000000..84c7e51cb6d
--- /dev/null
+++ b/arch/sh/include/asm/ipcbuf.h
@@ -0,0 +1 @@
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/sh/include/asm/irq_regs.h b/arch/sh/include/asm/irq_regs.h
new file mode 100644
index 00000000000..3dd9c0b7027
--- /dev/null
+++ b/arch/sh/include/asm/irq_regs.h
@@ -0,0 +1 @@
+#include <asm-generic/irq_regs.h>
diff --git a/arch/sh/include/asm/local.h b/arch/sh/include/asm/local.h
new file mode 100644
index 00000000000..9ed9b9cb459
--- /dev/null
+++ b/arch/sh/include/asm/local.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_SH_LOCAL_H
+#define __ASM_SH_LOCAL_H
+
+#include <asm-generic/local.h>
+
+#endif /* __ASM_SH_LOCAL_H */
+
diff --git a/arch/sh/include/asm/local64.h b/arch/sh/include/asm/local64.h
new file mode 100644
index 00000000000..36c93b5cc23
--- /dev/null
+++ b/arch/sh/include/asm/local64.h
@@ -0,0 +1 @@
+#include <asm-generic/local64.h>
diff --git a/arch/sh/include/asm/memblock.h b/arch/sh/include/asm/memblock.h
new file mode 100644
index 00000000000..e87063fad2e
--- /dev/null
+++ b/arch/sh/include/asm/memblock.h
@@ -0,0 +1,4 @@
+#ifndef __ASM_SH_MEMBLOCK_H
+#define __ASM_SH_MEMBLOCK_H
+
+#endif /* __ASM_SH_MEMBLOCK_H */
diff --git a/arch/sh/include/asm/mman.h b/arch/sh/include/asm/mman.h
new file mode 100644
index 00000000000..8eebf89f5ab
--- /dev/null
+++ b/arch/sh/include/asm/mman.h
@@ -0,0 +1 @@
+#include <asm-generic/mman.h>
diff --git a/arch/sh/include/asm/msgbuf.h b/arch/sh/include/asm/msgbuf.h
new file mode 100644
index 00000000000..809134c644a
--- /dev/null
+++ b/arch/sh/include/asm/msgbuf.h
@@ -0,0 +1 @@
+#include <asm-generic/msgbuf.h>
diff --git a/arch/sh/include/asm/param.h b/arch/sh/include/asm/param.h
new file mode 100644
index 00000000000..965d4542797
--- /dev/null
+++ b/arch/sh/include/asm/param.h
@@ -0,0 +1 @@
+#include <asm-generic/param.h>
diff --git a/arch/sh/include/asm/parport.h b/arch/sh/include/asm/parport.h
new file mode 100644
index 00000000000..cf252af6459
--- /dev/null
+++ b/arch/sh/include/asm/parport.h
@@ -0,0 +1 @@
+#include <asm-generic/parport.h>
diff --git a/arch/sh/include/asm/percpu.h b/arch/sh/include/asm/percpu.h
new file mode 100644
index 00000000000..4db4b39a439
--- /dev/null
+++ b/arch/sh/include/asm/percpu.h
@@ -0,0 +1,6 @@
+#ifndef __ARCH_SH_PERCPU
+#define __ARCH_SH_PERCPU
+
+#include <asm-generic/percpu.h>
+
+#endif /* __ARCH_SH_PERCPU */
diff --git a/arch/sh/include/asm/poll.h b/arch/sh/include/asm/poll.h
new file mode 100644
index 00000000000..c98509d3149
--- /dev/null
+++ b/arch/sh/include/asm/poll.h
@@ -0,0 +1 @@
+#include <asm-generic/poll.h>
diff --git a/arch/sh/include/asm/posix_types_32.h b/arch/sh/include/asm/posix_types_32.h
new file mode 100644
index 00000000000..6a9ceaaf1ae
--- /dev/null
+++ b/arch/sh/include/asm/posix_types_32.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_SH_POSIX_TYPES_32_H
+#define __ASM_SH_POSIX_TYPES_32_H
+
+typedef unsigned short  __kernel_mode_t;
+#define __kernel_mode_t __kernel_mode_t
+typedef unsigned short  __kernel_nlink_t;
+#define __kernel_nlink_t __kernel_nlink_t
+typedef unsigned short  __kernel_ipc_pid_t;
+#define __kernel_ipc_pid_t __kernel_ipc_pid_t
+typedef unsigned short  __kernel_uid_t;
+#define __kernel_uid_t __kernel_uid_t
+typedef unsigned short  __kernel_gid_t;
+#define __kernel_gid_t __kernel_gid_t
+
+typedef unsigned int    __kernel_uid32_t;
+#define __kernel_uid32_t __kernel_uid32_t
+typedef unsigned int    __kernel_gid32_t;
+#define __kernel_gid32_t __kernel_gid32_t
+
+typedef unsigned short  __kernel_old_uid_t;
+#define __kernel_old_uid_t __kernel_old_uid_t
+typedef unsigned short  __kernel_old_gid_t;
+#define __kernel_old_gid_t __kernel_old_gid_t
+typedef unsigned short  __kernel_old_dev_t;
+#define __kernel_old_dev_t __kernel_old_dev_t
+
+#include <asm-generic/posix_types.h>
+
+#endif /* __ASM_SH_POSIX_TYPES_32_H */
diff --git a/arch/sh/include/asm/posix_types_64.h b/arch/sh/include/asm/posix_types_64.h
new file mode 100644
index 00000000000..8cd11485c06
--- /dev/null
+++ b/arch/sh/include/asm/posix_types_64.h
@@ -0,0 +1,34 @@
+#ifndef __ASM_SH_POSIX_TYPES_64_H
+#define __ASM_SH_POSIX_TYPES_64_H
+
+typedef unsigned short  __kernel_mode_t;
+#define __kernel_mode_t __kernel_mode_t
+typedef unsigned short  __kernel_nlink_t;
+#define __kernel_nlink_t __kernel_nlink_t
+typedef unsigned short  __kernel_ipc_pid_t;
+#define __kernel_ipc_pid_t __kernel_ipc_pid_t
+typedef unsigned short  __kernel_uid_t;
+#define __kernel_uid_t __kernel_uid_t
+typedef unsigned short  __kernel_gid_t;
+#define __kernel_gid_t __kernel_gid_t
+typedef long unsigned int       __kernel_size_t;
+#define __kernel_size_t __kernel_size_t
+typedef int             __kernel_ssize_t;
+#define __kernel_ssize_t __kernel_ssize_t
+typedef int             __kernel_ptrdiff_t;
+#define __kernel_ptrdiff_t __kernel_ptrdiff_t
+typedef unsigned int    __kernel_uid32_t;
+#define __kernel_uid32_t __kernel_uid32_t
+typedef unsigned int    __kernel_gid32_t;
+#define __kernel_gid32_t __kernel_gid32_t
+
+typedef unsigned short  __kernel_old_uid_t;
+#define __kernel_old_uid_t __kernel_old_uid_t
+typedef unsigned short  __kernel_old_gid_t;
+#define __kernel_old_gid_t __kernel_old_gid_t
+typedef unsigned short  __kernel_old_dev_t;
+#define __kernel_old_dev_t __kernel_old_dev_t
+
+#include <asm-generic/posix_types.h>
+
+#endif /* __ASM_SH_POSIX_TYPES_64_H */
diff --git a/arch/sh/include/asm/resource.h b/arch/sh/include/asm/resource.h
new file mode 100644
index 00000000000..9c2499a86ec
--- /dev/null
+++ b/arch/sh/include/asm/resource.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_SH_RESOURCE_H
+#define __ASM_SH_RESOURCE_H
+
+#include <asm-generic/resource.h>
+
+#endif /* __ASM_SH_RESOURCE_H */
diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h
new file mode 100644
index 00000000000..98dfc3510f1
--- /dev/null
+++ b/arch/sh/include/asm/scatterlist.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_SH_SCATTERLIST_H
+#define __ASM_SH_SCATTERLIST_H
+
+#include <asm-generic/scatterlist.h>
+
+#endif /* __ASM_SH_SCATTERLIST_H */
diff --git a/arch/sh/include/asm/sembuf.h b/arch/sh/include/asm/sembuf.h
new file mode 100644
index 00000000000..7673b83cfef
--- /dev/null
+++ b/arch/sh/include/asm/sembuf.h
@@ -0,0 +1 @@
+#include <asm-generic/sembuf.h>
diff --git a/arch/sh/include/asm/serial.h b/arch/sh/include/asm/serial.h
new file mode 100644
index 00000000000..a0cb0caff15
--- /dev/null
+++ b/arch/sh/include/asm/serial.h
@@ -0,0 +1 @@
+#include <asm-generic/serial.h>
diff --git a/arch/sh/include/asm/sh_eth.h b/arch/sh/include/asm/sh_eth.h
new file mode 100644
index 00000000000..0f325da0f92
--- /dev/null
+++ b/arch/sh/include/asm/sh_eth.h
@@ -0,0 +1,25 @@
+#ifndef __ASM_SH_ETH_H__
+#define __ASM_SH_ETH_H__
+
+#include <linux/phy.h>
+
+enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN};
+enum {
+        SH_ETH_REG_GIGABIT,
+        SH_ETH_REG_FAST_SH4,
+        SH_ETH_REG_FAST_SH3_SH2
+};
+
+struct sh_eth_plat_data {
+        int phy;
+        int edmac_endian;
+        int register_type;
+        phy_interface_t phy_interface;
+        void (*set_mdio_gate)(unsigned long addr);
+
+        unsigned char mac_addr[6];
+        unsigned no_ether_link:1;
+        unsigned ether_link_active_low:1;
+};
+
+#endif
diff --git a/arch/sh/include/asm/shmbuf.h b/arch/sh/include/asm/shmbuf.h
new file mode 100644
index 00000000000..83c05fc2de3
--- /dev/null
+++ b/arch/sh/include/asm/shmbuf.h
@@ -0,0 +1 @@
+#include <asm-generic/shmbuf.h>
diff --git a/arch/sh/include/asm/sigcontext.h b/arch/sh/include/asm/sigcontext.h
new file mode 100644
index 00000000000..8ce1435bc0b
--- /dev/null
+++ b/arch/sh/include/asm/sigcontext.h
@@ -0,0 +1,40 @@
+#ifndef __ASM_SH_SIGCONTEXT_H
+#define __ASM_SH_SIGCONTEXT_H
+
+struct sigcontext {
+        unsigned long   oldmask;
+
+#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
+        /* CPU registers */
+        unsigned long long sc_regs[63];
+        unsigned long long sc_tregs[8];
+        unsigned long long sc_pc;
+        unsigned long long sc_sr;
+
+        /* FPU registers */
+        unsigned long long sc_fpregs[32];
+        unsigned int sc_fpscr;
+        unsigned int sc_fpvalid;
+#else
+        /* CPU registers */
+        unsigned long sc_regs[16];
+        unsigned long sc_pc;
+        unsigned long sc_pr;
+        unsigned long sc_sr;
+        unsigned long sc_gbr;
+        unsigned long sc_mach;
+        unsigned long sc_macl;
+
+#if defined(__SH4__) || defined(CONFIG_CPU_SH4) || \
+    defined(__SH2A__) || defined(CONFIG_CPU_SH2A)
+        /* FPU registers */
+        unsigned long sc_fpregs[16];
+        unsigned long sc_xfpregs[16];
+        unsigned int sc_fpscr;
+        unsigned int sc_fpul;
+        unsigned int sc_ownedfp;
+#endif
+#endif
+};
+
+#endif /* __ASM_SH_SIGCONTEXT_H */
diff --git a/arch/sh/include/asm/siginfo.h b/arch/sh/include/asm/siginfo.h
new file mode 100644
index 00000000000..813040ed68a
--- /dev/null
+++ b/arch/sh/include/asm/siginfo.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_SH_SIGINFO_H
+#define __ASM_SH_SIGINFO_H
+
+#include <asm-generic/siginfo.h>
+
+#endif /* __ASM_SH_SIGINFO_H */
diff --git a/arch/sh/include/asm/signal.h b/arch/sh/include/asm/signal.h
new file mode 100644
index 00000000000..9ac530a90bc
--- /dev/null
+++ b/arch/sh/include/asm/signal.h
@@ -0,0 +1,15 @@
+#ifndef __ASM_SH_SIGNAL_H
+#define __ASM_SH_SIGNAL_H
+
+#define SA_RESTORER     0x04000000
+
+#include <asm-generic/signal.h>
+
+struct old_sigaction {
+        __sighandler_t sa_handler;
+        old_sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+};
+
+#endif /* __ASM_SH_SIGNAL_H */
diff --git a/arch/sh/include/asm/sizes.h b/arch/sh/include/asm/sizes.h
new file mode 100644
index 00000000000..dd248c2e108
--- /dev/null
+++ b/arch/sh/include/asm/sizes.h
@@ -0,0 +1 @@
+#include <asm-generic/sizes.h>
diff --git a/arch/sh/include/asm/socket.h b/arch/sh/include/asm/socket.h
new file mode 100644
index 00000000000..6b71384b9d8
--- /dev/null
+++ b/arch/sh/include/asm/socket.h
@@ -0,0 +1 @@
+#include <asm-generic/socket.h>
diff --git a/arch/sh/include/asm/sockios.h b/arch/sh/include/asm/sockios.h
new file mode 100644
index 00000000000..cf8b96b1f9a
--- /dev/null
+++ b/arch/sh/include/asm/sockios.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_SH_SOCKIOS_H
+#define __ASM_SH_SOCKIOS_H
+
+/* Socket-level I/O control calls. */
+#define FIOGETOWN       _IOR('f', 123, int)
+#define FIOSETOWN       _IOW('f', 124, int)
+
+#define SIOCATMARK      _IOR('s', 7, int)
+#define SIOCSPGRP       _IOW('s', 8, pid_t)
+#define SIOCGPGRP       _IOR('s', 9, pid_t)
+
+#define SIOCGSTAMP      _IOR('s', 100, struct timeval) /* Get stamp (timeval) */
+#define SIOCGSTAMPNS    _IOR('s', 101, struct timespec) /* Get stamp (timespec) */
+#endif /* __ASM_SH_SOCKIOS_H */
diff --git a/arch/sh/include/asm/stat.h b/arch/sh/include/asm/stat.h
new file mode 100644
index 00000000000..e1810cc6e3d
--- /dev/null
+++ b/arch/sh/include/asm/stat.h
@@ -0,0 +1,138 @@
+#ifndef __ASM_SH_STAT_H
+#define __ASM_SH_STAT_H
+
+struct __old_kernel_stat {
+        unsigned short st_dev;
+        unsigned short st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned short st_rdev;
+        unsigned long  st_size;
+        unsigned long  st_atime;
+        unsigned long  st_mtime;
+        unsigned long  st_ctime;
+};
+
+#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
+struct stat {
+        unsigned short st_dev;
+        unsigned short __pad1;
+        unsigned long st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned short st_rdev;
+        unsigned short __pad2;
+        unsigned long  st_size;
+        unsigned long  st_blksize;
+        unsigned long  st_blocks;
+        unsigned long  st_atime;
+        unsigned long  st_atime_nsec;
+        unsigned long  st_mtime;
+        unsigned long  st_mtime_nsec;
+        unsigned long  st_ctime;
+        unsigned long  st_ctime_nsec;
+        unsigned long  __unused4;
+        unsigned long  __unused5;
+};
+
+/* This matches struct stat64 in glibc2.1, hence the absolutely
+ * insane amounts of padding around dev_t's.
+ */
+struct stat64 {
+        unsigned short  st_dev;
+        unsigned char   __pad0[10];
+
+        unsigned long   st_ino;
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned long   st_uid;
+        unsigned long   st_gid;
+
+        unsigned short  st_rdev;
+        unsigned char   __pad3[10];
+
+        long long       st_size;
+        unsigned long   st_blksize;
+
+        unsigned long   st_blocks;      /* Number 512-byte blocks allocated. */
+        unsigned long   __pad4;         /* future possible st_blocks high bits */
+
+        unsigned long   st_atime;
+        unsigned long   st_atime_nsec;
+
+        unsigned long   st_mtime;
+        unsigned long   st_mtime_nsec;
+
+        unsigned long   st_ctime;
+        unsigned long   st_ctime_nsec;  /* will be high 32 bits of ctime someday */
+
+        unsigned long   __unused1;
+        unsigned long   __unused2;
+};
+#else
+struct stat {
+        unsigned long  st_dev;
+        unsigned long  st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned long  st_rdev;
+        unsigned long  st_size;
+        unsigned long  st_blksize;
+        unsigned long  st_blocks;
+        unsigned long  st_atime;
+        unsigned long  st_atime_nsec;
+        unsigned long  st_mtime;
+        unsigned long  st_mtime_nsec;
+        unsigned long  st_ctime;
+        unsigned long  st_ctime_nsec;
+        unsigned long  __unused4;
+        unsigned long  __unused5;
+};
+
+/* This matches struct stat64 in glibc2.1, hence the absolutely
+ * insane amounts of padding around dev_t's.
+ */
+struct stat64 {
+        unsigned long long      st_dev;
+        unsigned char   __pad0[4];
+
+#define STAT64_HAS_BROKEN_ST_INO        1
+        unsigned long   __st_ino;
+
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned long   st_uid;
+        unsigned long   st_gid;
+
+        unsigned long long      st_rdev;
+        unsigned char   __pad3[4];
+
+        long long       st_size;
+        unsigned long   st_blksize;
+
+        unsigned long long      st_blocks;      /* Number 512-byte blocks allocated. */
+
+        unsigned long   st_atime;
+        unsigned long   st_atime_nsec;
+
+        unsigned long   st_mtime;
+        unsigned long   st_mtime_nsec;
+
+        unsigned long   st_ctime;
+        unsigned long   st_ctime_nsec;
+
+        unsigned long long      st_ino;
+};
+
+#define STAT_HAVE_NSEC 1
+#endif
+
+#endif /* __ASM_SH_STAT_H */
diff --git a/arch/sh/include/asm/statfs.h b/arch/sh/include/asm/statfs.h
new file mode 100644
index 00000000000..9202a023328
--- /dev/null
+++ b/arch/sh/include/asm/statfs.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_SH_STATFS_H
+#define __ASM_SH_STATFS_H
+
+#include <asm-generic/statfs.h>
+
+#endif /* __ASM_SH_STATFS_H */
diff --git a/arch/sh/include/asm/swab.h b/arch/sh/include/asm/swab.h
new file mode 100644
index 00000000000..1cd09767a7a
--- /dev/null
+++ b/arch/sh/include/asm/swab.h
@@ -0,0 +1,59 @@
+#ifndef __ASM_SH_SWAB_H
+#define __ASM_SH_SWAB_H
+
+/*
+ * Copyright (C) 1999  Niibe Yutaka
+ * Copyright (C) 2000, 2001  Paolo Alberelli
+ */
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <asm-generic/swab.h>
+
+static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
+{
+        __asm__(
+#ifdef __SH5__
+                "byterev        %1, %0\n\t"
+                "shari          %0, 32, %0"
+#else
+                "swap.b         %1, %0\n\t"
+                "swap.w         %0, %0\n\t"
+                "swap.b         %0, %0"
+#endif
+                : "=r" (x)
+                : "r" (x));
+
+        return x;
+}
+#define __arch_swab32 __arch_swab32
+
+static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
+{
+        __asm__(
+#ifdef __SH5__
+                "byterev        %1, %0\n\t"
+                "shari          %0, 32, %0"
+#else
+                "swap.b         %1, %0"
+#endif
+                : "=r" (x)
+                :  "r" (x));
+
+        return x;
+}
+#define __arch_swab16 __arch_swab16
+
+static inline __u64 __arch_swab64(__u64 val)
+{
+        union {
+                struct { __u32 a,b; } s;
+                __u64 u;
+        } v, w;
+        v.u = val;
+        w.s.b = __arch_swab32(v.s.a);
+        w.s.a = __arch_swab32(v.s.b);
+        return w.u;
+}
+#define __arch_swab64 __arch_swab64
+
+#endif /* __ASM_SH_SWAB_H */
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
new file mode 100644
index 00000000000..10c8b1823a1
--- /dev/null
+++ b/arch/sh/include/asm/system.h
@@ -0,0 +1,184 @@
+#ifndef __ASM_SH_SYSTEM_H
+#define __ASM_SH_SYSTEM_H
+
+/*
+ * Copyright (C) 1999, 2000  Niibe Yutaka  &  Kaz Kojima
+ * Copyright (C) 2002 Paul Mundt
+ */
+
+#include <linux/irqflags.h>
+#include <linux/compiler.h>
+#include <linux/linkage.h>
+#include <asm/types.h>
+#include <asm/uncached.h>
+
+#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
+
+/*
+ * A brief note on ctrl_barrier(), the control register write barrier.
+ *
+ * Legacy SH cores typically require a sequence of 8 nops after
+ * modification of a control register in order for the changes to take
+ * effect. On newer cores (like the sh4a and sh5) this is accomplished
+ * with icbi.
+ *
+ * Also note that on sh4a in the icbi case we can forego a synco for the
+ * write barrier, as it's not necessary for control registers.
+ *
+ * Historically we have only done this type of barrier for the MMUCR, but
+ * it's also necessary for the CCR, so we make it generic here instead.
+ */
+#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
+#define mb()            __asm__ __volatile__ ("synco": : :"memory")
+#define rmb()           mb()
+#define wmb()           __asm__ __volatile__ ("synco": : :"memory")
+#define ctrl_barrier()  __icbi(PAGE_OFFSET)
+#define read_barrier_depends()  do { } while(0)
+#else
+#define mb()            __asm__ __volatile__ ("": : :"memory")
+#define rmb()           mb()
+#define wmb()           __asm__ __volatile__ ("": : :"memory")
+#define ctrl_barrier()  __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop")
+#define read_barrier_depends()  do { } while(0)
+#endif
+
+#ifdef CONFIG_SMP
+#define smp_mb()        mb()
+#define smp_rmb()       rmb()
+#define smp_wmb()       wmb()
+#define smp_read_barrier_depends()      read_barrier_depends()
+#else
+#define smp_mb()        barrier()
+#define smp_rmb()       barrier()
+#define smp_wmb()       barrier()
+#define smp_read_barrier_depends()      do { } while(0)
+#endif
+
+#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
+
+#ifdef CONFIG_GUSA_RB
+#include <asm/cmpxchg-grb.h>
+#elif defined(CONFIG_CPU_SH4A)
+#include <asm/cmpxchg-llsc.h>
+#else
+#include <asm/cmpxchg-irq.h>
+#endif
+
+extern void __xchg_called_with_bad_pointer(void);
+
+#define __xchg(ptr, x, size)                            \
+({                                                      \
+        unsigned long __xchg__res;                      \
+        volatile void *__xchg_ptr = (ptr);              \
+        switch (size) {                                 \
+        case 4:                                         \
+                __xchg__res = xchg_u32(__xchg_ptr, x);  \
+                break;                                  \
+        case 1:                                         \
+                __xchg__res = xchg_u8(__xchg_ptr, x);   \
+                break;                                  \
+        default:                                        \
+                __xchg_called_with_bad_pointer();       \
+                __xchg__res = x;                        \
+                break;                                  \
+        }                                               \
+                                                        \
+        __xchg__res;                                    \
+})
+
+#define xchg(ptr,x)     \
+        ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr))))
+
+/* This function doesn't exist, so you'll get a linker error
+ * if something tries to do an invalid cmpxchg(). */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
+                unsigned long new, int size)
+{
+        switch (size) {
+        case 4:
+                return __cmpxchg_u32(ptr, old, new);
+        }
+        __cmpxchg_called_with_bad_pointer();
+        return old;
+}
+
+#define cmpxchg(ptr,o,n)                                                 \
+  ({                                                                     \
+     __typeof__(*(ptr)) _o_ = (o);                                       \
+     __typeof__(*(ptr)) _n_ = (n);                                       \
+     (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,           \
+                                    (unsigned long)_n_, sizeof(*(ptr))); \
+  })
+
+struct pt_regs;
+
+extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
+void free_initmem(void);
+void free_initrd_mem(unsigned long start, unsigned long end);
+
+extern void *set_exception_table_vec(unsigned int vec, void *handler);
+
+static inline void *set_exception_table_evt(unsigned int evt, void *handler)
+{
+        return set_exception_table_vec(evt >> 5, handler);
+}
+
+/*
+ * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks.
+ */
+#ifdef CONFIG_CPU_SH2A
+extern unsigned int instruction_size(unsigned int insn);
+#elif defined(CONFIG_SUPERH32)
+#define instruction_size(insn)  (2)
+#else
+#define instruction_size(insn)  (4)
+#endif
+
+void per_cpu_trap_init(void);
+void default_idle(void);
+void cpu_idle_wait(void);
+void stop_this_cpu(void *);
+
+#ifdef CONFIG_SUPERH32
+#define BUILD_TRAP_HANDLER(name)                                        \
+asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \
+                                    unsigned long r6, unsigned long r7, \
+                                    struct pt_regs __regs)
+
+#define TRAP_HANDLER_DECL                               \
+        struct pt_regs *regs = RELOC_HIDE(&__regs, 0);  \
+        unsigned int vec = regs->tra;                   \
+        (void)vec;
+#else
+#define BUILD_TRAP_HANDLER(name)        \
+asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs)
+#define TRAP_HANDLER_DECL
+#endif
+
+BUILD_TRAP_HANDLER(address_error);
+BUILD_TRAP_HANDLER(debug);
+BUILD_TRAP_HANDLER(bug);
+BUILD_TRAP_HANDLER(breakpoint);
+BUILD_TRAP_HANDLER(singlestep);
+BUILD_TRAP_HANDLER(fpu_error);
+BUILD_TRAP_HANDLER(fpu_state_restore);
+BUILD_TRAP_HANDLER(nmi);
+
+#define arch_align_stack(x) (x)
+
+struct mem_access {
+        unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt);
+        unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt);
+};
+
+#ifdef CONFIG_SUPERH32
+# include "system_32.h"
+#else
+# include "system_64.h"
+#endif
+
+#endif
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
new file mode 100644
index 00000000000..a4ad1cd9bc4
--- /dev/null
+++ b/arch/sh/include/asm/system_32.h
@@ -0,0 +1,236 @@
+#ifndef __ASM_SH_SYSTEM_32_H
+#define __ASM_SH_SYSTEM_32_H
+
+#include <linux/types.h>
+#include <asm/mmu.h>
+
+#ifdef CONFIG_SH_DSP
+
+#define is_dsp_enabled(tsk)                                             \
+        (!!(tsk->thread.dsp_status.status & SR_DSP))
+
+#define __restore_dsp(tsk)                                              \
+do {                                                                    \
+        register u32 *__ts2 __asm__ ("r2") =                            \
+                        (u32 *)&tsk->thread.dsp_status;                 \
+        __asm__ __volatile__ (                                          \
+                ".balign 4\n\t"                                         \
+                "movs.l @r2+, a0\n\t"                                   \
+                "movs.l @r2+, a1\n\t"                                   \
+                "movs.l @r2+, a0g\n\t"                                  \
+                "movs.l @r2+, a1g\n\t"                                  \
+                "movs.l @r2+, m0\n\t"                                   \
+                "movs.l @r2+, m1\n\t"                                   \
+                "movs.l @r2+, x0\n\t"                                   \
+                "movs.l @r2+, x1\n\t"                                   \
+                "movs.l @r2+, y0\n\t"                                   \
+                "movs.l @r2+, y1\n\t"                                   \
+                "lds.l  @r2+, dsr\n\t"                                  \
+                "ldc.l  @r2+, rs\n\t"                                   \
+                "ldc.l  @r2+, re\n\t"                                   \
+                "ldc.l  @r2+, mod\n\t"                                  \
+                : : "r" (__ts2));                                       \
+} while (0)
+
+
+#define __save_dsp(tsk)                                                 \
+do {                                                                    \
+        register u32 *__ts2 __asm__ ("r2") =                            \
+                        (u32 *)&tsk->thread.dsp_status + 14;            \
+                                                                        \
+        __asm__ __volatile__ (                                          \
+                ".balign 4\n\t"                                         \
+                "stc.l  mod, @-r2\n\t"                                  \
+                "stc.l  re, @-r2\n\t"                                   \
+                "stc.l  rs, @-r2\n\t"                                   \
+                "sts.l  dsr, @-r2\n\t"                                  \
+                "movs.l y1, @-r2\n\t"                                   \
+                "movs.l y0, @-r2\n\t"                                   \
+                "movs.l x1, @-r2\n\t"                                   \
+                "movs.l x0, @-r2\n\t"                                   \
+                "movs.l m1, @-r2\n\t"                                   \
+                "movs.l m0, @-r2\n\t"                                   \
+                "movs.l a1g, @-r2\n\t"                                  \
+                "movs.l a0g, @-r2\n\t"                                  \
+                "movs.l a1, @-r2\n\t"                                   \
+                "movs.l a0, @-r2\n\t"                                   \
+                : : "r" (__ts2));                                       \
+} while (0)
+
+#else
+
+#define is_dsp_enabled(tsk)     (0)
+#define __save_dsp(tsk)         do { } while (0)
+#define __restore_dsp(tsk)      do { } while (0)
+#endif
+
+#if defined(CONFIG_CPU_SH4A)
+#define __icbi(addr)    __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr))
+#else
+#define __icbi(addr)    mb()
+#endif
+
+#define __ocbp(addr)    __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr))
+#define __ocbi(addr)    __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr))
+#define __ocbwb(addr)   __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr))
+
+struct task_struct *__switch_to(struct task_struct *prev,
+                                struct task_struct *next);
+
+/*
+ *      switch_to() should switch tasks to task nr n, first
+ */
+#define switch_to(prev, next, last)                             \
+do {                                                            \
+        register u32 *__ts1 __asm__ ("r1");                     \
+        register u32 *__ts2 __asm__ ("r2");                     \
+        register u32 *__ts4 __asm__ ("r4");                     \
+        register u32 *__ts5 __asm__ ("r5");                     \
+        register u32 *__ts6 __asm__ ("r6");                     \
+        register u32 __ts7 __asm__ ("r7");                      \
+        struct task_struct *__last;                             \
+                                                                \
+        if (is_dsp_enabled(prev))                               \
+                __save_dsp(prev);                               \
+                                                                \
+        __ts1 = (u32 *)&prev->thread.sp;                        \
+        __ts2 = (u32 *)&prev->thread.pc;                        \
+        __ts4 = (u32 *)prev;                                    \
+        __ts5 = (u32 *)next;                                    \
+        __ts6 = (u32 *)&next->thread.sp;                        \
+        __ts7 = next->thread.pc;                                \
+                                                                \
+        __asm__ __volatile__ (                                  \
+                ".balign 4\n\t"                                 \
+                "stc.l  gbr, @-r15\n\t"                         \
+                "sts.l  pr, @-r15\n\t"                          \
+                "mov.l  r8, @-r15\n\t"                          \
+                "mov.l  r9, @-r15\n\t"                          \
+                "mov.l  r10, @-r15\n\t"                         \
+                "mov.l  r11, @-r15\n\t"                         \
+                "mov.l  r12, @-r15\n\t"                         \
+                "mov.l  r13, @-r15\n\t"                         \
+                "mov.l  r14, @-r15\n\t"                         \
+                "mov.l  r15, @r1\t! save SP\n\t"                \
+                "mov.l  @r6, r15\t! change to new stack\n\t"    \
+                "mova   1f, %0\n\t"                             \
+                "mov.l  %0, @r2\t! save PC\n\t"                 \
+                "mov.l  2f, %0\n\t"                             \
+                "jmp    @%0\t! call __switch_to\n\t"            \
+                " lds   r7, pr\t!  with return to new PC\n\t"   \
+                ".balign        4\n"                            \
+                "2:\n\t"                                        \
+                ".long  __switch_to\n"                          \
+                "1:\n\t"                                        \
+                "mov.l  @r15+, r14\n\t"                         \
+                "mov.l  @r15+, r13\n\t"                         \
+                "mov.l  @r15+, r12\n\t"                         \
+                "mov.l  @r15+, r11\n\t"                         \
+                "mov.l  @r15+, r10\n\t"                         \
+                "mov.l  @r15+, r9\n\t"                          \
+                "mov.l  @r15+, r8\n\t"                          \
+                "lds.l  @r15+, pr\n\t"                          \
+                "ldc.l  @r15+, gbr\n\t"                         \
+                : "=z" (__last)                                 \
+                : "r" (__ts1), "r" (__ts2), "r" (__ts4),        \
+                  "r" (__ts5), "r" (__ts6), "r" (__ts7)         \
+                : "r3", "t");                                   \
+                                                                \
+        last = __last;                                          \
+} while (0)
+
+#define finish_arch_switch(prev)                                \
+do {                                                            \
+        if (is_dsp_enabled(prev))                               \
+                __restore_dsp(prev);                            \
+} while (0)
+
+#ifdef CONFIG_CPU_HAS_SR_RB
+#define lookup_exception_vector()       \
+({                                      \
+        unsigned long _vec;             \
+                                        \
+        __asm__ __volatile__ (          \
+                "stc r2_bank, %0\n\t"   \
+                : "=r" (_vec)           \
+        );                              \
+                                        \
+        _vec;                           \
+})
+#else
+#define lookup_exception_vector()       \
+({                                      \
+        unsigned long _vec;             \
+        __asm__ __volatile__ (          \
+                "mov r4, %0\n\t"        \
+                : "=r" (_vec)           \
+        );                              \
+                                        \
+        _vec;                           \
+})
+#endif
+
+static inline reg_size_t register_align(void *val)
+{
+        return (unsigned long)(signed long)val;
+}
+
+int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
+                            struct mem_access *ma, int, unsigned long address);
+
+static inline void trigger_address_error(void)
+{
+        __asm__ __volatile__ (
+                "ldc %0, sr\n\t"
+                "mov.l @%1, %0"
+                :
+                : "r" (0x10000000), "r" (0x80000001)
+        );
+}
+
+asmlinkage void do_address_error(struct pt_regs *regs,
+                                 unsigned long writeaccess,
+                                 unsigned long address);
+asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
+                                unsigned long r6, unsigned long r7,
+                                struct pt_regs __regs);
+asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
+                                unsigned long r6, unsigned long r7,
+                                struct pt_regs __regs);
+asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
+                                unsigned long r6, unsigned long r7,
+                                struct pt_regs __regs);
+asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
+                                   unsigned long r6, unsigned long r7,
+                                   struct pt_regs __regs);
+
+static inline void set_bl_bit(void)
+{
+        unsigned long __dummy0, __dummy1;
+
+        __asm__ __volatile__ (
+                "stc    sr, %0\n\t"
+                "or     %2, %0\n\t"
+                "and    %3, %0\n\t"
+                "ldc    %0, sr\n\t"
+                : "=&r" (__dummy0), "=r" (__dummy1)
+                : "r" (0x10000000), "r" (0xffffff0f)
+                : "memory"
+        );
+}
+
+static inline void clear_bl_bit(void)
+{
+        unsigned long __dummy0, __dummy1;
+
+        __asm__ __volatile__ (
+                "stc    sr, %0\n\t"
+                "and    %2, %0\n\t"
+                "ldc    %0, sr\n\t"
+                : "=&r" (__dummy0), "=r" (__dummy1)
+                : "1" (~0x10000000)
+                : "memory"
+        );
+}
+
+#endif /* __ASM_SH_SYSTEM_32_H */
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
new file mode 100644
index 00000000000..8593bc8d1a4
--- /dev/null
+++ b/arch/sh/include/asm/system_64.h
@@ -0,0 +1,79 @@
+#ifndef __ASM_SH_SYSTEM_64_H
+#define __ASM_SH_SYSTEM_64_H
+
+/*
+ * include/asm-sh/system_64.h
+ *
+ * Copyright (C) 2000, 2001  Paolo Alberelli
+ * Copyright (C) 2003  Paul Mundt
+ * Copyright (C) 2004  Richard Curnow
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <cpu/registers.h>
+#include <asm/processor.h>
+
+/*
+ *      switch_to() should switch tasks to task nr n, first
+ */
+struct thread_struct;
+struct task_struct *sh64_switch_to(struct task_struct *prev,
+                                   struct thread_struct *prev_thread,
+                                   struct task_struct *next,
+                                   struct thread_struct *next_thread);
+
+#define switch_to(prev,next,last)                               \
+do {                                                            \
+        if (last_task_used_math != next) {                      \
+                struct pt_regs *regs = next->thread.uregs;      \
+                if (regs) regs->sr |= SR_FD;                    \
+        }                                                       \
+        last = sh64_switch_to(prev, &prev->thread, next,        \
+                              &next->thread);                   \
+} while (0)
+
+#define __icbi(addr)    __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
+#define __ocbp(addr)    __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
+#define __ocbi(addr)    __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
+#define __ocbwb(addr)   __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr))
+
+static inline reg_size_t register_align(void *val)
+{
+        return (unsigned long long)(signed long long)(signed long)val;
+}
+
+extern void phys_stext(void);
+
+static inline void trigger_address_error(void)
+{
+        phys_stext();
+}
+
+#define SR_BL_LL        0x0000000010000000LL
+
+static inline void set_bl_bit(void)
+{
+        unsigned long long __dummy0, __dummy1 = SR_BL_LL;
+
+        __asm__ __volatile__("getcon    " __SR ", %0\n\t"
+                             "or        %0, %1, %0\n\t"
+                             "putcon    %0, " __SR "\n\t"
+                             : "=&r" (__dummy0)
+                             : "r" (__dummy1));
+
+}
+
+static inline void clear_bl_bit(void)
+{
+        unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
+
+        __asm__ __volatile__("getcon    " __SR ", %0\n\t"
+                             "and       %0, %1, %0\n\t"
+                             "putcon    %0, " __SR "\n\t"
+                             : "=&r" (__dummy0)
+                             : "r" (__dummy1));
+}
+
+#endif /* __ASM_SH_SYSTEM_64_H */
diff --git a/arch/sh/include/asm/termbits.h b/arch/sh/include/asm/termbits.h
new file mode 100644
index 00000000000..3935b106de7
--- /dev/null
+++ b/arch/sh/include/asm/termbits.h
@@ -0,0 +1 @@
+#include <asm-generic/termbits.h>
diff --git a/arch/sh/include/asm/termios.h b/arch/sh/include/asm/termios.h
new file mode 100644
index 00000000000..280d78a9d96
--- /dev/null
+++ b/arch/sh/include/asm/termios.h
@@ -0,0 +1 @@
+#include <asm-generic/termios.h>
diff --git a/arch/sh/include/asm/ucontext.h b/arch/sh/include/asm/ucontext.h
new file mode 100644
index 00000000000..9bc07b9f30f
--- /dev/null
+++ b/arch/sh/include/asm/ucontext.h
@@ -0,0 +1 @@
+#include <asm-generic/ucontext.h>
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
new file mode 100644
index 00000000000..3432008d288
--- /dev/null
+++ b/arch/sh/include/asm/unistd_32.h
@@ -0,0 +1,420 @@
+#ifndef __ASM_SH_UNISTD_H
+#define __ASM_SH_UNISTD_H
+
+/*
+ * Copyright (C) 1999  Niibe Yutaka
+ */
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_restart_syscall      0
+#define __NR_exit                 1
+#define __NR_fork                 2
+#define __NR_read                 3
+#define __NR_write                4
+#define __NR_open                 5
+#define __NR_close                6
+#define __NR_waitpid              7
+#define __NR_creat                8
+#define __NR_link                 9
+#define __NR_unlink              10
+#define __NR_execve              11
+#define __NR_chdir               12
+#define __NR_time                13
+#define __NR_mknod               14
+#define __NR_chmod               15
+#define __NR_lchown              16
+#define __NR_break               17
+#define __NR_oldstat             18
+#define __NR_lseek               19
+#define __NR_getpid              20
+#define __NR_mount               21
+#define __NR_umount              22
+#define __NR_setuid              23
+#define __NR_getuid              24
+#define __NR_stime               25
+#define __NR_ptrace              26
+#define __NR_alarm               27
+#define __NR_oldfstat            28
+#define __NR_pause               29
+#define __NR_utime               30
+#define __NR_stty                31
+#define __NR_gtty                32
+#define __NR_access              33
+#define __NR_nice                34
+#define __NR_ftime               35
+#define __NR_sync                36
+#define __NR_kill                37
+#define __NR_rename              38
+#define __NR_mkdir               39
+#define __NR_rmdir               40
+#define __NR_dup                 41
+#define __NR_pipe                42
+#define __NR_times               43
+#define __NR_prof                44
+#define __NR_brk                 45
+#define __NR_setgid              46
+#define __NR_getgid              47
+#define __NR_signal              48
+#define __NR_geteuid             49
+#define __NR_getegid             50
+#define __NR_acct                51
+#define __NR_umount2             52
+#define __NR_lock                53
+#define __NR_ioctl               54
+#define __NR_fcntl               55
+#define __NR_mpx                 56
+#define __NR_setpgid             57
+#define __NR_ulimit              58
+#define __NR_oldolduname         59
+#define __NR_umask               60
+#define __NR_chroot              61
+#define __NR_ustat               62
+#define __NR_dup2                63
+#define __NR_getppid             64
+#define __NR_getpgrp             65
+#define __NR_setsid              66
+#define __NR_sigaction           67
+#define __NR_sgetmask            68
+#define __NR_ssetmask            69
+#define __NR_setreuid            70
+#define __NR_setregid            71
+#define __NR_sigsuspend          72
+#define __NR_sigpending          73
+#define __NR_sethostname         74
+#define __NR_setrlimit           75
+#define __NR_getrlimit           76     /* Back compatible 2Gig limited rlimit */
+#define __NR_getrusage           77
+#define __NR_gettimeofday        78
+#define __NR_settimeofday        79
+#define __NR_getgroups           80
+#define __NR_setgroups           81
+#define __NR_select              82
+#define __NR_symlink             83
+#define __NR_oldlstat            84
+#define __NR_readlink            85
+#define __NR_uselib              86
+#define __NR_swapon              87
+#define __NR_reboot              88
+#define __NR_readdir             89
+#define __NR_mmap                90
+#define __NR_munmap              91
+#define __NR_truncate            92
+#define __NR_ftruncate           93
+#define __NR_fchmod              94
+#define __NR_fchown              95
+#define __NR_getpriority         96
+#define __NR_setpriority         97
+#define __NR_profil              98
+#define __NR_statfs              99
+#define __NR_fstatfs            100
+#define __NR_ioperm             101
+#define __NR_socketcall         102
+#define __NR_syslog             103
+#define __NR_setitimer          104
+#define __NR_getitimer          105
+#define __NR_stat               106
+#define __NR_lstat              107
+#define __NR_fstat              108
+#define __NR_olduname           109
+#define __NR_iopl               110
+#define __NR_vhangup            111
+#define __NR_idle               112
+#define __NR_vm86old            113
+#define __NR_wait4              114
+#define __NR_swapoff            115
+#define __NR_sysinfo            116
+#define __NR_ipc                117
+#define __NR_fsync              118
+#define __NR_sigreturn          119
+#define __NR_clone              120
+#define __NR_setdomainname      121
+#define __NR_uname              122
+#define __NR_cacheflush         123
+#define __NR_adjtimex           124
+#define __NR_mprotect           125
+#define __NR_sigprocmask        126
+#define __NR_create_module      127
+#define __NR_init_module        128
+#define __NR_delete_module      129
+#define __NR_get_kernel_syms    130
+#define __NR_quotactl           131
+#define __NR_getpgid            132
+#define __NR_fchdir             133
+#define __NR_bdflush            134
+#define __NR_sysfs              135
+#define __NR_personality        136
+#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
+#define __NR_setfsuid           138
+#define __NR_setfsgid           139
+#define __NR__llseek            140
+#define __NR_getdents           141
+#define __NR__newselect         142
+#define __NR_flock              143
+#define __NR_msync              144
+#define __NR_readv              145
+#define __NR_writev             146
+#define __NR_getsid             147
+#define __NR_fdatasync          148
+#define __NR__sysctl            149
+#define __NR_mlock              150
+#define __NR_munlock            151
+#define __NR_mlockall           152
+#define __NR_munlockall         153
+#define __NR_sched_setparam             154
+#define __NR_sched_getparam             155
+#define __NR_sched_setscheduler         156
+#define __NR_sched_getscheduler         157
+#define __NR_sched_yield                158
+#define __NR_sched_get_priority_max     159
+#define __NR_sched_get_priority_min     160
+#define __NR_sched_rr_get_interval      161
+#define __NR_nanosleep          162
+#define __NR_mremap             163
+#define __NR_setresuid          164
+#define __NR_getresuid          165
+#define __NR_vm86               166
+#define __NR_query_module       167
+#define __NR_poll               168
+#define __NR_nfsservctl         169
+#define __NR_setresgid          170
+#define __NR_getresgid          171
+#define __NR_prctl              172
+#define __NR_rt_sigreturn       173
+#define __NR_rt_sigaction       174
+#define __NR_rt_sigprocmask     175
+#define __NR_rt_sigpending      176
+#define __NR_rt_sigtimedwait    177
+#define __NR_rt_sigqueueinfo    178
+#define __NR_rt_sigsuspend      179
+#define __NR_pread64            180
+#define __NR_pwrite64           181
+#define __NR_chown              182
+#define __NR_getcwd             183
+#define __NR_capget             184
+#define __NR_capset             185
+#define __NR_sigaltstack        186
+#define __NR_sendfile           187
+#define __NR_streams1           188     /* some people actually want it */
+#define __NR_streams2           189     /* some people actually want it */
+#define __NR_vfork              190
+#define __NR_ugetrlimit         191     /* SuS compliant getrlimit */
+#define __NR_mmap2              192
+#define __NR_truncate64         193
+#define __NR_ftruncate64        194
+#define __NR_stat64             195
+#define __NR_lstat64            196
+#define __NR_fstat64            197
+#define __NR_lchown32           198
+#define __NR_getuid32           199
+#define __NR_getgid32           200
+#define __NR_geteuid32          201
+#define __NR_getegid32          202
+#define __NR_setreuid32         203
+#define __NR_setregid32         204
+#define __NR_getgroups32        205
+#define __NR_setgroups32        206
+#define __NR_fchown32           207
+#define __NR_setresuid32        208
+#define __NR_getresuid32        209
+#define __NR_setresgid32        210
+#define __NR_getresgid32        211
+#define __NR_chown32            212
+#define __NR_setuid32           213
+#define __NR_setgid32           214
+#define __NR_setfsuid32         215
+#define __NR_setfsgid32         216
+#define __NR_pivot_root         217
+#define __NR_mincore            218
+#define __NR_madvise            219
+#define __NR_getdents64         220
+#define __NR_fcntl64            221
+/* 223 is unused */
+#define __NR_gettid             224
+#define __NR_readahead          225
+#define __NR_setxattr           226
+#define __NR_lsetxattr          227
+#define __NR_fsetxattr          228
+#define __NR_getxattr           229
+#define __NR_lgetxattr          230
+#define __NR_fgetxattr          231
+#define __NR_listxattr          232
+#define __NR_llistxattr         233
+#define __NR_flistxattr         234
+#define __NR_removexattr        235
+#define __NR_lremovexattr       236
+#define __NR_fremovexattr       237
+#define __NR_tkill              238
+#define __NR_sendfile64         239
+#define __NR_futex              240
+#define __NR_sched_setaffinity  241
+#define __NR_sched_getaffinity  242
+#define __NR_set_thread_area    243
+#define __NR_get_thread_area    244
+#define __NR_io_setup           245
+#define __NR_io_destroy         246
+#define __NR_io_getevents       247
+#define __NR_io_submit          248
+#define __NR_io_cancel          249
+#define __NR_fadvise64          250
+
+#define __NR_exit_group         252
+#define __NR_lookup_dcookie     253
+#define __NR_epoll_create       254
+#define __NR_epoll_ctl          255
+#define __NR_epoll_wait         256
+#define __NR_remap_file_pages   257
+#define __NR_set_tid_address    258
+#define __NR_timer_create       259
+#define __NR_timer_settime      (__NR_timer_create+1)
+#define __NR_timer_gettime      (__NR_timer_create+2)
+#define __NR_timer_getoverrun   (__NR_timer_create+3)
+#define __NR_timer_delete       (__NR_timer_create+4)
+#define __NR_clock_settime      (__NR_timer_create+5)
+#define __NR_clock_gettime      (__NR_timer_create+6)
+#define __NR_clock_getres       (__NR_timer_create+7)
+#define __NR_clock_nanosleep    (__NR_timer_create+8)
+#define __NR_statfs64           268
+#define __NR_fstatfs64          269
+#define __NR_tgkill             270
+#define __NR_utimes             271
+#define __NR_fadvise64_64       272
+#define __NR_vserver            273
+#define __NR_mbind              274
+#define __NR_get_mempolicy      275
+#define __NR_set_mempolicy      276
+#define __NR_mq_open            277
+#define __NR_mq_unlink          (__NR_mq_open+1)
+#define __NR_mq_timedsend       (__NR_mq_open+2)
+#define __NR_mq_timedreceive    (__NR_mq_open+3)
+#define __NR_mq_notify          (__NR_mq_open+4)
+#define __NR_mq_getsetattr      (__NR_mq_open+5)
+#define __NR_kexec_load         283
+#define __NR_waitid             284
+#define __NR_add_key            285
+#define __NR_request_key        286
+#define __NR_keyctl             287
+#define __NR_ioprio_set         288
+#define __NR_ioprio_get         289
+#define __NR_inotify_init       290
+#define __NR_inotify_add_watch  291
+#define __NR_inotify_rm_watch   292
+/* 293 is unused */
+#define __NR_migrate_pages      294
+#define __NR_openat             295
+#define __NR_mkdirat            296
+#define __NR_mknodat            297
+#define __NR_fchownat           298
+#define __NR_futimesat          299
+#define __NR_fstatat64          300
+#define __NR_unlinkat           301
+#define __NR_renameat           302
+#define __NR_linkat             303
+#define __NR_symlinkat          304
+#define __NR_readlinkat         305
+#define __NR_fchmodat           306
+#define __NR_faccessat          307
+#define __NR_pselect6           308
+#define __NR_ppoll              309
+#define __NR_unshare            310
+#define __NR_set_robust_list    311
+#define __NR_get_robust_list    312
+#define __NR_splice             313
+#define __NR_sync_file_range    314
+#define __NR_tee                315
+#define __NR_vmsplice           316
+#define __NR_move_pages         317
+#define __NR_getcpu             318
+#define __NR_epoll_pwait        319
+#define __NR_utimensat          320
+#define __NR_signalfd           321
+#define __NR_timerfd_create     322
+#define __NR_eventfd            323
+#define __NR_fallocate          324
+#define __NR_timerfd_settime    325
+#define __NR_timerfd_gettime    326
+#define __NR_signalfd4          327
+#define __NR_eventfd2           328
+#define __NR_epoll_create1      329
+#define __NR_dup3               330
+#define __NR_pipe2              331
+#define __NR_inotify_init1      332
+#define __NR_preadv             333
+#define __NR_pwritev            334
+#define __NR_rt_tgsigqueueinfo  335
+#define __NR_perf_event_open    336
+#define __NR_fanotify_init      337
+#define __NR_fanotify_mark      338
+#define __NR_prlimit64          339
+
+/* Non-multiplexed socket family */
+#define __NR_socket             340
+#define __NR_bind               341
+#define __NR_connect            342
+#define __NR_listen             343
+#define __NR_accept             344
+#define __NR_getsockname        345
+#define __NR_getpeername        346
+#define __NR_socketpair         347
+#define __NR_send               348
+#define __NR_sendto             349
+#define __NR_recv               350
+#define __NR_recvfrom           351
+#define __NR_shutdown           352
+#define __NR_setsockopt         353
+#define __NR_getsockopt         354
+#define __NR_sendmsg            355
+#define __NR_recvmsg            356
+#define __NR_recvmmsg           357
+#define __NR_accept4            358
+#define __NR_name_to_handle_at  359
+#define __NR_open_by_handle_at  360
+#define __NR_clock_adjtime      361
+#define __NR_syncfs             362
+#define __NR_sendmmsg           363
+#define __NR_setns              364
+
+#define NR_syscalls 365
+
+#ifdef __KERNEL__
+
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_OLD_STAT
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#ifndef cond_syscall
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+#endif
+
+#endif /* __KERNEL__ */
+#endif /* __ASM_SH_UNISTD_H */
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
new file mode 100644
index 00000000000..ec9898665f2
--- /dev/null
+++ b/arch/sh/include/asm/unistd_64.h
@@ -0,0 +1,440 @@
+#ifndef __ASM_SH_UNISTD_64_H
+#define __ASM_SH_UNISTD_64_H
+
+/*
+ * include/asm-sh/unistd_64.h
+ *
+ * This file contains the system call numbers.
+ *
+ * Copyright (C) 2000, 2001  Paolo Alberelli
+ * Copyright (C) 2003 - 2007 Paul Mundt
+ * Copyright (C) 2004  Sean McGoogan
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#define __NR_restart_syscall      0
+#define __NR_exit                 1
+#define __NR_fork                 2
+#define __NR_read                 3
+#define __NR_write                4
+#define __NR_open                 5
+#define __NR_close                6
+#define __NR_waitpid              7
+#define __NR_creat                8
+#define __NR_link                 9
+#define __NR_unlink              10
+#define __NR_execve              11
+#define __NR_chdir               12
+#define __NR_time                13
+#define __NR_mknod               14
+#define __NR_chmod               15
+#define __NR_lchown              16
+#define __NR_break               17
+#define __NR_oldstat             18
+#define __NR_lseek               19
+#define __NR_getpid              20
+#define __NR_mount               21
+#define __NR_umount              22
+#define __NR_setuid              23
+#define __NR_getuid              24
+#define __NR_stime               25
+#define __NR_ptrace              26
+#define __NR_alarm               27
+#define __NR_oldfstat            28
+#define __NR_pause               29
+#define __NR_utime               30
+#define __NR_stty                31
+#define __NR_gtty                32
+#define __NR_access              33
+#define __NR_nice                34
+#define __NR_ftime               35
+#define __NR_sync                36
+#define __NR_kill                37
+#define __NR_rename              38
+#define __NR_mkdir               39
+#define __NR_rmdir               40
+#define __NR_dup                 41
+#define __NR_pipe                42
+#define __NR_times               43
+#define __NR_prof                44
+#define __NR_brk                 45
+#define __NR_setgid              46
+#define __NR_getgid              47
+#define __NR_signal              48
+#define __NR_geteuid             49
+#define __NR_getegid             50
+#define __NR_acct                51
+#define __NR_umount2             52
+#define __NR_lock                53
+#define __NR_ioctl               54
+#define __NR_fcntl               55
+#define __NR_mpx                 56
+#define __NR_setpgid             57
+#define __NR_ulimit              58
+#define __NR_oldolduname         59
+#define __NR_umask               60
+#define __NR_chroot              61
+#define __NR_ustat               62
+#define __NR_dup2                63
+#define __NR_getppid             64
+#define __NR_getpgrp             65
+#define __NR_setsid              66
+#define __NR_sigaction           67
+#define __NR_sgetmask            68
+#define __NR_ssetmask            69
+#define __NR_setreuid            70
+#define __NR_setregid            71
+#define __NR_sigsuspend          72
+#define __NR_sigpending          73
+#define __NR_sethostname         74
+#define __NR_setrlimit           75
+#define __NR_getrlimit           76     /* Back compatible 2Gig limited rlimit */
+#define __NR_getrusage           77
+#define __NR_gettimeofday        78
+#define __NR_settimeofday        79
+#define __NR_getgroups           80
+#define __NR_setgroups           81
+#define __NR_select              82
+#define __NR_symlink             83
+#define __NR_oldlstat            84
+#define __NR_readlink            85
+#define __NR_uselib              86
+#define __NR_swapon              87
+#define __NR_reboot              88
+#define __NR_readdir             89
+#define __NR_mmap                90
+#define __NR_munmap              91
+#define __NR_truncate            92
+#define __NR_ftruncate           93
+#define __NR_fchmod              94
+#define __NR_fchown              95
+#define __NR_getpriority         96
+#define __NR_setpriority         97
+#define __NR_profil              98
+#define __NR_statfs              99
+#define __NR_fstatfs            100
+#define __NR_ioperm             101
+#define __NR_socketcall         102     /* old implementation of socket systemcall */
+#define __NR_syslog             103
+#define __NR_setitimer          104
+#define __NR_getitimer          105
+#define __NR_stat               106
+#define __NR_lstat              107
+#define __NR_fstat              108
+#define __NR_olduname           109
+#define __NR_iopl               110
+#define __NR_vhangup            111
+#define __NR_idle               112
+#define __NR_vm86old            113
+#define __NR_wait4              114
+#define __NR_swapoff            115
+#define __NR_sysinfo            116
+#define __NR_ipc                117
+#define __NR_fsync              118
+#define __NR_sigreturn          119
+#define __NR_clone              120
+#define __NR_setdomainname      121
+#define __NR_uname              122
+#define __NR_cacheflush         123
+#define __NR_adjtimex           124
+#define __NR_mprotect           125
+#define __NR_sigprocmask        126
+#define __NR_create_module      127
+#define __NR_init_module        128
+#define __NR_delete_module      129
+#define __NR_get_kernel_syms    130
+#define __NR_quotactl           131
+#define __NR_getpgid            132
+#define __NR_fchdir             133
+#define __NR_bdflush            134
+#define __NR_sysfs              135
+#define __NR_personality        136
+#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
+#define __NR_setfsuid           138
+#define __NR_setfsgid           139
+#define __NR__llseek            140
+#define __NR_getdents           141
+#define __NR__newselect         142
+#define __NR_flock              143
+#define __NR_msync              144
+#define __NR_readv              145
+#define __NR_writev             146
+#define __NR_getsid             147
+#define __NR_fdatasync          148
+#define __NR__sysctl            149
+#define __NR_mlock              150
+#define __NR_munlock            151
+#define __NR_mlockall           152
+#define __NR_munlockall         153
+#define __NR_sched_setparam             154
+#define __NR_sched_getparam             155
+#define __NR_sched_setscheduler         156
+#define __NR_sched_getscheduler         157
+#define __NR_sched_yield                158
+#define __NR_sched_get_priority_max     159
+#define __NR_sched_get_priority_min     160
+#define __NR_sched_rr_get_interval      161
+#define __NR_nanosleep          162
+#define __NR_mremap             163
+#define __NR_setresuid          164
+#define __NR_getresuid          165
+#define __NR_vm86               166
+#define __NR_query_module       167
+#define __NR_poll               168
+#define __NR_nfsservctl         169
+#define __NR_setresgid          170
+#define __NR_getresgid          171
+#define __NR_prctl              172
+#define __NR_rt_sigreturn       173
+#define __NR_rt_sigaction       174
+#define __NR_rt_sigprocmask     175
+#define __NR_rt_sigpending      176
+#define __NR_rt_sigtimedwait    177
+#define __NR_rt_sigqueueinfo    178
+#define __NR_rt_sigsuspend      179
+#define __NR_pread64            180
+#define __NR_pwrite64           181
+#define __NR_chown              182
+#define __NR_getcwd             183
+#define __NR_capget             184
+#define __NR_capset             185
+#define __NR_sigaltstack        186
+#define __NR_sendfile           187
+#define __NR_streams1           188     /* some people actually want it */
+#define __NR_streams2           189     /* some people actually want it */
+#define __NR_vfork              190
+#define __NR_ugetrlimit         191     /* SuS compliant getrlimit */
+#define __NR_mmap2              192
+#define __NR_truncate64         193
+#define __NR_ftruncate64        194
+#define __NR_stat64             195
+#define __NR_lstat64            196
+#define __NR_fstat64            197
+#define __NR_lchown32           198
+#define __NR_getuid32           199
+#define __NR_getgid32           200
+#define __NR_geteuid32          201
+#define __NR_getegid32          202
+#define __NR_setreuid32         203
+#define __NR_setregid32         204
+#define __NR_getgroups32        205
+#define __NR_setgroups32        206
+#define __NR_fchown32           207
+#define __NR_setresuid32        208
+#define __NR_getresuid32        209
+#define __NR_setresgid32        210
+#define __NR_getresgid32        211
+#define __NR_chown32            212
+#define __NR_setuid32           213
+#define __NR_setgid32           214
+#define __NR_setfsuid32         215
+#define __NR_setfsgid32         216
+#define __NR_pivot_root         217
+#define __NR_mincore            218
+#define __NR_madvise            219
+
+/* Non-multiplexed socket family */
+#define __NR_socket             220
+#define __NR_bind               221
+#define __NR_connect            222
+#define __NR_listen             223
+#define __NR_accept             224
+#define __NR_getsockname        225
+#define __NR_getpeername        226
+#define __NR_socketpair         227
+#define __NR_send               228
+#define __NR_sendto             229
+#define __NR_recv               230
+#define __NR_recvfrom           231
+#define __NR_shutdown           232
+#define __NR_setsockopt         233
+#define __NR_getsockopt         234
+#define __NR_sendmsg            235
+#define __NR_recvmsg            236
+
+/* Non-multiplexed IPC family */
+#define __NR_semop              237
+#define __NR_semget             238
+#define __NR_semctl             239
+#define __NR_msgsnd             240
+#define __NR_msgrcv             241
+#define __NR_msgget             242
+#define __NR_msgctl             243
+#if 0
+#define __NR_shmatcall          244
+#endif
+#define __NR_shmdt              245
+#define __NR_shmget             246
+#define __NR_shmctl             247
+
+#define __NR_getdents64         248
+#define __NR_fcntl64            249
+/* 223 is unused */
+#define __NR_gettid             252
+#define __NR_readahead          253
+#define __NR_setxattr           254
+#define __NR_lsetxattr          255
+#define __NR_fsetxattr          256
+#define __NR_getxattr           257
+#define __NR_lgetxattr          258
+#define __NR_fgetxattr          269
+#define __NR_listxattr          260
+#define __NR_llistxattr         261
+#define __NR_flistxattr         262
+#define __NR_removexattr        263
+#define __NR_lremovexattr       264
+#define __NR_fremovexattr       265
+#define __NR_tkill              266
+#define __NR_sendfile64         267
+#define __NR_futex              268
+#define __NR_sched_setaffinity  269
+#define __NR_sched_getaffinity  270
+#define __NR_set_thread_area    271
+#define __NR_get_thread_area    272
+#define __NR_io_setup           273
+#define __NR_io_destroy         274
+#define __NR_io_getevents       275
+#define __NR_io_submit          276
+#define __NR_io_cancel          277
+#define __NR_fadvise64          278
+#define __NR_exit_group         280
+
+#define __NR_lookup_dcookie     281
+#define __NR_epoll_create       282
+#define __NR_epoll_ctl          283
+#define __NR_epoll_wait         284
+#define __NR_remap_file_pages   285
+#define __NR_set_tid_address    286
+#define __NR_timer_create       287
+#define __NR_timer_settime      (__NR_timer_create+1)
+#define __NR_timer_gettime      (__NR_timer_create+2)
+#define __NR_timer_getoverrun   (__NR_timer_create+3)
+#define __NR_timer_delete       (__NR_timer_create+4)
+#define __NR_clock_settime      (__NR_timer_create+5)
+#define __NR_clock_gettime      (__NR_timer_create+6)
+#define __NR_clock_getres       (__NR_timer_create+7)
+#define __NR_clock_nanosleep    (__NR_timer_create+8)
+#define __NR_statfs64           296
+#define __NR_fstatfs64          297
+#define __NR_tgkill             298
+#define __NR_utimes             299
+#define __NR_fadvise64_64       300
+#define __NR_vserver            301
+#define __NR_mbind              302
+#define __NR_get_mempolicy      303
+#define __NR_set_mempolicy      304
+#define __NR_mq_open            305
+#define __NR_mq_unlink          (__NR_mq_open+1)
+#define __NR_mq_timedsend       (__NR_mq_open+2)
+#define __NR_mq_timedreceive    (__NR_mq_open+3)
+#define __NR_mq_notify          (__NR_mq_open+4)
+#define __NR_mq_getsetattr      (__NR_mq_open+5)
+#define __NR_kexec_load         311
+#define __NR_waitid             312
+#define __NR_add_key            313
+#define __NR_request_key        314
+#define __NR_keyctl             315
+#define __NR_ioprio_set         316
+#define __NR_ioprio_get         317
+#define __NR_inotify_init       318
+#define __NR_inotify_add_watch  319
+#define __NR_inotify_rm_watch   320
+/* 321 is unused */
+#define __NR_migrate_pages      322
+#define __NR_openat             323
+#define __NR_mkdirat            324
+#define __NR_mknodat            325
+#define __NR_fchownat           326
+#define __NR_futimesat          327
+#define __NR_fstatat64          328
+#define __NR_unlinkat           329
+#define __NR_renameat           330
+#define __NR_linkat             331
+#define __NR_symlinkat          332
+#define __NR_readlinkat         333
+#define __NR_fchmodat           334
+#define __NR_faccessat          335
+#define __NR_pselect6           336
+#define __NR_ppoll              337
+#define __NR_unshare            338
+#define __NR_set_robust_list    339
+#define __NR_get_robust_list    340
+#define __NR_splice             341
+#define __NR_sync_file_range    342
+#define __NR_tee                343
+#define __NR_vmsplice           344
+#define __NR_move_pages         345
+#define __NR_getcpu             346
+#define __NR_epoll_pwait        347
+#define __NR_utimensat          348
+#define __NR_signalfd           349
+#define __NR_timerfd_create     350
+#define __NR_eventfd            351
+#define __NR_fallocate          352
+#define __NR_timerfd_settime    353
+#define __NR_timerfd_gettime    354
+#define __NR_signalfd4          355
+#define __NR_eventfd2           356
+#define __NR_epoll_create1      357
+#define __NR_dup3               358
+#define __NR_pipe2              359
+#define __NR_inotify_init1      360
+#define __NR_preadv             361
+#define __NR_pwritev            362
+#define __NR_rt_tgsigqueueinfo  363
+#define __NR_perf_event_open    364
+#define __NR_recvmmsg           365
+#define __NR_accept4            366
+#define __NR_fanotify_init      367
+#define __NR_fanotify_mark      368
+#define __NR_prlimit64          369
+#define __NR_name_to_handle_at  370
+#define __NR_open_by_handle_at  371
+#define __NR_clock_adjtime      372
+#define __NR_syncfs             373
+#define __NR_sendmmsg           374
+#define __NR_setns              375
+
+#ifdef __KERNEL__
+
+#define NR_syscalls 376
+
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_OLD_STAT
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#ifndef cond_syscall
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+#endif
+
+#endif /* __KERNEL__ */
+#endif /* __ASM_SH_UNISTD_64_H */
diff --git a/arch/sh/include/asm/xor.h b/arch/sh/include/asm/xor.h
new file mode 100644
index 00000000000..c82eb12a5b1
--- /dev/null
+++ b/arch/sh/include/asm/xor.h
@@ -0,0 +1 @@
+#include <asm-generic/xor.h>
diff --git a/arch/sh/include/cpu-sh2/cpu/dma.h b/arch/sh/include/cpu-sh2/cpu/dma.h
new file mode 100644
index 00000000000..d66b43cdc63
--- /dev/null
+++ b/arch/sh/include/cpu-sh2/cpu/dma.h
@@ -0,0 +1,23 @@
+/*
+ * Definitions for the SH-2 DMAC.
+ *
+ * Copyright (C) 2003  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_CPU_SH2_DMA_H
+#define __ASM_CPU_SH2_DMA_H
+
+#define SH_MAX_DMA_CHANNELS     2
+
+#define SAR     ((unsigned long[]){ 0xffffff80, 0xffffff90 })
+#define DAR     ((unsigned long[]){ 0xffffff84, 0xffffff94 })
+#define DMATCR  ((unsigned long[]){ 0xffffff88, 0xffffff98 })
+#define CHCR    ((unsigned long[]){ 0xfffffffc, 0xffffff9c })
+
+#define DMAOR   0xffffffb0
+
+#endif /* __ASM_CPU_SH2_DMA_H */
+
diff --git a/arch/sh/include/cpu-sh2a/cpu/dma.h b/arch/sh/include/cpu-sh2a/cpu/dma.h
new file mode 100644
index 00000000000..27a13ef4fdf
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/dma.h
@@ -0,0 +1 @@
+#include <cpu-sh2/cpu/dma.h>
diff --git a/arch/sh/include/cpu-sh2a/cpu/ubc.h b/arch/sh/include/cpu-sh2a/cpu/ubc.h
new file mode 100644
index 00000000000..1192e1c761a
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/ubc.h
@@ -0,0 +1,28 @@
+/*
+ * SH-2A UBC definitions
+ *
+ * Copyright (C) 2008 Kieran Bingham
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ASM_CPU_SH2A_UBC_H
+#define __ASM_CPU_SH2A_UBC_H
+
+#define UBC_BARA                0xfffc0400
+#define UBC_BAMRA               0xfffc0404
+#define UBC_BBRA                0xfffc04a0      /* 16 bit access */
+#define UBC_BDRA                0xfffc0408
+#define UBC_BDMRA               0xfffc040c
+
+#define UBC_BARB                0xfffc0410
+#define UBC_BAMRB               0xfffc0414
+#define UBC_BBRB                0xfffc04b0      /* 16 bit access */
+#define UBC_BDRB                0xfffc0418
+#define UBC_BDMRB               0xfffc041c
+
+#define UBC_BRCR                0xfffc04c0
+
+#endif /* __ASM_CPU_SH2A_UBC_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
new file mode 100644
index 00000000000..9647e681fd2
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
@@ -0,0 +1,83 @@
+#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H
+#define __ASM_SH_CPU_SH4_DMA_SH7780_H
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7730)
+#define DMTE0_IRQ       48
+#define DMTE4_IRQ       76
+#define DMAE0_IRQ       78      /* DMA Error IRQ*/
+#define SH_DMAC_BASE0   0xFE008020
+#define SH_DMARS_BASE0  0xFE009000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
+#define DMTE0_IRQ       48
+#define DMTE4_IRQ       76
+#define DMAE0_IRQ       78      /* DMA Error IRQ*/
+#define SH_DMAC_BASE0   0xFE008020
+#define SH_DMARS_BASE0  0xFE009000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7764)
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMAE0_IRQ       38
+#define SH_DMAC_BASE0   0xFF608020
+#define SH_DMARS_BASE0  0xFF609000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
+#define DMTE0_IRQ       48      /* DMAC0A*/
+#define DMTE4_IRQ       76      /* DMAC0B */
+#define DMTE6_IRQ       40
+#define DMTE8_IRQ       42      /* DMAC1A */
+#define DMTE9_IRQ       43
+#define DMTE10_IRQ      72      /* DMAC1B */
+#define DMTE11_IRQ      73
+#define DMAE0_IRQ       78      /* DMA Error IRQ*/
+#define DMAE1_IRQ       74      /* DMA Error IRQ*/
+#define SH_DMAC_BASE0   0xFE008020
+#define SH_DMAC_BASE1   0xFDC08020
+#define SH_DMARS_BASE0  0xFDC09000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
+#define DMTE0_IRQ       48      /* DMAC0A*/
+#define DMTE4_IRQ       76      /* DMAC0B */
+#define DMTE6_IRQ       40
+#define DMTE8_IRQ       42      /* DMAC1A */
+#define DMTE9_IRQ       43
+#define DMTE10_IRQ      72      /* DMAC1B */
+#define DMTE11_IRQ      73
+#define DMAE0_IRQ       78      /* DMA Error IRQ*/
+#define DMAE1_IRQ       74      /* DMA Error IRQ*/
+#define SH_DMAC_BASE0   0xFE008020
+#define SH_DMAC_BASE1   0xFDC08020
+#define SH_DMARS_BASE0  0xFE009000
+#define SH_DMARS_BASE1  0xFDC09000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMTE6_IRQ       46
+#define DMTE8_IRQ       92
+#define DMTE9_IRQ       93
+#define DMTE10_IRQ      94
+#define DMTE11_IRQ      95
+#define DMAE0_IRQ       38      /* DMA Error IRQ */
+#define SH_DMAC_BASE0   0xFC808020
+#define SH_DMAC_BASE1   0xFC818020
+#define SH_DMARS_BASE0  0xFC809000
+#else /* SH7785 */
+#define DMTE0_IRQ       33
+#define DMTE4_IRQ       37
+#define DMTE6_IRQ       52
+#define DMTE8_IRQ       54
+#define DMTE9_IRQ       55
+#define DMTE10_IRQ      56
+#define DMTE11_IRQ      57
+#define DMAE0_IRQ       39      /* DMA Error IRQ0 */
+#define DMAE1_IRQ       58      /* DMA Error IRQ1 */
+#define SH_DMAC_BASE0   0xFC808020
+#define SH_DMAC_BASE1   0xFCC08020
+#define SH_DMARS_BASE0  0xFC809000
+#endif
+
+#define REQ_HE          0x000000C0
+#define REQ_H           0x00000080
+#define REQ_LE          0x00000040
+#define TM_BURST        0x00000020
+
+#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/cpu-sh5/cpu/dma.h b/arch/sh/include/cpu-sh5/cpu/dma.h
new file mode 100644
index 00000000000..7bf6bb3d35e
--- /dev/null
+++ b/arch/sh/include/cpu-sh5/cpu/dma.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_SH_CPU_SH5_DMA_H
+#define __ASM_SH_CPU_SH5_DMA_H
+
+/* Nothing yet */
+
+#endif /* __ASM_SH_CPU_SH5_DMA_H */
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c
new file mode 100644
index 00000000000..3e985aae5d9
--- /dev/null
+++ b/arch/sh/kernel/cpu/hwblk.c
@@ -0,0 +1,159 @@
+#include <linux/clk.h>
+#include <linux/compiler.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <asm/suspend.h>
+#include <asm/hwblk.h>
+#include <asm/clock.h>
+
+static DEFINE_SPINLOCK(hwblk_lock);
+
+static void hwblk_area_mod_cnt(struct hwblk_info *info,
+                               int area, int counter, int value, int goal)
+{
+        struct hwblk_area *hap = info->areas + area;
+
+        hap->cnt[counter] += value;
+
+        if (hap->cnt[counter] != goal)
+                return;
+
+        if (hap->flags & HWBLK_AREA_FLAG_PARENT)
+                hwblk_area_mod_cnt(info, hap->parent, counter, value, goal);
+}
+
+
+static int __hwblk_mod_cnt(struct hwblk_info *info, int hwblk,
+                          int counter, int value, int goal)
+{
+        struct hwblk *hp = info->hwblks + hwblk;
+
+        hp->cnt[counter] += value;
+        if (hp->cnt[counter] == goal)
+                hwblk_area_mod_cnt(info, hp->area, counter, value, goal);
+
+        return hp->cnt[counter];
+}
+
+static void hwblk_mod_cnt(struct hwblk_info *info, int hwblk,
+                          int counter, int value, int goal)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&hwblk_lock, flags);
+        __hwblk_mod_cnt(info, hwblk, counter, value, goal);
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+}
+
+void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int counter)
+{
+        hwblk_mod_cnt(info, hwblk, counter, 1, 1);
+}
+
+void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int counter)
+{
+        hwblk_mod_cnt(info, hwblk, counter, -1, 0);
+}
+
+void hwblk_enable(struct hwblk_info *info, int hwblk)
+{
+        struct hwblk *hp = info->hwblks + hwblk;
+        unsigned long tmp;
+        unsigned long flags;
+        int ret;
+
+        spin_lock_irqsave(&hwblk_lock, flags);
+
+        ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, 1, 1);
+        if (ret == 1) {
+                tmp = __raw_readl(hp->mstp);
+                tmp &= ~(1 << hp->bit);
+                __raw_writel(tmp, hp->mstp);
+        }
+
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+}
+
+void hwblk_disable(struct hwblk_info *info, int hwblk)
+{
+        struct hwblk *hp = info->hwblks + hwblk;
+        unsigned long tmp;
+        unsigned long flags;
+        int ret;
+
+        spin_lock_irqsave(&hwblk_lock, flags);
+
+        ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, -1, 0);
+        if (ret == 0) {
+                tmp = __raw_readl(hp->mstp);
+                tmp |= 1 << hp->bit;
+                __raw_writel(tmp, hp->mstp);
+        }
+
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+}
+
+struct hwblk_info *hwblk_info;
+
+int __init hwblk_register(struct hwblk_info *info)
+{
+        hwblk_info = info;
+        return 0;
+}
+
+int __init __weak arch_hwblk_init(void)
+{
+        return 0;
+}
+
+int __weak arch_hwblk_sleep_mode(void)
+{
+        return SUSP_SH_SLEEP;
+}
+
+int __init hwblk_init(void)
+{
+        return arch_hwblk_init();
+}
+
+/* allow clocks to enable and disable hardware blocks */
+static int sh_hwblk_clk_enable(struct clk *clk)
+{
+        if (!hwblk_info)
+                return -ENOENT;
+
+        hwblk_enable(hwblk_info, clk->arch_flags);
+        return 0;
+}
+
+static void sh_hwblk_clk_disable(struct clk *clk)
+{
+        if (hwblk_info)
+                hwblk_disable(hwblk_info, clk->arch_flags);
+}
+
+static struct clk_ops sh_hwblk_clk_ops = {
+        .enable         = sh_hwblk_clk_enable,
+        .disable        = sh_hwblk_clk_disable,
+        .recalc         = followparent_recalc,
+};
+
+int __init sh_hwblk_clk_register(struct clk *clks, int nr)
+{
+        struct clk *clkp;
+        int ret = 0;
+        int k;
+
+        for (k = 0; !ret && (k < nr); k++) {
+                clkp = clks + k;
+
+                /* skip over clocks using hwblk 0 (HWBLK_UNKNOWN) */
+                if (!clkp->arch_flags)
+                        continue;
+
+                clkp->ops = &sh_hwblk_clk_ops;
+                ret |= clk_register(clkp);
+        }
+
+        return ret;
+}
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
new file mode 100644
index 00000000000..a288b5d9234
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
@@ -0,0 +1,106 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
+ *
+ * SH7722 hardware block support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/suspend.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7722.h>
+
+/* SH7722 registers */
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+
+/* SH7722 Power Domains */
+enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
+static struct hwblk_area sh7722_hwblk_area[] = {
+        [CORE_AREA] = HWBLK_AREA(0, 0),
+        [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
+        [SUB_AREA] = HWBLK_AREA(0, 0),
+};
+
+/* Table mapping HWBLK to Module Stop Bit and Power Domain */
+static struct hwblk sh7722_hwblk[HWBLK_NR] = {
+        [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
+        [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
+        [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
+        [HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA),
+        [HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA),
+        [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
+        [HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
+        [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
+        [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
+        [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
+        [HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA),
+        [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
+        [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
+        [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
+        [HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA),
+        [HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA),
+        [HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA),
+        [HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA),
+        [HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
+        [HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
+
+        [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
+        [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
+
+        [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
+        [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
+        [HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA),
+        [HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA),
+        [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
+        [HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA),
+        [HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA),
+        [HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
+        [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
+        [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
+        [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
+        [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
+        [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
+        [HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
+        [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
+        [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
+};
+
+static struct hwblk_info sh7722_hwblk_info = {
+        .areas = sh7722_hwblk_area,
+        .nr_areas = ARRAY_SIZE(sh7722_hwblk_area),
+        .hwblks = sh7722_hwblk,
+        .nr_hwblks = ARRAY_SIZE(sh7722_hwblk),
+};
+
+int arch_hwblk_sleep_mode(void)
+{
+        if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_STANDBY | SUSP_SH_SF;
+
+        if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_SLEEP | SUSP_SH_SF;
+
+        return SUSP_SH_SLEEP;
+}
+
+int __init arch_hwblk_init(void)
+{
+        return hwblk_register(&sh7722_hwblk_info);
+}
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
new file mode 100644
index 00000000000..a7f4684d203
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
@@ -0,0 +1,117 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
+ *
+ * SH7723 hardware block support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/suspend.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7723.h>
+
+/* SH7723 registers */
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+
+/* SH7723 Power Domains */
+enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
+static struct hwblk_area sh7723_hwblk_area[] = {
+        [CORE_AREA] = HWBLK_AREA(0, 0),
+        [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
+        [SUB_AREA] = HWBLK_AREA(0, 0),
+};
+
+/* Table mapping HWBLK to Module Stop Bit and Power Domain */
+static struct hwblk sh7723_hwblk[HWBLK_NR] = {
+        [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
+        [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
+        [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
+        [HWBLK_L2C] = HWBLK(MSTPCR0, 28, CORE_AREA),
+        [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
+        [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
+        [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
+        [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
+        [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
+        [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
+        [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
+        [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
+        [HWBLK_SUBC] = HWBLK(MSTPCR0, 16, CORE_AREA),
+        [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
+        [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
+        [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
+        [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
+        [HWBLK_TMU1] = HWBLK(MSTPCR0, 11, CORE_AREA),
+        [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
+        [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
+        [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
+        [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
+        [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
+        [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
+        [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
+        [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
+        [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
+        [HWBLK_MERAM] = HWBLK(MSTPCR0, 0, CORE_AREA),
+
+        [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
+        [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
+
+        [HWBLK_ATAPI] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
+        [HWBLK_ADC] = HWBLK(MSTPCR2, 27, CORE_AREA),
+        [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
+        [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
+        [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
+        [HWBLK_ICB] = HWBLK(MSTPCR2, 21, CORE_AREA_BM),
+        [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
+        [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
+        [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
+        [HWBLK_USB] = HWBLK(MSTPCR2, 11, CORE_AREA),
+        [HWBLK_2DG] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
+        [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
+        [HWBLK_VEU2H1] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
+        [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
+        [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
+        [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
+        [HWBLK_VEU2H0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
+        [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
+        [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
+};
+
+static struct hwblk_info sh7723_hwblk_info = {
+        .areas = sh7723_hwblk_area,
+        .nr_areas = ARRAY_SIZE(sh7723_hwblk_area),
+        .hwblks = sh7723_hwblk,
+        .nr_hwblks = ARRAY_SIZE(sh7723_hwblk),
+};
+
+int arch_hwblk_sleep_mode(void)
+{
+        if (!sh7723_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_STANDBY | SUSP_SH_SF;
+
+        if (!sh7723_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_SLEEP | SUSP_SH_SF;
+
+        return SUSP_SH_SLEEP;
+}
+
+int __init arch_hwblk_init(void)
+{
+        return hwblk_register(&sh7723_hwblk_info);
+}
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
new file mode 100644
index 00000000000..1613ad6013c
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
@@ -0,0 +1,121 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
+ *
+ * SH7724 hardware block support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/suspend.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7724.h>
+
+/* SH7724 registers */
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+
+/* SH7724 Power Domains */
+enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
+static struct hwblk_area sh7724_hwblk_area[] = {
+        [CORE_AREA] = HWBLK_AREA(0, 0),
+        [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
+        [SUB_AREA] = HWBLK_AREA(0, 0),
+};
+
+/* Table mapping HWBLK to Module Stop Bit and Power Domain */
+static struct hwblk sh7724_hwblk[HWBLK_NR] = {
+        [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
+        [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
+        [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
+        [HWBLK_RSMEM] = HWBLK(MSTPCR0, 28, CORE_AREA),
+        [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
+        [HWBLK_L2C] = HWBLK(MSTPCR0, 26, CORE_AREA),
+        [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
+        [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
+        [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
+        [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
+        [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
+        [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
+        [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
+        [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
+        [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
+        [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
+        [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
+        [HWBLK_TMU1] = HWBLK(MSTPCR0, 10, CORE_AREA),
+        [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
+        [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
+        [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
+        [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
+        [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
+        [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
+        [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
+        [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
+
+        [HWBLK_KEYSC] = HWBLK(MSTPCR1, 12, SUB_AREA),
+        [HWBLK_RTC] = HWBLK(MSTPCR1, 11, SUB_AREA),
+        [HWBLK_IIC0] = HWBLK(MSTPCR1, 9, CORE_AREA),
+        [HWBLK_IIC1] = HWBLK(MSTPCR1, 8, CORE_AREA),
+
+        [HWBLK_MMC] = HWBLK(MSTPCR2, 29, CORE_AREA),
+        [HWBLK_ETHER] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
+        [HWBLK_ATAPI] = HWBLK(MSTPCR2, 26, CORE_AREA_BM),
+        [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
+        [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
+        [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
+        [HWBLK_USB1] = HWBLK(MSTPCR2, 21, CORE_AREA),
+        [HWBLK_USB0] = HWBLK(MSTPCR2, 20, CORE_AREA),
+        [HWBLK_2DG] = HWBLK(MSTPCR2, 19, CORE_AREA_BM),
+        [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
+        [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
+        [HWBLK_VEU1] = HWBLK(MSTPCR2, 15, CORE_AREA_BM),
+        [HWBLK_CEU1] = HWBLK(MSTPCR2, 13, CORE_AREA_BM),
+        [HWBLK_BEU1] = HWBLK(MSTPCR2, 12, CORE_AREA_BM),
+        [HWBLK_2DDMAC] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
+        [HWBLK_SPU] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
+        [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
+        [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
+        [HWBLK_BEU0] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
+        [HWBLK_CEU0] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
+        [HWBLK_VEU0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
+        [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
+        [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
+};
+
+static struct hwblk_info sh7724_hwblk_info = {
+        .areas = sh7724_hwblk_area,
+        .nr_areas = ARRAY_SIZE(sh7724_hwblk_area),
+        .hwblks = sh7724_hwblk,
+        .nr_hwblks = ARRAY_SIZE(sh7724_hwblk),
+};
+
+int arch_hwblk_sleep_mode(void)
+{
+        if (!sh7724_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_STANDBY | SUSP_SH_SF;
+
+        if (!sh7724_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_SLEEP | SUSP_SH_SF;
+
+        return SUSP_SH_SLEEP;
+}
+
+int __init arch_hwblk_init(void)
+{
+        return hwblk_register(&sh7724_hwblk_info);
+}
diff --git a/arch/sh/kernel/cpu/shmobile/pm_runtime.c b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
new file mode 100644
index 00000000000..bf280c812d2
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
@@ -0,0 +1,319 @@
+/*
+ * arch/sh/kernel/cpu/shmobile/pm_runtime.c
+ *
+ * Runtime PM support code for SuperH Mobile
+ *
+ *  Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/pm_runtime.h>
+#include <linux/platform_device.h>
+#include <linux/mutex.h>
+#include <asm/hwblk.h>
+
+static DEFINE_SPINLOCK(hwblk_lock);
+static LIST_HEAD(hwblk_idle_list);
+static struct work_struct hwblk_work;
+
+extern struct hwblk_info *hwblk_info;
+
+static void platform_pm_runtime_not_idle(struct platform_device *pdev)
+{
+        unsigned long flags;
+
+        /* remove device from idle list */
+        spin_lock_irqsave(&hwblk_lock, flags);
+        if (test_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags)) {
+                list_del(&pdev->archdata.entry);
+                __clear_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags);
+        }
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+}
+
+static int __platform_pm_runtime_resume(struct platform_device *pdev)
+{
+        struct device *d = &pdev->dev;
+        struct pdev_archdata *ad = &pdev->archdata;
+        int hwblk = ad->hwblk_id;
+        int ret = -ENOSYS;
+
+        dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk);
+
+        if (d->driver) {
+                hwblk_enable(hwblk_info, hwblk);
+                ret = 0;
+
+                if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) {
+                        if (d->driver->pm && d->driver->pm->runtime_resume)
+                                ret = d->driver->pm->runtime_resume(d);
+
+                        if (!ret)
+                                clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
+                        else
+                                hwblk_disable(hwblk_info, hwblk);
+                }
+        }
+
+        dev_dbg(d, "__platform_pm_runtime_resume() [%d] - returns %d\n",
+                hwblk, ret);
+
+        return ret;
+}
+
+static int __platform_pm_runtime_suspend(struct platform_device *pdev)
+{
+        struct device *d = &pdev->dev;
+        struct pdev_archdata *ad = &pdev->archdata;
+        int hwblk = ad->hwblk_id;
+        int ret = -ENOSYS;
+
+        dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk);
+
+        if (d->driver) {
+                BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags));
+                ret = 0;
+
+                if (d->driver->pm && d->driver->pm->runtime_suspend) {
+                        hwblk_enable(hwblk_info, hwblk);
+                        ret = d->driver->pm->runtime_suspend(d);
+                        hwblk_disable(hwblk_info, hwblk);
+                }
+
+                if (!ret) {
+                        set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
+                        platform_pm_runtime_not_idle(pdev);
+                        hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE);
+                }
+        }
+
+        dev_dbg(d, "__platform_pm_runtime_suspend() [%d] - returns %d\n",
+                hwblk, ret);
+
+        return ret;
+}
+
+static void platform_pm_runtime_work(struct work_struct *work)
+{
+        struct platform_device *pdev;
+        unsigned long flags;
+        int ret;
+
+        /* go through the idle list and suspend one device at a time */
+        do {
+                spin_lock_irqsave(&hwblk_lock, flags);
+                if (list_empty(&hwblk_idle_list))
+                        pdev = NULL;
+                else
+                        pdev = list_first_entry(&hwblk_idle_list,
+                                                struct platform_device,
+                                                archdata.entry);
+                spin_unlock_irqrestore(&hwblk_lock, flags);
+
+                if (pdev) {
+                        mutex_lock(&pdev->archdata.mutex);
+                        ret = __platform_pm_runtime_suspend(pdev);
+
+                        /* at this point the platform device may be:
+                         * suspended: ret = 0, FLAG_SUSP set, clock stopped
+                         * failed: ret < 0, FLAG_IDLE set, clock stopped
+                         */
+                        mutex_unlock(&pdev->archdata.mutex);
+                } else {
+                        ret = -ENODEV;
+                }
+        } while (!ret);
+}
+
+/* this function gets called from cpuidle context when all devices in the
+ * main power domain are unused but some are counted as idle, ie the hwblk
+ * counter values are (HWBLK_CNT_USAGE == 0) && (HWBLK_CNT_IDLE != 0)
+ */
+void platform_pm_runtime_suspend_idle(void)
+{
+        queue_work(pm_wq, &hwblk_work);
+}
+
+static int default_platform_runtime_suspend(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct pdev_archdata *ad = &pdev->archdata;
+        unsigned long flags;
+        int hwblk = ad->hwblk_id;
+        int ret = 0;
+
+        dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
+
+        /* ignore off-chip platform devices */
+        if (!hwblk)
+                goto out;
+
+        /* interrupt context not allowed */
+        might_sleep();
+
+        /* catch misconfigured drivers not starting with resume */
+        if (test_bit(PDEV_ARCHDATA_FLAG_INIT, &ad->flags)) {
+                ret = -EINVAL;
+                goto out;
+        }
+
+        /* serialize */
+        mutex_lock(&ad->mutex);
+
+        /* disable clock */
+        hwblk_disable(hwblk_info, hwblk);
+
+        /* put device on idle list */
+        spin_lock_irqsave(&hwblk_lock, flags);
+        list_add_tail(&ad->entry, &hwblk_idle_list);
+        __set_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags);
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+
+        /* increase idle count */
+        hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_IDLE);
+
+        /* at this point the platform device is:
+         * idle: ret = 0, FLAG_IDLE set, clock stopped
+         */
+        mutex_unlock(&ad->mutex);
+
+out:
+        dev_dbg(dev, "%s() [%d] returns %d\n",
+                 __func__, hwblk, ret);
+
+        return ret;
+}
+
+static int default_platform_runtime_resume(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct pdev_archdata *ad = &pdev->archdata;
+        int hwblk = ad->hwblk_id;
+        int ret = 0;
+
+        dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
+
+        /* ignore off-chip platform devices */
+        if (!hwblk)
+                goto out;
+
+        /* interrupt context not allowed */
+        might_sleep();
+
+        /* serialize */
+        mutex_lock(&ad->mutex);
+
+        /* make sure device is removed from idle list */
+        platform_pm_runtime_not_idle(pdev);
+
+        /* decrease idle count */
+        if (!test_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags) &&
+            !test_bit(PDEV_ARCHDATA_FLAG_SUSP, &pdev->archdata.flags))
+                hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE);
+
+        /* resume the device if needed */
+        ret = __platform_pm_runtime_resume(pdev);
+
+        /* the driver has been initialized now, so clear the init flag */
+        clear_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
+
+        /* at this point the platform device may be:
+         * resumed: ret = 0, flags = 0, clock started
+         * failed: ret < 0, FLAG_SUSP set, clock stopped
+         */
+        mutex_unlock(&ad->mutex);
+out:
+        dev_dbg(dev, "%s() [%d] returns %d\n",
+                __func__, hwblk, ret);
+
+        return ret;
+}
+
+static int default_platform_runtime_idle(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        int hwblk = pdev->archdata.hwblk_id;
+        int ret = 0;
+
+        dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
+
+        /* ignore off-chip platform devices */
+        if (!hwblk)
+                goto out;
+
+        /* interrupt context not allowed, use pm_runtime_put()! */
+        might_sleep();
+
+        /* suspend synchronously to disable clocks immediately */
+        ret = pm_runtime_suspend(dev);
+out:
+        dev_dbg(dev, "%s() [%d] done!\n", __func__, hwblk);
+        return ret;
+}
+
+static struct dev_pm_domain default_pm_domain = {
+        .ops = {
+                .runtime_suspend = default_platform_runtime_suspend,
+                .runtime_resume = default_platform_runtime_resume,
+                .runtime_idle = default_platform_runtime_idle,
+                USE_PLATFORM_PM_SLEEP_OPS
+        },
+};
+
+static int platform_bus_notify(struct notifier_block *nb,
+                               unsigned long action, void *data)
+{
+        struct device *dev = data;
+        struct platform_device *pdev = to_platform_device(dev);
+        int hwblk = pdev->archdata.hwblk_id;
+
+        /* ignore off-chip platform devices */
+        if (!hwblk)
+                return 0;
+
+        switch (action) {
+        case BUS_NOTIFY_ADD_DEVICE:
+                INIT_LIST_HEAD(&pdev->archdata.entry);
+                mutex_init(&pdev->archdata.mutex);
+                /* platform devices without drivers should be disabled */
+                hwblk_enable(hwblk_info, hwblk);
+                hwblk_disable(hwblk_info, hwblk);
+                /* make sure driver re-inits itself once */
+                __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
+                dev->pm_domain = &default_pm_domain;
+                break;
+        /* TODO: add BUS_NOTIFY_BIND_DRIVER and increase idle count */
+        case BUS_NOTIFY_BOUND_DRIVER:
+                /* keep track of number of devices in use per hwblk */
+                hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_DEVICES);
+                break;
+        case BUS_NOTIFY_UNBOUND_DRIVER:
+                /* keep track of number of devices in use per hwblk */
+                hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_DEVICES);
+                /* make sure driver re-inits itself once */
+                __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
+                break;
+        case BUS_NOTIFY_DEL_DEVICE:
+                dev->pm_domain = NULL;
+                break;
+        }
+        return 0;
+}
+
+static struct notifier_block platform_bus_notifier = {
+        .notifier_call = platform_bus_notify
+};
+
+static int __init sh_pm_runtime_init(void)
+{
+        INIT_WORK(&hwblk_work, platform_pm_runtime_work);
+
+        bus_register_notifier(&platform_bus_type, &platform_bus_notifier);
+        return 0;
+}
+core_initcall(sh_pm_runtime_init);
diff --git a/arch/sh/kernel/init_task.c b/arch/sh/kernel/init_task.c
new file mode 100644
index 00000000000..11f2ea556a6
--- /dev/null
+++ b/arch/sh/kernel/init_task.c
@@ -0,0 +1,30 @@
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init_task.h>
+#include <linux/mqueue.h>
+#include <linux/fs.h>
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+
+static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
+struct pt_regs fake_swapper_regs;
+/*
+ * Initial thread structure.
+ *
+ * We need to make sure that this is 8192-byte aligned due to the
+ * way process stacks are handled. This is done by having a special
+ * "init_task" linker map entry..
+ */
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
+
+/*
+ * Initial task structure.
+ *
+ * All other task structs will be allocated on slabs in fork.c
+ */
+struct task_struct init_task = INIT_TASK(init_task);
+
+EXPORT_SYMBOL(init_task);
diff --git a/arch/sh/kernel/sys_sh64.c b/arch/sh/kernel/sys_sh64.c
new file mode 100644
index 00000000000..c5a38c4bf41
--- /dev/null
+++ b/arch/sh/kernel/sys_sh64.c
@@ -0,0 +1,50 @@
+/*
+ * arch/sh/kernel/sys_sh64.c
+ *
+ * Copyright (C) 2000, 2001  Paolo Alberelli
+ *
+ * This file contains various random system calls that
+ * have a non-standard calling sequence on the Linux/SH5
+ * platform.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/errno.h>
+#include <linux/rwsem.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/fs.h>
+#include <linux/smp.h>
+#include <linux/sem.h>
+#include <linux/msg.h>
+#include <linux/shm.h>
+#include <linux/stat.h>
+#include <linux/mman.h>
+#include <linux/file.h>
+#include <linux/syscalls.h>
+#include <linux/ipc.h>
+#include <asm/uaccess.h>
+#include <asm/ptrace.h>
+#include <asm/unistd.h>
+
+/*
+ * Do a system call from kernel instead of calling sys_execve so we
+ * end up with proper pt_regs.
+ */
+int kernel_execve(const char *filename,
+                  const char *const argv[],
+                  const char *const envp[])
+{
+        register unsigned long __sc0 __asm__ ("r9") = ((0x13 << 16) | __NR_execve);
+        register unsigned long __sc2 __asm__ ("r2") = (unsigned long) filename;
+        register unsigned long __sc3 __asm__ ("r3") = (unsigned long) argv;
+        register unsigned long __sc4 __asm__ ("r4") = (unsigned long) envp;
+        __asm__ __volatile__ ("trapa    %1 !\t\t\t execve(%2,%3,%4)"
+        : "=r" (__sc0)
+        : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) );
+        __asm__ __volatile__ ("!dummy   %0 %1 %2 %3"
+        : : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) : "memory");
+        return __sc0;
+}
diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c
new file mode 100644
index 00000000000..6152a6a6d9c
--- /dev/null
+++ b/arch/sh/lib64/dbg.c
@@ -0,0 +1,248 @@
+/*--------------------------------------------------------------------------
+--
+-- Identity : Linux50 Debug Funcions
+--
+-- File     : arch/sh/lib64/dbg.c
+--
+-- Copyright 2000, 2001 STMicroelectronics Limited.
+-- Copyright 2004 Richard Curnow (evt_debug etc)
+--
+--------------------------------------------------------------------------*/
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/fs.h>
+#include <asm/mmu_context.h>
+
+typedef u64 regType_t;
+
+static regType_t getConfigReg(u64 id)
+{
+        register u64 reg __asm__("r2");
+        asm volatile ("getcfg   %1, 0, %0":"=r" (reg):"r"(id));
+        return (reg);
+}
+
+/* ======================================================================= */
+
+static char *szTab[] = { "4k", "64k", "1M", "512M" };
+static char *protTab[] = { "----",
+        "---R",
+        "--X-",
+        "--XR",
+        "-W--",
+        "-W-R",
+        "-WX-",
+        "-WXR",
+        "U---",
+        "U--R",
+        "U-X-",
+        "U-XR",
+        "UW--",
+        "UW-R",
+        "UWX-",
+        "UWXR"
+};
+#define  ITLB_BASE      0x00000000
+#define  DTLB_BASE      0x00800000
+#define  MAX_TLBs               64
+/* PTE High */
+#define  GET_VALID(pte)        ((pte) & 0x1)
+#define  GET_SHARED(pte)       ((pte) & 0x2)
+#define  GET_ASID(pte)         ((pte >> 2) & 0x0ff)
+#define  GET_EPN(pte)          ((pte) & 0xfffff000)
+
+/* PTE Low */
+#define  GET_CBEHAVIOR(pte)    ((pte) & 0x3)
+#define  GET_PAGE_SIZE(pte)    szTab[((pte >> 3) & 0x3)]
+#define  GET_PROTECTION(pte)   protTab[((pte >> 6) & 0xf)]
+#define  GET_PPN(pte)          ((pte) & 0xfffff000)
+
+#define PAGE_1K_MASK           0x00000000
+#define PAGE_4K_MASK           0x00000010
+#define PAGE_64K_MASK          0x00000080
+#define MMU_PAGESIZE_MASK      (PAGE_64K_MASK | PAGE_4K_MASK)
+#define PAGE_1MB_MASK          MMU_PAGESIZE_MASK
+#define PAGE_1K                (1024)
+#define PAGE_4K                (1024 * 4)
+#define PAGE_64K               (1024 * 64)
+#define PAGE_1MB               (1024 * 1024)
+
+#define HOW_TO_READ_TLB_CONTENT  \
+       "[ ID]  PPN         EPN        ASID  Share  CB  P.Size   PROT.\n"
+
+void print_single_tlb(unsigned long tlb, int single_print)
+{
+        regType_t pteH;
+        regType_t pteL;
+        unsigned int valid, shared, asid, epn, cb, ppn;
+        char *pSize;
+        char *pProt;
+
+        /*
+           ** in case of single print <single_print> is true, this implies:
+           **   1) print the TLB in any case also if NOT VALID
+           **   2) print out the header
+         */
+
+        pteH = getConfigReg(tlb);
+        valid = GET_VALID(pteH);
+        if (single_print)
+                printk(HOW_TO_READ_TLB_CONTENT);
+        else if (!valid)
+                return;
+
+        pteL = getConfigReg(tlb + 1);
+
+        shared = GET_SHARED(pteH);
+        asid = GET_ASID(pteH);
+        epn = GET_EPN(pteH);
+        cb = GET_CBEHAVIOR(pteL);
+        pSize = GET_PAGE_SIZE(pteL);
+        pProt = GET_PROTECTION(pteL);
+        ppn = GET_PPN(pteL);
+        printk("[%c%2ld]  0x%08x  0x%08x  %03d   %02x    %02x   %4s    %s\n",
+               ((valid) ? ' ' : 'u'), ((tlb & 0x0ffff) / TLB_STEP),
+               ppn, epn, asid, shared, cb, pSize, pProt);
+}
+
+void print_dtlb(void)
+{
+        int count;
+        unsigned long tlb;
+
+        printk(" ================= SH-5 D-TLBs Status ===================\n");
+        printk(HOW_TO_READ_TLB_CONTENT);
+        tlb = DTLB_BASE;
+        for (count = 0; count < MAX_TLBs; count++, tlb += TLB_STEP)
+                print_single_tlb(tlb, 0);
+        printk
+            (" =============================================================\n");
+}
+
+void print_itlb(void)
+{
+        int count;
+        unsigned long tlb;
+
+        printk(" ================= SH-5 I-TLBs Status ===================\n");
+        printk(HOW_TO_READ_TLB_CONTENT);
+        tlb = ITLB_BASE;
+        for (count = 0; count < MAX_TLBs; count++, tlb += TLB_STEP)
+                print_single_tlb(tlb, 0);
+        printk
+            (" =============================================================\n");
+}
+
+void show_excp_regs(char *from, int trapnr, int signr, struct pt_regs *regs)
+{
+
+        unsigned long long ah, al, bh, bl, ch, cl;
+
+        printk("\n");
+        printk("EXCEPTION - %s: task %d; Linux trap # %d; signal = %d\n",
+               ((from) ? from : "???"), current->pid, trapnr, signr);
+
+        asm volatile ("getcon   " __EXPEVT ", %0":"=r"(ah));
+        asm volatile ("getcon   " __EXPEVT ", %0":"=r"(al));
+        ah = (ah) >> 32;
+        al = (al) & 0xffffffff;
+        asm volatile ("getcon   " __KCR1 ", %0":"=r"(bh));
+        asm volatile ("getcon   " __KCR1 ", %0":"=r"(bl));
+        bh = (bh) >> 32;
+        bl = (bl) & 0xffffffff;
+        asm volatile ("getcon   " __INTEVT ", %0":"=r"(ch));
+        asm volatile ("getcon   " __INTEVT ", %0":"=r"(cl));
+        ch = (ch) >> 32;
+        cl = (cl) & 0xffffffff;
+        printk("EXPE: %08Lx%08Lx KCR1: %08Lx%08Lx INTE: %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+
+        asm volatile ("getcon   " __PEXPEVT ", %0":"=r"(ah));
+        asm volatile ("getcon   " __PEXPEVT ", %0":"=r"(al));
+        ah = (ah) >> 32;
+        al = (al) & 0xffffffff;
+        asm volatile ("getcon   " __PSPC ", %0":"=r"(bh));
+        asm volatile ("getcon   " __PSPC ", %0":"=r"(bl));
+        bh = (bh) >> 32;
+        bl = (bl) & 0xffffffff;
+        asm volatile ("getcon   " __PSSR ", %0":"=r"(ch));
+        asm volatile ("getcon   " __PSSR ", %0":"=r"(cl));
+        ch = (ch) >> 32;
+        cl = (cl) & 0xffffffff;
+        printk("PEXP: %08Lx%08Lx PSPC: %08Lx%08Lx PSSR: %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+
+        ah = (regs->pc) >> 32;
+        al = (regs->pc) & 0xffffffff;
+        bh = (regs->regs[18]) >> 32;
+        bl = (regs->regs[18]) & 0xffffffff;
+        ch = (regs->regs[15]) >> 32;
+        cl = (regs->regs[15]) & 0xffffffff;
+        printk("PC  : %08Lx%08Lx LINK: %08Lx%08Lx SP  : %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+
+        ah = (regs->sr) >> 32;
+        al = (regs->sr) & 0xffffffff;
+        asm volatile ("getcon   " __TEA ", %0":"=r"(bh));
+        asm volatile ("getcon   " __TEA ", %0":"=r"(bl));
+        bh = (bh) >> 32;
+        bl = (bl) & 0xffffffff;
+        asm volatile ("getcon   " __KCR0 ", %0":"=r"(ch));
+        asm volatile ("getcon   " __KCR0 ", %0":"=r"(cl));
+        ch = (ch) >> 32;
+        cl = (cl) & 0xffffffff;
+        printk("SR  : %08Lx%08Lx TEA : %08Lx%08Lx KCR0: %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+
+        ah = (regs->regs[0]) >> 32;
+        al = (regs->regs[0]) & 0xffffffff;
+        bh = (regs->regs[1]) >> 32;
+        bl = (regs->regs[1]) & 0xffffffff;
+        ch = (regs->regs[2]) >> 32;
+        cl = (regs->regs[2]) & 0xffffffff;
+        printk("R0  : %08Lx%08Lx R1  : %08Lx%08Lx R2  : %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+
+        ah = (regs->regs[3]) >> 32;
+        al = (regs->regs[3]) & 0xffffffff;
+        bh = (regs->regs[4]) >> 32;
+        bl = (regs->regs[4]) & 0xffffffff;
+        ch = (regs->regs[5]) >> 32;
+        cl = (regs->regs[5]) & 0xffffffff;
+        printk("R3  : %08Lx%08Lx R4  : %08Lx%08Lx R5  : %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+
+        ah = (regs->regs[6]) >> 32;
+        al = (regs->regs[6]) & 0xffffffff;
+        bh = (regs->regs[7]) >> 32;
+        bl = (regs->regs[7]) & 0xffffffff;
+        ch = (regs->regs[8]) >> 32;
+        cl = (regs->regs[8]) & 0xffffffff;
+        printk("R6  : %08Lx%08Lx R7  : %08Lx%08Lx R8  : %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+
+        ah = (regs->regs[9]) >> 32;
+        al = (regs->regs[9]) & 0xffffffff;
+        bh = (regs->regs[10]) >> 32;
+        bl = (regs->regs[10]) & 0xffffffff;
+        ch = (regs->regs[11]) >> 32;
+        cl = (regs->regs[11]) & 0xffffffff;
+        printk("R9  : %08Lx%08Lx R10 : %08Lx%08Lx R11 : %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+        printk("....\n");
+
+        ah = (regs->tregs[0]) >> 32;
+        al = (regs->tregs[0]) & 0xffffffff;
+        bh = (regs->tregs[1]) >> 32;
+        bl = (regs->tregs[1]) & 0xffffffff;
+        ch = (regs->tregs[2]) >> 32;
+        cl = (regs->tregs[2]) & 0xffffffff;
+        printk("T0  : %08Lx%08Lx T1  : %08Lx%08Lx T2  : %08Lx%08Lx\n",
+               ah, al, bh, bl, ch, cl);
+        printk("....\n");
+
+        print_dtlb();
+        print_itlb();
+}
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
new file mode 100644
index 00000000000..7bebd044f2a
--- /dev/null
+++ b/arch/sh/mm/fault_32.c
@@ -0,0 +1,374 @@
+/*
+ * Page fault handler for SH with an MMU.
+ *
+ *  Copyright (C) 1999  Niibe Yutaka
+ *  Copyright (C) 2003 - 2009  Paul Mundt
+ *
+ *  Based on linux/arch/i386/mm/fault.c:
+ *   Copyright (C) 1995  Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/hardirq.h>
+#include <linux/kprobes.h>
+#include <linux/perf_event.h>
+#include <asm/io_trapped.h>
+#include <asm/system.h>
+#include <asm/mmu_context.h>
+#include <asm/tlbflush.h>
+
+static inline int notify_page_fault(struct pt_regs *regs, int trap)
+{
+        int ret = 0;
+
+        if (kprobes_built_in() && !user_mode(regs)) {
+                preempt_disable();
+                if (kprobe_running() && kprobe_fault_handler(regs, trap))
+                        ret = 1;
+                preempt_enable();
+        }
+
+        return ret;
+}
+
+static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
+{
+        unsigned index = pgd_index(address);
+        pgd_t *pgd_k;
+        pud_t *pud, *pud_k;
+        pmd_t *pmd, *pmd_k;
+
+        pgd += index;
+        pgd_k = init_mm.pgd + index;
+
+        if (!pgd_present(*pgd_k))
+                return NULL;
+
+        pud = pud_offset(pgd, address);
+        pud_k = pud_offset(pgd_k, address);
+        if (!pud_present(*pud_k))
+                return NULL;
+
+        if (!pud_present(*pud))
+            set_pud(pud, *pud_k);
+
+        pmd = pmd_offset(pud, address);
+        pmd_k = pmd_offset(pud_k, address);
+        if (!pmd_present(*pmd_k))
+                return NULL;
+
+        if (!pmd_present(*pmd))
+                set_pmd(pmd, *pmd_k);
+        else {
+                /*
+                 * The page tables are fully synchronised so there must
+                 * be another reason for the fault. Return NULL here to
+                 * signal that we have not taken care of the fault.
+                 */
+                BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
+                return NULL;
+        }
+
+        return pmd_k;
+}
+
+/*
+ * Handle a fault on the vmalloc or module mapping area
+ */
+static noinline int vmalloc_fault(unsigned long address)
+{
+        pgd_t *pgd_k;
+        pmd_t *pmd_k;
+        pte_t *pte_k;
+
+        /* Make sure we are in vmalloc/module/P3 area: */
+        if (!(address >= VMALLOC_START && address < P3_ADDR_MAX))
+                return -1;
+
+        /*
+         * Synchronize this task's top level page-table
+         * with the 'reference' page table.
+         *
+         * Do _not_ use "current" here. We might be inside
+         * an interrupt in the middle of a task switch..
+         */
+        pgd_k = get_TTB();
+        pmd_k = vmalloc_sync_one(pgd_k, address);
+        if (!pmd_k)
+                return -1;
+
+        pte_k = pte_offset_kernel(pmd_k, address);
+        if (!pte_present(*pte_k))
+                return -1;
+
+        return 0;
+}
+
+static int fault_in_kernel_space(unsigned long address)
+{
+        return address >= TASK_SIZE;
+}
+
+/*
+ * This routine handles page faults.  It determines the address,
+ * and the problem, and then passes it off to one of the appropriate
+ * routines.
+ */
+asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
+                                        unsigned long writeaccess,
+                                        unsigned long address)
+{
+        unsigned long vec;
+        struct task_struct *tsk;
+        struct mm_struct *mm;
+        struct vm_area_struct * vma;
+        int si_code;
+        int fault;
+        siginfo_t info;
+
+        tsk = current;
+        mm = tsk->mm;
+        si_code = SEGV_MAPERR;
+        vec = lookup_exception_vector();
+
+        /*
+         * We fault-in kernel-space virtual memory on-demand. The
+         * 'reference' page table is init_mm.pgd.
+         *
+         * NOTE! We MUST NOT take any locks for this case. We may
+         * be in an interrupt or a critical region, and should
+         * only copy the information from the master page table,
+         * nothing more.
+         */
+        if (unlikely(fault_in_kernel_space(address))) {
+                if (vmalloc_fault(address) >= 0)
+                        return;
+                if (notify_page_fault(regs, vec))
+                        return;
+
+                goto bad_area_nosemaphore;
+        }
+
+        if (unlikely(notify_page_fault(regs, vec)))
+                return;
+
+        /* Only enable interrupts if they were on before the fault */
+        if ((regs->sr & SR_IMASK) != SR_IMASK)
+                local_irq_enable();
+
+        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
+
+        /*
+         * If we're in an interrupt, have no user context or are running
+         * in an atomic region then we must not take the fault:
+         */
+        if (in_atomic() || !mm)
+                goto no_context;
+
+        down_read(&mm->mmap_sem);
+
+        vma = find_vma(mm, address);
+        if (!vma)
+                goto bad_area;
+        if (vma->vm_start <= address)
+                goto good_area;
+        if (!(vma->vm_flags & VM_GROWSDOWN))
+                goto bad_area;
+        if (expand_stack(vma, address))
+                goto bad_area;
+
+        /*
+         * Ok, we have a good vm_area for this memory access, so
+         * we can handle it..
+         */
+good_area:
+        si_code = SEGV_ACCERR;
+        if (writeaccess) {
+                if (!(vma->vm_flags & VM_WRITE))
+                        goto bad_area;
+        } else {
+                if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
+                        goto bad_area;
+        }
+
+        /*
+         * If for any reason at all we couldn't handle the fault,
+         * make sure we exit gracefully rather than endlessly redo
+         * the fault.
+         */
+        fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0);
+        if (unlikely(fault & VM_FAULT_ERROR)) {
+                if (fault & VM_FAULT_OOM)
+                        goto out_of_memory;
+                else if (fault & VM_FAULT_SIGBUS)
+                        goto do_sigbus;
+                BUG();
+        }
+        if (fault & VM_FAULT_MAJOR) {
+                tsk->maj_flt++;
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
+                                     regs, address);
+        } else {
+                tsk->min_flt++;
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
+                                     regs, address);
+        }
+
+        up_read(&mm->mmap_sem);
+        return;
+
+        /*
+         * Something tried to access memory that isn't in our memory map..
+         * Fix it, but check if it's kernel or user first..
+         */
+bad_area:
+        up_read(&mm->mmap_sem);
+
+bad_area_nosemaphore:
+        if (user_mode(regs)) {
+                info.si_signo = SIGSEGV;
+                info.si_errno = 0;
+                info.si_code = si_code;
+                info.si_addr = (void *) address;
+                force_sig_info(SIGSEGV, &info, tsk);
+                return;
+        }
+
+no_context:
+        /* Are we prepared to handle this kernel fault?  */
+        if (fixup_exception(regs))
+                return;
+
+        if (handle_trapped_io(regs, address))
+                return;
+/*
+ * Oops. The kernel tried to access some bad page. We'll have to
+ * terminate things with extreme prejudice.
+ *
+ */
+
+        bust_spinlocks(1);
+
+        if (oops_may_print()) {
+                unsigned long page;
+
+                if (address < PAGE_SIZE)
+                        printk(KERN_ALERT "Unable to handle kernel NULL "
+                                          "pointer dereference");
+                else
+                        printk(KERN_ALERT "Unable to handle kernel paging "
+                                          "request");
+                printk(" at virtual address %08lx\n", address);
+                printk(KERN_ALERT "pc = %08lx\n", regs->pc);
+                page = (unsigned long)get_TTB();
+                if (page) {
+                        page = ((__typeof__(page) *)page)[address >> PGDIR_SHIFT];
+                        printk(KERN_ALERT "*pde = %08lx\n", page);
+                        if (page & _PAGE_PRESENT) {
+                                page &= PAGE_MASK;
+                                address &= 0x003ff000;
+                                page = ((__typeof__(page) *)
+                                                __va(page))[address >>
+                                                            PAGE_SHIFT];
+                                printk(KERN_ALERT "*pte = %08lx\n", page);
+                        }
+                }
+        }
+
+        die("Oops", regs, writeaccess);
+        bust_spinlocks(0);
+        do_exit(SIGKILL);
+
+/*
+ * We ran out of memory, or some other thing happened to us that made
+ * us unable to handle the page fault gracefully.
+ */
+out_of_memory:
+        up_read(&mm->mmap_sem);
+        if (!user_mode(regs))
+                goto no_context;
+        pagefault_out_of_memory();
+        return;
+
+do_sigbus:
+        up_read(&mm->mmap_sem);
+
+        /*
+         * Send a sigbus, regardless of whether we were in kernel
+         * or user mode.
+         */
+        info.si_signo = SIGBUS;
+        info.si_errno = 0;
+        info.si_code = BUS_ADRERR;
+        info.si_addr = (void *)address;
+        force_sig_info(SIGBUS, &info, tsk);
+
+        /* Kernel mode? Handle exceptions or die */
+        if (!user_mode(regs))
+                goto no_context;
+}
+
+/*
+ * Called with interrupts disabled.
+ */
+asmlinkage int __kprobes
+handle_tlbmiss(struct pt_regs *regs, unsigned long writeaccess,
+               unsigned long address)
+{
+        pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmd;
+        pte_t *pte;
+        pte_t entry;
+
+        /*
+         * We don't take page faults for P1, P2, and parts of P4, these
+         * are always mapped, whether it be due to legacy behaviour in
+         * 29-bit mode, or due to PMB configuration in 32-bit mode.
+         */
+        if (address >= P3SEG && address < P3_ADDR_MAX) {
+                pgd = pgd_offset_k(address);
+        } else {
+                if (unlikely(address >= TASK_SIZE || !current->mm))
+                        return 1;
+
+                pgd = pgd_offset(current->mm, address);
+        }
+
+        pud = pud_offset(pgd, address);
+        if (pud_none_or_clear_bad(pud))
+                return 1;
+        pmd = pmd_offset(pud, address);
+        if (pmd_none_or_clear_bad(pmd))
+                return 1;
+        pte = pte_offset_kernel(pmd, address);
+        entry = *pte;
+        if (unlikely(pte_none(entry) || pte_not_present(entry)))
+                return 1;
+        if (unlikely(writeaccess && !pte_write(entry)))
+                return 1;
+
+        if (writeaccess)
+                entry = pte_mkdirty(entry);
+        entry = pte_mkyoung(entry);
+
+        set_pte(pte, entry);
+
+#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP)
+        /*
+         * SH-4 does not set MMUCR.RC to the corresponding TLB entry in
+         * the case of an initial page write exception, so we need to
+         * flush it in order to avoid potential TLB entry duplication.
+         */
+        if (writeaccess == 2)
+                local_flush_tlb_one(get_asid(), address & PAGE_MASK);
+#endif
+
+        update_mmu_cache(NULL, address, pte);
+
+        return 0;
+}
diff --git a/arch/sh/mm/fault_64.c b/arch/sh/mm/fault_64.c
new file mode 100644
index 00000000000..2b356cec248
--- /dev/null
+++ b/arch/sh/mm/fault_64.c
@@ -0,0 +1,266 @@
+/*
+ * The SH64 TLB miss.
+ *
+ * Original code from fault.c
+ * Copyright (C) 2000, 2001  Paolo Alberelli
+ *
+ * Fast PTE->TLB refill path
+ * Copyright (C) 2003 Richard.Curnow@superh.com
+ *
+ * IMPORTANT NOTES :
+ * The do_fast_page_fault function is called from a context in entry.S
+ * where very few registers have been saved.  In particular, the code in
+ * this file must be compiled not to use ANY caller-save registers that
+ * are not part of the restricted save set.  Also, it means that code in
+ * this file must not make calls to functions elsewhere in the kernel, or
+ * else the excepting context will see corruption in its caller-save
+ * registers.  Plus, the entry.S save area is non-reentrant, so this code
+ * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic
+ * on any exception.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+#include <asm/system.h>
+#include <asm/tlb.h>
+#include <asm/io.h>
+#include <asm/uaccess.h>
+#include <asm/pgalloc.h>
+#include <asm/mmu_context.h>
+#include <cpu/registers.h>
+
+/* Callable from fault.c, so not static */
+inline void __do_tlb_refill(unsigned long address,
+                            unsigned long long is_text_not_data, pte_t *pte)
+{
+        unsigned long long ptel;
+        unsigned long long pteh=0;
+        struct tlb_info *tlbp;
+        unsigned long long next;
+
+        /* Get PTEL first */
+        ptel = pte_val(*pte);
+
+        /*
+         * Set PTEH register
+         */
+        pteh = neff_sign_extend(address & MMU_VPN_MASK);
+
+        /* Set the ASID. */
+        pteh |= get_asid() << PTEH_ASID_SHIFT;
+        pteh |= PTEH_VALID;
+
+        /* Set PTEL register, set_pte has performed the sign extension */
+        ptel &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
+
+        tlbp = is_text_not_data ? &(cpu_data->itlb) : &(cpu_data->dtlb);
+        next = tlbp->next;
+        __flush_tlb_slot(next);
+        asm volatile ("putcfg %0,1,%2\n\n\t"
+                      "putcfg %0,0,%1\n"
+                      :  : "r" (next), "r" (pteh), "r" (ptel) );
+
+        next += TLB_STEP;
+        if (next > tlbp->last) next = tlbp->first;
+        tlbp->next = next;
+
+}
+
+static int handle_vmalloc_fault(struct mm_struct *mm,
+                                unsigned long protection_flags,
+                                unsigned long long textaccess,
+                                unsigned long address)
+{
+        pgd_t *dir;
+        pud_t *pud;
+        pmd_t *pmd;
+        static pte_t *pte;
+        pte_t entry;
+
+        dir = pgd_offset_k(address);
+
+        pud = pud_offset(dir, address);
+        if (pud_none_or_clear_bad(pud))
+                return 0;
+
+        pmd = pmd_offset(pud, address);
+        if (pmd_none_or_clear_bad(pmd))
+                return 0;
+
+        pte = pte_offset_kernel(pmd, address);
+        entry = *pte;
+
+        if (pte_none(entry) || !pte_present(entry))
+                return 0;
+        if ((pte_val(entry) & protection_flags) != protection_flags)
+                return 0;
+
+        __do_tlb_refill(address, textaccess, pte);
+
+        return 1;
+}
+
+static int handle_tlbmiss(struct mm_struct *mm,
+                          unsigned long long protection_flags,
+                          unsigned long long textaccess,
+                          unsigned long address)
+{
+        pgd_t *dir;
+        pud_t *pud;
+        pmd_t *pmd;
+        pte_t *pte;
+        pte_t entry;
+
+        /* NB. The PGD currently only contains a single entry - there is no
+           page table tree stored for the top half of the address space since
+           virtual pages in that region should never be mapped in user mode.
+           (In kernel mode, the only things in that region are the 512Mb super
+           page (locked in), and vmalloc (modules) +  I/O device pages (handled
+           by handle_vmalloc_fault), so no PGD for the upper half is required
+           by kernel mode either).
+
+           See how mm->pgd is allocated and initialised in pgd_alloc to see why
+           the next test is necessary.  - RPC */
+        if (address >= (unsigned long) TASK_SIZE)
+                /* upper half - never has page table entries. */
+                return 0;
+
+        dir = pgd_offset(mm, address);
+        if (pgd_none(*dir) || !pgd_present(*dir))
+                return 0;
+        if (!pgd_present(*dir))
+                return 0;
+
+        pud = pud_offset(dir, address);
+        if (pud_none(*pud) || !pud_present(*pud))
+                return 0;
+
+        pmd = pmd_offset(pud, address);
+        if (pmd_none(*pmd) || !pmd_present(*pmd))
+                return 0;
+
+        pte = pte_offset_kernel(pmd, address);
+        entry = *pte;
+
+        if (pte_none(entry) || !pte_present(entry))
+                return 0;
+
+        /*
+         * If the page doesn't have sufficient protection bits set to
+         * service the kind of fault being handled, there's not much
+         * point doing the TLB refill.  Punt the fault to the general
+         * handler.
+         */
+        if ((pte_val(entry) & protection_flags) != protection_flags)
+                return 0;
+
+        __do_tlb_refill(address, textaccess, pte);
+
+        return 1;
+}
+
+/*
+ * Put all this information into one structure so that everything is just
+ * arithmetic relative to a single base address.  This reduces the number
+ * of movi/shori pairs needed just to load addresses of static data.
+ */
+struct expevt_lookup {
+        unsigned short protection_flags[8];
+        unsigned char  is_text_access[8];
+        unsigned char  is_write_access[8];
+};
+
+#define PRU (1<<9)
+#define PRW (1<<8)
+#define PRX (1<<7)
+#define PRR (1<<6)
+
+#define DIRTY (_PAGE_DIRTY | _PAGE_ACCESSED)
+#define YOUNG (_PAGE_ACCESSED)
+
+/* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether
+   the fault happened in user mode or privileged mode. */
+static struct expevt_lookup expevt_lookup_table = {
+        .protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW},
+        .is_text_access   = {1,   1,   0, 0, 0,   0,   0,   0}
+};
+
+/*
+   This routine handles page faults that can be serviced just by refilling a
+   TLB entry from an existing page table entry.  (This case represents a very
+   large majority of page faults.) Return 1 if the fault was successfully
+   handled.  Return 0 if the fault could not be handled.  (This leads into the
+   general fault handling in fault.c which deals with mapping file-backed
+   pages, stack growth, segmentation faults, swapping etc etc)
+ */
+asmlinkage int do_fast_page_fault(unsigned long long ssr_md,
+                                  unsigned long long expevt,
+                                  unsigned long address)
+{
+        struct task_struct *tsk;
+        struct mm_struct *mm;
+        unsigned long long textaccess;
+        unsigned long long protection_flags;
+        unsigned long long index;
+        unsigned long long expevt4;
+
+        /* The next few lines implement a way of hashing EXPEVT into a
+         * small array index which can be used to lookup parameters
+         * specific to the type of TLBMISS being handled.
+         *
+         * Note:
+         *      ITLBMISS has EXPEVT==0xa40
+         *      RTLBMISS has EXPEVT==0x040
+         *      WTLBMISS has EXPEVT==0x060
+         */
+        expevt4 = (expevt >> 4);
+        /* TODO : xor ssr_md into this expression too. Then we can check
+         * that PRU is set when it needs to be. */
+        index = expevt4 ^ (expevt4 >> 5);
+        index &= 7;
+        protection_flags = expevt_lookup_table.protection_flags[index];
+        textaccess       = expevt_lookup_table.is_text_access[index];
+
+        /* SIM
+         * Note this is now called with interrupts still disabled
+         * This is to cope with being called for a missing IO port
+         * address with interrupts disabled. This should be fixed as
+         * soon as we have a better 'fast path' miss handler.
+         *
+         * Plus take care how you try and debug this stuff.
+         * For example, writing debug data to a port which you
+         * have just faulted on is not going to work.
+         */
+
+        tsk = current;
+        mm = tsk->mm;
+
+        if ((address >= VMALLOC_START && address < VMALLOC_END) ||
+            (address >= IOBASE_VADDR  && address < IOBASE_END)) {
+                if (ssr_md)
+                        /*
+                         * Process-contexts can never have this address
+                         * range mapped
+                         */
+                        if (handle_vmalloc_fault(mm, protection_flags,
+                                                 textaccess, address))
+                                return 1;
+        } else if (!in_interrupt() && mm) {
+                if (handle_tlbmiss(mm, protection_flags, textaccess, address))
+                        return 1;
+        }
+
+        return 0;
+}