diff options
Diffstat (limited to 'arch/ppc/platforms/85xx/mpc85xx_cds_common.h')
-rw-r--r-- | arch/ppc/platforms/85xx/mpc85xx_cds_common.h | 80 |
1 files changed, 0 insertions, 80 deletions
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h deleted file mode 100644 index 32c5455c8b8..00000000000 --- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | /* | ||
2 | * MPC85xx CDS board definitions | ||
3 | * | ||
4 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
5 | * | ||
6 | * Copyright 2004 Freescale Semiconductor, Inc | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_MPC85XX_CDS_H__ | ||
16 | #define __MACH_MPC85XX_CDS_H__ | ||
17 | |||
18 | #include <linux/serial.h> | ||
19 | #include <asm/ppcboot.h> | ||
20 | #include <linux/initrd.h> | ||
21 | #include <syslib/ppc85xx_setup.h> | ||
22 | |||
23 | #define BOARD_CCSRBAR ((uint)0xe0000000) | ||
24 | #define CCSRBAR_SIZE ((uint)1024*1024) | ||
25 | |||
26 | /* CADMUS info */ | ||
27 | #define CADMUS_BASE (0xf8004000) | ||
28 | #define CADMUS_SIZE (256) | ||
29 | #define CM_VER (0) | ||
30 | #define CM_CSR (1) | ||
31 | #define CM_RST (2) | ||
32 | |||
33 | /* CDS NVRAM/RTC */ | ||
34 | #define CDS_RTC_ADDR (0xf8000000) | ||
35 | #define CDS_RTC_SIZE (8 * 1024) | ||
36 | |||
37 | /* PCI config */ | ||
38 | #define PCI1_CFG_ADDR_OFFSET (0x8000) | ||
39 | #define PCI1_CFG_DATA_OFFSET (0x8004) | ||
40 | |||
41 | #define PCI2_CFG_ADDR_OFFSET (0x9000) | ||
42 | #define PCI2_CFG_DATA_OFFSET (0x9004) | ||
43 | |||
44 | /* PCI interrupt controller */ | ||
45 | #define PIRQ0A MPC85xx_IRQ_EXT0 | ||
46 | #define PIRQ0B MPC85xx_IRQ_EXT1 | ||
47 | #define PIRQ0C MPC85xx_IRQ_EXT2 | ||
48 | #define PIRQ0D MPC85xx_IRQ_EXT3 | ||
49 | #define PIRQ1A MPC85xx_IRQ_EXT11 | ||
50 | |||
51 | /* PCI 1 memory map */ | ||
52 | #define MPC85XX_PCI1_LOWER_IO 0x00000000 | ||
53 | #define MPC85XX_PCI1_UPPER_IO 0x00ffffff | ||
54 | |||
55 | #define MPC85XX_PCI1_LOWER_MEM 0x80000000 | ||
56 | #define MPC85XX_PCI1_UPPER_MEM 0x9fffffff | ||
57 | |||
58 | #define MPC85XX_PCI1_IO_BASE 0xe2000000 | ||
59 | #define MPC85XX_PCI1_MEM_OFFSET 0x00000000 | ||
60 | |||
61 | #define MPC85XX_PCI1_IO_SIZE 0x01000000 | ||
62 | |||
63 | /* PCI 2 memory map */ | ||
64 | /* Note: the standard PPC fixups will cause IO space to get bumped by | ||
65 | * hose->io_base_virt - isa_io_base => MPC85XX_PCI1_IO_SIZE */ | ||
66 | #define MPC85XX_PCI2_LOWER_IO 0x00000000 | ||
67 | #define MPC85XX_PCI2_UPPER_IO 0x00ffffff | ||
68 | |||
69 | #define MPC85XX_PCI2_LOWER_MEM 0xa0000000 | ||
70 | #define MPC85XX_PCI2_UPPER_MEM 0xbfffffff | ||
71 | |||
72 | #define MPC85XX_PCI2_IO_BASE 0xe3000000 | ||
73 | #define MPC85XX_PCI2_MEM_OFFSET 0x00000000 | ||
74 | |||
75 | #define MPC85XX_PCI2_IO_SIZE 0x01000000 | ||
76 | |||
77 | #define NR_8259_INTS 16 | ||
78 | #define CPM_IRQ_OFFSET NR_8259_INTS | ||
79 | |||
80 | #endif /* __MACH_MPC85XX_CDS_H__ */ | ||