5 files changed, 24 insertions, 163 deletions

diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 698133180ae..01f51daace1 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -3,5 +3,4 @@ obj-$(CONFIG_PPC44x_SIMPLE) += ppc44x_simple.o
 obj-$(CONFIG_EBONY)     += ebony.o
 obj-$(CONFIG_SAM440EP)  += sam440ep.o
 obj-$(CONFIG_WARP)      += warp.o
-obj-$(CONFIG_WARP)      += warp-nand.o
 obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
deleted file mode 100644
index 89ecd76127d..00000000000
--- a/arch/powerpc/platforms/44x/warp-nand.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * PIKA Warp(tm) NAND flash specific routines
- *
- * Copyright (c) 2008 PIKA Technologies
- *   Sean MacLennan <smaclennan@pikatech.com>
- */
-
-#include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/ndfc.h>
-#include <linux/of.h>
-#include <asm/machdep.h>
-
-
-#ifdef CONFIG_MTD_NAND_NDFC
-
-#define CS_NAND_0       1       /* use chip select 1 for NAND device 0 */
-
-#define WARP_NAND_FLASH_REG_ADDR        0xD0000000UL
-#define WARP_NAND_FLASH_REG_SIZE        0x2000
-
-static struct resource warp_ndfc = {
-        .start = WARP_NAND_FLASH_REG_ADDR,
-        .end   = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE - 1,
-        .flags = IORESOURCE_MEM,
-};
-
-static struct mtd_partition nand_parts[] = {
-        {
-                .name   = "kernel",
-                .offset = 0,
-                .size   = 0x0200000
-        },
-        {
-                .name   = "root",
-                .offset = 0x0200000,
-                .size   = 0x3E00000
-        },
-        {
-                .name   = "persistent",
-                .offset = 0x4000000,
-                .size   = 0x4000000
-        },
-        {
-                .name   = "persistent1",
-                .offset = 0x8000000,
-                .size   = 0x4000000
-        },
-        {
-                .name   = "persistent2",
-                .offset = 0xC000000,
-                .size   = 0x4000000
-        }
-};
-
-struct ndfc_controller_settings warp_ndfc_settings = {
-        .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
-        .ndfc_erpn = 0,
-};
-
-static struct ndfc_chip_settings warp_chip0_settings = {
-        .bank_settings = 0x80002222,
-};
-
-struct platform_nand_ctrl warp_nand_ctrl = {
-        .priv = &warp_ndfc_settings,
-};
-
-static struct platform_device warp_ndfc_device = {
-        .name = "ndfc-nand",
-        .id = 0,
-        .dev = {
-                .platform_data = &warp_nand_ctrl,
-        },
-        .num_resources = 1,
-        .resource = &warp_ndfc,
-};
-
-/* Do NOT set the ecclayout: let it default so it is correct for both
- * 64M and 256M flash chips.
- */
-static struct platform_nand_chip warp_nand_chip0 = {
-        .nr_chips = 1,
-        .chip_offset = CS_NAND_0,
-        .nr_partitions = ARRAY_SIZE(nand_parts),
-        .partitions = nand_parts,
-        .chip_delay = 20,
-        .priv = &warp_chip0_settings,
-};
-
-static struct platform_device warp_nand_device = {
-        .name = "ndfc-chip",
-        .id = 0,
-        .num_resources = 0,
-        .dev = {
-                .platform_data = &warp_nand_chip0,
-                .parent = &warp_ndfc_device.dev,
-        }
-};
-
-static int warp_setup_nand_flash(void)
-{
-        struct device_node *np;
-
-        /* Try to detect a rev A based on NOR size. */
-        np = of_find_compatible_node(NULL, NULL, "cfi-flash");
-        if (np) {
-                struct property *pp;
-
-                pp = of_find_property(np, "reg", NULL);
-                if (pp && (pp->length == 12)) {
-                        u32 *v = pp->value;
-                        if (v[2] == 0x4000000) {
-                                /* Rev A = 64M NAND */
-                                warp_nand_chip0.nr_partitions = 3;
-
-                                nand_parts[1].size   = 0x3000000;
-                                nand_parts[2].offset = 0x3200000;
-                                nand_parts[2].size   = 0x0e00000;
-                        }
-                }
-                of_node_put(np);
-        }
-
-        platform_device_register(&warp_ndfc_device);
-        platform_device_register(&warp_nand_device);
-
-        return 0;
-}
-machine_device_initcall(warp, warp_setup_nand_flash);
-
-#endif
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index c3f2c21024e..87ff522f28b 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -20,14 +20,6 @@
 
 
 /* ======================================================================== */
-/* PCI windows config                                                       */
-/* ======================================================================== */
-
-#define MPC52xx_PCI_TARGET_IO   0xf0000000
-#define MPC52xx_PCI_TARGET_MEM  0x00000000
-
-
-/* ======================================================================== */
 /* Structures mapping & Defines for PCI Unit                                */
 /* ======================================================================== */
 
@@ -244,7 +236,7 @@ static struct pci_ops mpc52xx_pci_ops = {
 
 static void __init
 mpc52xx_pci_setup(struct pci_controller *hose,
-                  struct mpc52xx_pci __iomem *pci_regs)
+                  struct mpc52xx_pci __iomem *pci_regs, phys_addr_t pci_phys)
 {
         struct resource *res;
         u32 tmp;
@@ -314,10 +306,14 @@ mpc52xx_pci_setup(struct pci_controller *hose,
         /* Set all the IWCR fields at once; they're in the same reg */
         out_be32(&pci_regs->iwcr, MPC52xx_PCI_IWCR_PACK(iwcr0, iwcr1, iwcr2));
 
-        out_be32(&pci_regs->tbatr0,
-                MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_IO );
-        out_be32(&pci_regs->tbatr1,
-                MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM );
+        /* Map IMMR onto PCI bus */
+        pci_phys &= 0xfffc0000; /* bar0 has only 14 significant bits */
+        out_be32(&pci_regs->tbatr0, MPC52xx_PCI_TBATR_ENABLE | pci_phys);
+        out_be32(&pci_regs->bar0, PCI_BASE_ADDRESS_MEM_PREFETCH | pci_phys);
+
+        /* Map memory onto PCI bus */
+        out_be32(&pci_regs->tbatr1, MPC52xx_PCI_TBATR_ENABLE);
+        out_be32(&pci_regs->bar1, PCI_BASE_ADDRESS_MEM_PREFETCH);
 
         out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8);
 
@@ -414,7 +410,7 @@ mpc52xx_add_bridge(struct device_node *node)
 
         /* Finish setting up PCI using values obtained by
          * pci_proces_bridge_OF_ranges */
-        mpc52xx_pci_setup(hose, pci_regs);
+        mpc52xx_pci_setup(hose, pci_regs, rsrc.start);
 
         return 0;
 }
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index 5177bdd2c62..91a2c80b9d7 100644
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -71,6 +71,7 @@ static int __init mpc831x_rdb_probe(void)
 
 static struct of_device_id __initdata of_bus_ids[] = {
         { .compatible = "simple-bus" },
+        { .compatible = "gianfar" },
         {},
 };
 
diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c
index 6cf35cd8d0b..15eb6107bcd 100644
--- a/arch/powerpc/platforms/pseries/phyp_dump.c
+++ b/arch/powerpc/platforms/pseries/phyp_dump.c
@@ -144,8 +144,8 @@ static void print_dump_header(const struct phyp_dump_header *ph)
                 ph->first_offset_section);
         printk(KERN_INFO "dump disk sections should be zero\n");
         printk(KERN_INFO "dump disk section = %d\n", ph->dump_disk_section);
-        printk(KERN_INFO "block num = %ld\n", ph->block_num_dd);
-        printk(KERN_INFO "number of blocks = %ld\n", ph->num_of_blocks_dd);
+        printk(KERN_INFO "block num = %lld\n", ph->block_num_dd);
+        printk(KERN_INFO "number of blocks = %lld\n", ph->num_of_blocks_dd);
         printk(KERN_INFO "dump disk offset = %d\n", ph->offset_dd);
         printk(KERN_INFO "Max auto time= %d\n", ph->maxtime_to_auto);
 
@@ -154,33 +154,33 @@ static void print_dump_header(const struct phyp_dump_header *ph)
         printk(KERN_INFO "cpu dump_flags =%d\n", ph->cpu_data.dump_flags);
         printk(KERN_INFO "cpu source_type =%d\n", ph->cpu_data.source_type);
         printk(KERN_INFO "cpu error_flags =%d\n", ph->cpu_data.error_flags);
-        printk(KERN_INFO "cpu source_address =%lx\n",
+        printk(KERN_INFO "cpu source_address =%llx\n",
                 ph->cpu_data.source_address);
-        printk(KERN_INFO "cpu source_length =%lx\n",
+        printk(KERN_INFO "cpu source_length =%llx\n",
                 ph->cpu_data.source_length);
-        printk(KERN_INFO "cpu length_copied =%lx\n",
+        printk(KERN_INFO "cpu length_copied =%llx\n",
                 ph->cpu_data.length_copied);
 
         printk(KERN_INFO " HPTE AREA \n");
         printk(KERN_INFO "HPTE dump_flags =%d\n", ph->hpte_data.dump_flags);
         printk(KERN_INFO "HPTE source_type =%d\n", ph->hpte_data.source_type);
         printk(KERN_INFO "HPTE error_flags =%d\n", ph->hpte_data.error_flags);
-        printk(KERN_INFO "HPTE source_address =%lx\n",
+        printk(KERN_INFO "HPTE source_address =%llx\n",
                 ph->hpte_data.source_address);
-        printk(KERN_INFO "HPTE source_length =%lx\n",
+        printk(KERN_INFO "HPTE source_length =%llx\n",
                 ph->hpte_data.source_length);
-        printk(KERN_INFO "HPTE length_copied =%lx\n",
+        printk(KERN_INFO "HPTE length_copied =%llx\n",
                 ph->hpte_data.length_copied);
 
         printk(KERN_INFO " SRSD AREA \n");
         printk(KERN_INFO "SRSD dump_flags =%d\n", ph->kernel_data.dump_flags);
         printk(KERN_INFO "SRSD source_type =%d\n", ph->kernel_data.source_type);
         printk(KERN_INFO "SRSD error_flags =%d\n", ph->kernel_data.error_flags);
-        printk(KERN_INFO "SRSD source_address =%lx\n",
+        printk(KERN_INFO "SRSD source_address =%llx\n",
                 ph->kernel_data.source_address);
-        printk(KERN_INFO "SRSD source_length =%lx\n",
+        printk(KERN_INFO "SRSD source_length =%llx\n",
                 ph->kernel_data.source_length);
-        printk(KERN_INFO "SRSD length_copied =%lx\n",
+        printk(KERN_INFO "SRSD length_copied =%llx\n",
                 ph->kernel_data.length_copied);
 #endif
 }
@@ -367,8 +367,8 @@ static ssize_t show_release_region(struct kobject *kobj,
         /* total reserved size - start of scratch area */
         second_addr_range = phyp_dump_info->init_reserve_size -
                                 phyp_dump_info->reserved_scratch_size;
-        return sprintf(buf, "CPU:0x%lx-0x%lx: HPTE:0x%lx-0x%lx:"
-                            " DUMP:0x%lx-0x%lx, 0x%lx-0x%lx:\n",
+        return sprintf(buf, "CPU:0x%llx-0x%llx: HPTE:0x%llx-0x%llx:"
+                            " DUMP:0x%llx-0x%llx, 0x%lx-0x%llx:\n",
                 phdr.cpu_data.destination_address,
                 phdr.cpu_data.length_copied,
                 phdr.hpte_data.destination_address,