diff options
Diffstat (limited to 'arch/powerpc/platforms/cell/spufs/backing_ops.c')
-rw-r--r-- | arch/powerpc/platforms/cell/spufs/backing_ops.c | 31 |
1 files changed, 28 insertions, 3 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/backing_ops.c b/arch/powerpc/platforms/cell/spufs/backing_ops.c index 2d22cd59d6f..1898f0d3a8b 100644 --- a/arch/powerpc/platforms/cell/spufs/backing_ops.c +++ b/arch/powerpc/platforms/cell/spufs/backing_ops.c | |||
@@ -36,6 +36,7 @@ | |||
36 | #include <asm/io.h> | 36 | #include <asm/io.h> |
37 | #include <asm/spu.h> | 37 | #include <asm/spu.h> |
38 | #include <asm/spu_csa.h> | 38 | #include <asm/spu_csa.h> |
39 | #include <asm/spu_info.h> | ||
39 | #include <asm/mmu_context.h> | 40 | #include <asm/mmu_context.h> |
40 | #include "spufs.h" | 41 | #include "spufs.h" |
41 | 42 | ||
@@ -267,6 +268,11 @@ static char *spu_backing_get_ls(struct spu_context *ctx) | |||
267 | return ctx->csa.lscsa->ls; | 268 | return ctx->csa.lscsa->ls; |
268 | } | 269 | } |
269 | 270 | ||
271 | static u32 spu_backing_runcntl_read(struct spu_context *ctx) | ||
272 | { | ||
273 | return ctx->csa.prob.spu_runcntl_RW; | ||
274 | } | ||
275 | |||
270 | static void spu_backing_runcntl_write(struct spu_context *ctx, u32 val) | 276 | static void spu_backing_runcntl_write(struct spu_context *ctx, u32 val) |
271 | { | 277 | { |
272 | spin_lock(&ctx->csa.register_lock); | 278 | spin_lock(&ctx->csa.register_lock); |
@@ -279,9 +285,26 @@ static void spu_backing_runcntl_write(struct spu_context *ctx, u32 val) | |||
279 | spin_unlock(&ctx->csa.register_lock); | 285 | spin_unlock(&ctx->csa.register_lock); |
280 | } | 286 | } |
281 | 287 | ||
282 | static void spu_backing_runcntl_stop(struct spu_context *ctx) | 288 | static void spu_backing_master_start(struct spu_context *ctx) |
289 | { | ||
290 | struct spu_state *csa = &ctx->csa; | ||
291 | u64 sr1; | ||
292 | |||
293 | spin_lock(&csa->register_lock); | ||
294 | sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK; | ||
295 | csa->priv1.mfc_sr1_RW = sr1; | ||
296 | spin_unlock(&csa->register_lock); | ||
297 | } | ||
298 | |||
299 | static void spu_backing_master_stop(struct spu_context *ctx) | ||
283 | { | 300 | { |
284 | spu_backing_runcntl_write(ctx, SPU_RUNCNTL_STOP); | 301 | struct spu_state *csa = &ctx->csa; |
302 | u64 sr1; | ||
303 | |||
304 | spin_lock(&csa->register_lock); | ||
305 | sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; | ||
306 | csa->priv1.mfc_sr1_RW = sr1; | ||
307 | spin_unlock(&csa->register_lock); | ||
285 | } | 308 | } |
286 | 309 | ||
287 | static int spu_backing_set_mfc_query(struct spu_context * ctx, u32 mask, | 310 | static int spu_backing_set_mfc_query(struct spu_context * ctx, u32 mask, |
@@ -345,8 +368,10 @@ struct spu_context_ops spu_backing_ops = { | |||
345 | .npc_write = spu_backing_npc_write, | 368 | .npc_write = spu_backing_npc_write, |
346 | .status_read = spu_backing_status_read, | 369 | .status_read = spu_backing_status_read, |
347 | .get_ls = spu_backing_get_ls, | 370 | .get_ls = spu_backing_get_ls, |
371 | .runcntl_read = spu_backing_runcntl_read, | ||
348 | .runcntl_write = spu_backing_runcntl_write, | 372 | .runcntl_write = spu_backing_runcntl_write, |
349 | .runcntl_stop = spu_backing_runcntl_stop, | 373 | .master_start = spu_backing_master_start, |
374 | .master_stop = spu_backing_master_stop, | ||
350 | .set_mfc_query = spu_backing_set_mfc_query, | 375 | .set_mfc_query = spu_backing_set_mfc_query, |
351 | .read_mfc_tagstatus = spu_backing_read_mfc_tagstatus, | 376 | .read_mfc_tagstatus = spu_backing_read_mfc_tagstatus, |
352 | .get_mfc_free_elements = spu_backing_get_mfc_free_elements, | 377 | .get_mfc_free_elements = spu_backing_get_mfc_free_elements, |