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Diffstat (limited to 'arch/powerpc/platforms/86xx/mpc86xx_hpcn.c')
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c64
1 files changed, 1 insertions, 63 deletions
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index f13704aabbe..7916599c912 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -28,7 +28,6 @@
28#include <asm/prom.h> 28#include <asm/prom.h>
29#include <mm/mmu_decl.h> 29#include <mm/mmu_decl.h>
30#include <asm/udbg.h> 30#include <asm/udbg.h>
31#include <asm/i8259.h>
32 31
33#include <asm/mpic.h> 32#include <asm/mpic.h>
34 33
@@ -46,67 +45,6 @@
46#endif 45#endif
47 46
48#ifdef CONFIG_PCI 47#ifdef CONFIG_PCI
49static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
50{
51 unsigned int cascade_irq = i8259_irq();
52 if (cascade_irq != NO_IRQ)
53 generic_handle_irq(cascade_irq);
54 desc->chip->eoi(irq);
55}
56#endif /* CONFIG_PCI */
57
58static void __init
59mpc86xx_hpcn_init_irq(void)
60{
61 struct mpic *mpic1;
62 struct device_node *np;
63 struct resource res;
64#ifdef CONFIG_PCI
65 struct device_node *cascade_node = NULL;
66 int cascade_irq;
67#endif
68
69 /* Determine PIC address. */
70 np = of_find_node_by_type(NULL, "open-pic");
71 if (np == NULL)
72 return;
73 of_address_to_resource(np, 0, &res);
74
75 /* Alloc mpic structure and per isu has 16 INT entries. */
76 mpic1 = mpic_alloc(np, res.start,
77 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
78 0, 256, " MPIC ");
79 BUG_ON(mpic1 == NULL);
80
81 mpic_init(mpic1);
82
83#ifdef CONFIG_PCI
84 /* Initialize i8259 controller */
85 for_each_node_by_type(np, "interrupt-controller")
86 if (of_device_is_compatible(np, "chrp,iic")) {
87 cascade_node = np;
88 break;
89 }
90 if (cascade_node == NULL) {
91 printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
92 return;
93 }
94
95 cascade_irq = irq_of_parse_and_map(cascade_node, 0);
96 if (cascade_irq == NO_IRQ) {
97 printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
98 return;
99 }
100 DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
101
102 i8259_init(cascade_node, 0);
103 of_node_put(cascade_node);
104
105 set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
106#endif
107}
108
109#ifdef CONFIG_PCI
110extern int uses_fsl_uli_m1575; 48extern int uses_fsl_uli_m1575;
111extern int uli_exclude_device(struct pci_controller *hose, 49extern int uli_exclude_device(struct pci_controller *hose,
112 u_char bus, u_char devfn); 50 u_char bus, u_char devfn);
@@ -237,7 +175,7 @@ define_machine(mpc86xx_hpcn) {
237 .name = "MPC86xx HPCN", 175 .name = "MPC86xx HPCN",
238 .probe = mpc86xx_hpcn_probe, 176 .probe = mpc86xx_hpcn_probe,
239 .setup_arch = mpc86xx_hpcn_setup_arch, 177 .setup_arch = mpc86xx_hpcn_setup_arch,
240 .init_IRQ = mpc86xx_hpcn_init_irq, 178 .init_IRQ = mpc86xx_init_irq,
241 .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo, 179 .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
242 .get_irq = mpic_get_irq, 180 .get_irq = mpic_get_irq,
243 .restart = fsl_rstcr_restart, 181 .restart = fsl_rstcr_restart,