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Diffstat (limited to 'arch/powerpc/platforms/86xx/mpc8610_hpcd.c')
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c55
1 files changed, 25 insertions, 30 deletions
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 74e018ef724..13fa9a6403e 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -152,10 +152,10 @@ machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
152 (c2 << AD_COMP_2_SHIFT) | (c1 << AD_COMP_1_SHIFT) | \ 152 (c2 << AD_COMP_2_SHIFT) | (c1 << AD_COMP_1_SHIFT) | \
153 (c0 << AD_COMP_0_SHIFT) | (size << AD_PIXEL_S_SHIFT)) 153 (c0 << AD_COMP_0_SHIFT) | (size << AD_PIXEL_S_SHIFT))
154 154
155unsigned int mpc8610hpcd_get_pixel_format(unsigned int bits_per_pixel, 155u32 mpc8610hpcd_get_pixel_format(enum fsl_diu_monitor_port port,
156 int monitor_port) 156 unsigned int bits_per_pixel)
157{ 157{
158 static const unsigned long pixelformat[][3] = { 158 static const u32 pixelformat[][3] = {
159 { 159 {
160 MAKE_AD(3, 0, 2, 1, 3, 8, 8, 8, 8), 160 MAKE_AD(3, 0, 2, 1, 3, 8, 8, 8, 8),
161 MAKE_AD(4, 2, 0, 1, 2, 8, 8, 8, 0), 161 MAKE_AD(4, 2, 0, 1, 2, 8, 8, 8, 0),
@@ -170,7 +170,8 @@ unsigned int mpc8610hpcd_get_pixel_format(unsigned int bits_per_pixel,
170 unsigned int arch_monitor; 170 unsigned int arch_monitor;
171 171
172 /* The DVI port is mis-wired on revision 1 of this board. */ 172 /* The DVI port is mis-wired on revision 1 of this board. */
173 arch_monitor = ((*pixis_arch == 0x01) && (monitor_port == 0))? 0 : 1; 173 arch_monitor =
174 ((*pixis_arch == 0x01) && (port == FSL_DIU_PORT_DVI)) ? 0 : 1;
174 175
175 switch (bits_per_pixel) { 176 switch (bits_per_pixel) {
176 case 32: 177 case 32:
@@ -185,10 +186,11 @@ unsigned int mpc8610hpcd_get_pixel_format(unsigned int bits_per_pixel,
185 } 186 }
186} 187}
187 188
188void mpc8610hpcd_set_gamma_table(int monitor_port, char *gamma_table_base) 189void mpc8610hpcd_set_gamma_table(enum fsl_diu_monitor_port port,
190 char *gamma_table_base)
189{ 191{
190 int i; 192 int i;
191 if (monitor_port == 2) { /* dual link LVDS */ 193 if (port == FSL_DIU_PORT_DLVDS) {
192 for (i = 0; i < 256*3; i++) 194 for (i = 0; i < 256*3; i++)
193 gamma_table_base[i] = (gamma_table_base[i] << 2) | 195 gamma_table_base[i] = (gamma_table_base[i] << 2) |
194 ((gamma_table_base[i] >> 6) & 0x03); 196 ((gamma_table_base[i] >> 6) & 0x03);
@@ -199,17 +201,21 @@ void mpc8610hpcd_set_gamma_table(int monitor_port, char *gamma_table_base)
199#define PX_BRDCFG0_DLINK (1 << 4) 201#define PX_BRDCFG0_DLINK (1 << 4)
200#define PX_BRDCFG0_DIU_MASK (PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK) 202#define PX_BRDCFG0_DIU_MASK (PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK)
201 203
202void mpc8610hpcd_set_monitor_port(int monitor_port) 204void mpc8610hpcd_set_monitor_port(enum fsl_diu_monitor_port port)
203{ 205{
204 static const u8 bdcfg[] = { 206 switch (port) {
205 PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK, 207 case FSL_DIU_PORT_DVI:
206 PX_BRDCFG0_DLINK,
207 0,
208 };
209
210 if (monitor_port < 3)
211 clrsetbits_8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK, 208 clrsetbits_8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK,
212 bdcfg[monitor_port]); 209 PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK);
210 break;
211 case FSL_DIU_PORT_LVDS:
212 clrsetbits_8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK,
213 PX_BRDCFG0_DLINK);
214 break;
215 case FSL_DIU_PORT_DLVDS:
216 clrbits8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK);
217 break;
218 }
213} 219}
214 220
215/** 221/**
@@ -262,20 +268,10 @@ void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
262 iounmap(guts); 268 iounmap(guts);
263} 269}
264 270
265ssize_t mpc8610hpcd_show_monitor_port(int monitor_port, char *buf) 271enum fsl_diu_monitor_port
266{ 272mpc8610hpcd_valid_monitor_port(enum fsl_diu_monitor_port port)
267 return snprintf(buf, PAGE_SIZE,
268 "%c0 - DVI\n"
269 "%c1 - Single link LVDS\n"
270 "%c2 - Dual link LVDS\n",
271 monitor_port == 0 ? '*' : ' ',
272 monitor_port == 1 ? '*' : ' ',
273 monitor_port == 2 ? '*' : ' ');
274}
275
276int mpc8610hpcd_set_sysfs_monitor_port(int val)
277{ 273{
278 return val < 3 ? val : 0; 274 return port;
279} 275}
280 276
281#endif 277#endif
@@ -307,8 +303,7 @@ static void __init mpc86xx_hpcd_setup_arch(void)
307 diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table; 303 diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table;
308 diu_ops.set_monitor_port = mpc8610hpcd_set_monitor_port; 304 diu_ops.set_monitor_port = mpc8610hpcd_set_monitor_port;
309 diu_ops.set_pixel_clock = mpc8610hpcd_set_pixel_clock; 305 diu_ops.set_pixel_clock = mpc8610hpcd_set_pixel_clock;
310 diu_ops.show_monitor_port = mpc8610hpcd_show_monitor_port; 306 diu_ops.valid_monitor_port = mpc8610hpcd_valid_monitor_port;
311 diu_ops.set_sysfs_monitor_port = mpc8610hpcd_set_sysfs_monitor_port;
312#endif 307#endif
313 308
314 pixis_node = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis"); 309 pixis_node = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis");