diff options
Diffstat (limited to 'arch/powerpc/platforms/85xx/mpc8540_ads.h')
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc8540_ads.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc8540_ads.h b/arch/powerpc/platforms/85xx/mpc8540_ads.h new file mode 100644 index 00000000000..47609c97e01 --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc8540_ads.h | |||
@@ -0,0 +1,60 @@ | |||
1 | /* | ||
2 | * arch/ppc/platforms/85xx/mpc8540_ads.h | ||
3 | * | ||
4 | * MPC8540ADS board definitions | ||
5 | * | ||
6 | * Maintainer: Kumar Gala <kumar.gala@freescale.com> | ||
7 | * | ||
8 | * Copyright 2004 Freescale Semiconductor Inc. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | #ifndef __MACH_MPC8540ADS_H__ | ||
18 | #define __MACH_MPC8540ADS_H__ | ||
19 | |||
20 | #include <linux/config.h> | ||
21 | #include <linux/initrd.h> | ||
22 | |||
23 | #define BOARD_CCSRBAR ((uint)0xe0000000) | ||
24 | #define BCSR_ADDR ((uint)0xf8000000) | ||
25 | #define BCSR_SIZE ((uint)(32 * 1024)) | ||
26 | |||
27 | /* PCI interrupt controller */ | ||
28 | #define PIRQA MPC85xx_IRQ_EXT1 | ||
29 | #define PIRQB MPC85xx_IRQ_EXT2 | ||
30 | #define PIRQC MPC85xx_IRQ_EXT3 | ||
31 | #define PIRQD MPC85xx_IRQ_EXT4 | ||
32 | |||
33 | #define MPC85XX_PCI1_LOWER_IO 0x00000000 | ||
34 | #define MPC85XX_PCI1_UPPER_IO 0x00ffffff | ||
35 | |||
36 | #define MPC85XX_PCI1_LOWER_MEM 0x80000000 | ||
37 | #define MPC85XX_PCI1_UPPER_MEM 0x9fffffff | ||
38 | |||
39 | #define MPC85XX_PCI1_IO_BASE 0xe2000000 | ||
40 | #define MPC85XX_PCI1_MEM_OFFSET 0x00000000 | ||
41 | |||
42 | #define MPC85XX_PCI1_IO_SIZE 0x01000000 | ||
43 | |||
44 | /* PCI config */ | ||
45 | #define PCI1_CFG_ADDR_OFFSET (0x8000) | ||
46 | #define PCI1_CFG_DATA_OFFSET (0x8004) | ||
47 | |||
48 | #define PCI2_CFG_ADDR_OFFSET (0x9000) | ||
49 | #define PCI2_CFG_DATA_OFFSET (0x9004) | ||
50 | |||
51 | /* Additional register for PCI-X configuration */ | ||
52 | #define PCIX_NEXT_CAP 0x60 | ||
53 | #define PCIX_CAP_ID 0x61 | ||
54 | #define PCIX_COMMAND 0x62 | ||
55 | #define PCIX_STATUS 0x64 | ||
56 | |||
57 | /* Offset of CPM register space */ | ||
58 | #define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET) | ||
59 | |||
60 | #endif /* __MACH_MPC8540ADS_H__ */ | ||