aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/kvm/book3s_emulate.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/kvm/book3s_emulate.c')
-rw-r--r--arch/powerpc/kvm/book3s_emulate.c566
1 files changed, 566 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
new file mode 100644
index 00000000000..8f50776a9a1
--- /dev/null
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -0,0 +1,566 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#include <asm/kvm_ppc.h>
21#include <asm/disassemble.h>
22#include <asm/kvm_book3s.h>
23#include <asm/reg.h>
24
25#define OP_19_XOP_RFID 18
26#define OP_19_XOP_RFI 50
27
28#define OP_31_XOP_MFMSR 83
29#define OP_31_XOP_MTMSR 146
30#define OP_31_XOP_MTMSRD 178
31#define OP_31_XOP_MTSR 210
32#define OP_31_XOP_MTSRIN 242
33#define OP_31_XOP_TLBIEL 274
34#define OP_31_XOP_TLBIE 306
35#define OP_31_XOP_SLBMTE 402
36#define OP_31_XOP_SLBIE 434
37#define OP_31_XOP_SLBIA 498
38#define OP_31_XOP_MFSR 595
39#define OP_31_XOP_MFSRIN 659
40#define OP_31_XOP_DCBA 758
41#define OP_31_XOP_SLBMFEV 851
42#define OP_31_XOP_EIOIO 854
43#define OP_31_XOP_SLBMFEE 915
44
45/* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
46#define OP_31_XOP_DCBZ 1010
47
48#define OP_LFS 48
49#define OP_LFD 50
50#define OP_STFS 52
51#define OP_STFD 54
52
53#define SPRN_GQR0 912
54#define SPRN_GQR1 913
55#define SPRN_GQR2 914
56#define SPRN_GQR3 915
57#define SPRN_GQR4 916
58#define SPRN_GQR5 917
59#define SPRN_GQR6 918
60#define SPRN_GQR7 919
61
62int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
63 unsigned int inst, int *advance)
64{
65 int emulated = EMULATE_DONE;
66
67 switch (get_op(inst)) {
68 case 19:
69 switch (get_xop(inst)) {
70 case OP_19_XOP_RFID:
71 case OP_19_XOP_RFI:
72 vcpu->arch.pc = vcpu->arch.srr0;
73 kvmppc_set_msr(vcpu, vcpu->arch.srr1);
74 *advance = 0;
75 break;
76
77 default:
78 emulated = EMULATE_FAIL;
79 break;
80 }
81 break;
82 case 31:
83 switch (get_xop(inst)) {
84 case OP_31_XOP_MFMSR:
85 kvmppc_set_gpr(vcpu, get_rt(inst), vcpu->arch.msr);
86 break;
87 case OP_31_XOP_MTMSRD:
88 {
89 ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));
90 if (inst & 0x10000) {
91 vcpu->arch.msr &= ~(MSR_RI | MSR_EE);
92 vcpu->arch.msr |= rs & (MSR_RI | MSR_EE);
93 } else
94 kvmppc_set_msr(vcpu, rs);
95 break;
96 }
97 case OP_31_XOP_MTMSR:
98 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst)));
99 break;
100 case OP_31_XOP_MFSR:
101 {
102 int srnum;
103
104 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
105 if (vcpu->arch.mmu.mfsrin) {
106 u32 sr;
107 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
108 kvmppc_set_gpr(vcpu, get_rt(inst), sr);
109 }
110 break;
111 }
112 case OP_31_XOP_MFSRIN:
113 {
114 int srnum;
115
116 srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf;
117 if (vcpu->arch.mmu.mfsrin) {
118 u32 sr;
119 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
120 kvmppc_set_gpr(vcpu, get_rt(inst), sr);
121 }
122 break;
123 }
124 case OP_31_XOP_MTSR:
125 vcpu->arch.mmu.mtsrin(vcpu,
126 (inst >> 16) & 0xf,
127 kvmppc_get_gpr(vcpu, get_rs(inst)));
128 break;
129 case OP_31_XOP_MTSRIN:
130 vcpu->arch.mmu.mtsrin(vcpu,
131 (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf,
132 kvmppc_get_gpr(vcpu, get_rs(inst)));
133 break;
134 case OP_31_XOP_TLBIE:
135 case OP_31_XOP_TLBIEL:
136 {
137 bool large = (inst & 0x00200000) ? true : false;
138 ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst));
139 vcpu->arch.mmu.tlbie(vcpu, addr, large);
140 break;
141 }
142 case OP_31_XOP_EIOIO:
143 break;
144 case OP_31_XOP_SLBMTE:
145 if (!vcpu->arch.mmu.slbmte)
146 return EMULATE_FAIL;
147
148 vcpu->arch.mmu.slbmte(vcpu,
149 kvmppc_get_gpr(vcpu, get_rs(inst)),
150 kvmppc_get_gpr(vcpu, get_rb(inst)));
151 break;
152 case OP_31_XOP_SLBIE:
153 if (!vcpu->arch.mmu.slbie)
154 return EMULATE_FAIL;
155
156 vcpu->arch.mmu.slbie(vcpu,
157 kvmppc_get_gpr(vcpu, get_rb(inst)));
158 break;
159 case OP_31_XOP_SLBIA:
160 if (!vcpu->arch.mmu.slbia)
161 return EMULATE_FAIL;
162
163 vcpu->arch.mmu.slbia(vcpu);
164 break;
165 case OP_31_XOP_SLBMFEE:
166 if (!vcpu->arch.mmu.slbmfee) {
167 emulated = EMULATE_FAIL;
168 } else {
169 ulong t, rb;
170
171 rb = kvmppc_get_gpr(vcpu, get_rb(inst));
172 t = vcpu->arch.mmu.slbmfee(vcpu, rb);
173 kvmppc_set_gpr(vcpu, get_rt(inst), t);
174 }
175 break;
176 case OP_31_XOP_SLBMFEV:
177 if (!vcpu->arch.mmu.slbmfev) {
178 emulated = EMULATE_FAIL;
179 } else {
180 ulong t, rb;
181
182 rb = kvmppc_get_gpr(vcpu, get_rb(inst));
183 t = vcpu->arch.mmu.slbmfev(vcpu, rb);
184 kvmppc_set_gpr(vcpu, get_rt(inst), t);
185 }
186 break;
187 case OP_31_XOP_DCBA:
188 /* Gets treated as NOP */
189 break;
190 case OP_31_XOP_DCBZ:
191 {
192 ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst));
193 ulong ra = 0;
194 ulong addr, vaddr;
195 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
196 u32 dsisr;
197 int r;
198
199 if (get_ra(inst))
200 ra = kvmppc_get_gpr(vcpu, get_ra(inst));
201
202 addr = (ra + rb) & ~31ULL;
203 if (!(vcpu->arch.msr & MSR_SF))
204 addr &= 0xffffffff;
205 vaddr = addr;
206
207 r = kvmppc_st(vcpu, &addr, 32, zeros, true);
208 if ((r == -ENOENT) || (r == -EPERM)) {
209 *advance = 0;
210 vcpu->arch.dear = vaddr;
211 vcpu->arch.fault_dear = vaddr;
212
213 dsisr = DSISR_ISSTORE;
214 if (r == -ENOENT)
215 dsisr |= DSISR_NOHPTE;
216 else if (r == -EPERM)
217 dsisr |= DSISR_PROTFAULT;
218
219 to_book3s(vcpu)->dsisr = dsisr;
220 vcpu->arch.fault_dsisr = dsisr;
221
222 kvmppc_book3s_queue_irqprio(vcpu,
223 BOOK3S_INTERRUPT_DATA_STORAGE);
224 }
225
226 break;
227 }
228 default:
229 emulated = EMULATE_FAIL;
230 }
231 break;
232 default:
233 emulated = EMULATE_FAIL;
234 }
235
236 if (emulated == EMULATE_FAIL)
237 emulated = kvmppc_emulate_paired_single(run, vcpu);
238
239 return emulated;
240}
241
242void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
243 u32 val)
244{
245 if (upper) {
246 /* Upper BAT */
247 u32 bl = (val >> 2) & 0x7ff;
248 bat->bepi_mask = (~bl << 17);
249 bat->bepi = val & 0xfffe0000;
250 bat->vs = (val & 2) ? 1 : 0;
251 bat->vp = (val & 1) ? 1 : 0;
252 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
253 } else {
254 /* Lower BAT */
255 bat->brpn = val & 0xfffe0000;
256 bat->wimg = (val >> 3) & 0xf;
257 bat->pp = val & 3;
258 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
259 }
260}
261
262static u32 kvmppc_read_bat(struct kvm_vcpu *vcpu, int sprn)
263{
264 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
265 struct kvmppc_bat *bat;
266
267 switch (sprn) {
268 case SPRN_IBAT0U ... SPRN_IBAT3L:
269 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
270 break;
271 case SPRN_IBAT4U ... SPRN_IBAT7L:
272 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
273 break;
274 case SPRN_DBAT0U ... SPRN_DBAT3L:
275 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
276 break;
277 case SPRN_DBAT4U ... SPRN_DBAT7L:
278 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
279 break;
280 default:
281 BUG();
282 }
283
284 if (sprn % 2)
285 return bat->raw >> 32;
286 else
287 return bat->raw;
288}
289
290static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val)
291{
292 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
293 struct kvmppc_bat *bat;
294
295 switch (sprn) {
296 case SPRN_IBAT0U ... SPRN_IBAT3L:
297 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
298 break;
299 case SPRN_IBAT4U ... SPRN_IBAT7L:
300 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
301 break;
302 case SPRN_DBAT0U ... SPRN_DBAT3L:
303 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
304 break;
305 case SPRN_DBAT4U ... SPRN_DBAT7L:
306 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
307 break;
308 default:
309 BUG();
310 }
311
312 kvmppc_set_bat(vcpu, bat, !(sprn % 2), val);
313}
314
315int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
316{
317 int emulated = EMULATE_DONE;
318 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
319
320 switch (sprn) {
321 case SPRN_SDR1:
322 to_book3s(vcpu)->sdr1 = spr_val;
323 break;
324 case SPRN_DSISR:
325 to_book3s(vcpu)->dsisr = spr_val;
326 break;
327 case SPRN_DAR:
328 vcpu->arch.dear = spr_val;
329 break;
330 case SPRN_HIOR:
331 to_book3s(vcpu)->hior = spr_val;
332 break;
333 case SPRN_IBAT0U ... SPRN_IBAT3L:
334 case SPRN_IBAT4U ... SPRN_IBAT7L:
335 case SPRN_DBAT0U ... SPRN_DBAT3L:
336 case SPRN_DBAT4U ... SPRN_DBAT7L:
337 kvmppc_write_bat(vcpu, sprn, (u32)spr_val);
338 /* BAT writes happen so rarely that we're ok to flush
339 * everything here */
340 kvmppc_mmu_pte_flush(vcpu, 0, 0);
341 kvmppc_mmu_flush_segments(vcpu);
342 break;
343 case SPRN_HID0:
344 to_book3s(vcpu)->hid[0] = spr_val;
345 break;
346 case SPRN_HID1:
347 to_book3s(vcpu)->hid[1] = spr_val;
348 break;
349 case SPRN_HID2:
350 to_book3s(vcpu)->hid[2] = spr_val;
351 break;
352 case SPRN_HID2_GEKKO:
353 to_book3s(vcpu)->hid[2] = spr_val;
354 /* HID2.PSE controls paired single on gekko */
355 switch (vcpu->arch.pvr) {
356 case 0x00080200: /* lonestar 2.0 */
357 case 0x00088202: /* lonestar 2.2 */
358 case 0x70000100: /* gekko 1.0 */
359 case 0x00080100: /* gekko 2.0 */
360 case 0x00083203: /* gekko 2.3a */
361 case 0x00083213: /* gekko 2.3b */
362 case 0x00083204: /* gekko 2.4 */
363 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
364 if (spr_val & (1 << 29)) { /* HID2.PSE */
365 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
366 kvmppc_giveup_ext(vcpu, MSR_FP);
367 } else {
368 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
369 }
370 break;
371 }
372 break;
373 case SPRN_HID4:
374 case SPRN_HID4_GEKKO:
375 to_book3s(vcpu)->hid[4] = spr_val;
376 break;
377 case SPRN_HID5:
378 to_book3s(vcpu)->hid[5] = spr_val;
379 /* guest HID5 set can change is_dcbz32 */
380 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
381 (mfmsr() & MSR_HV))
382 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
383 break;
384 case SPRN_GQR0:
385 case SPRN_GQR1:
386 case SPRN_GQR2:
387 case SPRN_GQR3:
388 case SPRN_GQR4:
389 case SPRN_GQR5:
390 case SPRN_GQR6:
391 case SPRN_GQR7:
392 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
393 break;
394 case SPRN_ICTC:
395 case SPRN_THRM1:
396 case SPRN_THRM2:
397 case SPRN_THRM3:
398 case SPRN_CTRLF:
399 case SPRN_CTRLT:
400 case SPRN_L2CR:
401 case SPRN_MMCR0_GEKKO:
402 case SPRN_MMCR1_GEKKO:
403 case SPRN_PMC1_GEKKO:
404 case SPRN_PMC2_GEKKO:
405 case SPRN_PMC3_GEKKO:
406 case SPRN_PMC4_GEKKO:
407 case SPRN_WPAR_GEKKO:
408 break;
409 default:
410 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
411#ifndef DEBUG_SPR
412 emulated = EMULATE_FAIL;
413#endif
414 break;
415 }
416
417 return emulated;
418}
419
420int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
421{
422 int emulated = EMULATE_DONE;
423
424 switch (sprn) {
425 case SPRN_IBAT0U ... SPRN_IBAT3L:
426 case SPRN_IBAT4U ... SPRN_IBAT7L:
427 case SPRN_DBAT0U ... SPRN_DBAT3L:
428 case SPRN_DBAT4U ... SPRN_DBAT7L:
429 kvmppc_set_gpr(vcpu, rt, kvmppc_read_bat(vcpu, sprn));
430 break;
431 case SPRN_SDR1:
432 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
433 break;
434 case SPRN_DSISR:
435 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->dsisr);
436 break;
437 case SPRN_DAR:
438 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear);
439 break;
440 case SPRN_HIOR:
441 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
442 break;
443 case SPRN_HID0:
444 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]);
445 break;
446 case SPRN_HID1:
447 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]);
448 break;
449 case SPRN_HID2:
450 case SPRN_HID2_GEKKO:
451 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]);
452 break;
453 case SPRN_HID4:
454 case SPRN_HID4_GEKKO:
455 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]);
456 break;
457 case SPRN_HID5:
458 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
459 break;
460 case SPRN_GQR0:
461 case SPRN_GQR1:
462 case SPRN_GQR2:
463 case SPRN_GQR3:
464 case SPRN_GQR4:
465 case SPRN_GQR5:
466 case SPRN_GQR6:
467 case SPRN_GQR7:
468 kvmppc_set_gpr(vcpu, rt,
469 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]);
470 break;
471 case SPRN_THRM1:
472 case SPRN_THRM2:
473 case SPRN_THRM3:
474 case SPRN_CTRLF:
475 case SPRN_CTRLT:
476 case SPRN_L2CR:
477 case SPRN_MMCR0_GEKKO:
478 case SPRN_MMCR1_GEKKO:
479 case SPRN_PMC1_GEKKO:
480 case SPRN_PMC2_GEKKO:
481 case SPRN_PMC3_GEKKO:
482 case SPRN_PMC4_GEKKO:
483 case SPRN_WPAR_GEKKO:
484 kvmppc_set_gpr(vcpu, rt, 0);
485 break;
486 default:
487 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
488#ifndef DEBUG_SPR
489 emulated = EMULATE_FAIL;
490#endif
491 break;
492 }
493
494 return emulated;
495}
496
497u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
498{
499 u32 dsisr = 0;
500
501 /*
502 * This is what the spec says about DSISR bits (not mentioned = 0):
503 *
504 * 12:13 [DS] Set to bits 30:31
505 * 15:16 [X] Set to bits 29:30
506 * 17 [X] Set to bit 25
507 * [D/DS] Set to bit 5
508 * 18:21 [X] Set to bits 21:24
509 * [D/DS] Set to bits 1:4
510 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
511 * 27:31 Set to bits 11:15 (RA)
512 */
513
514 switch (get_op(inst)) {
515 /* D-form */
516 case OP_LFS:
517 case OP_LFD:
518 case OP_STFD:
519 case OP_STFS:
520 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */
521 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
522 break;
523 /* X-form */
524 case 31:
525 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
526 dsisr |= (inst << 8) & 0x04000; /* bit 17 */
527 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */
528 break;
529 default:
530 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
531 break;
532 }
533
534 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
535
536 return dsisr;
537}
538
539ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
540{
541 ulong dar = 0;
542 ulong ra;
543
544 switch (get_op(inst)) {
545 case OP_LFS:
546 case OP_LFD:
547 case OP_STFD:
548 case OP_STFS:
549 ra = get_ra(inst);
550 if (ra)
551 dar = kvmppc_get_gpr(vcpu, ra);
552 dar += (s32)((s16)inst);
553 break;
554 case 31:
555 ra = get_ra(inst);
556 if (ra)
557 dar = kvmppc_get_gpr(vcpu, ra);
558 dar += kvmppc_get_gpr(vcpu, get_rb(inst));
559 break;
560 default:
561 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
562 break;
563 }
564
565 return dar;
566}
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-17 01:42:08 -0400