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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 */
19
20#ifndef __LINUX_KVM_POWERPC_H
21#define __LINUX_KVM_POWERPC_H
22
23#include <linux/types.h>
24
25/* Select powerpc specific features in <linux/kvm.h> */
26#define __KVM_HAVE_SPAPR_TCE
27#define __KVM_HAVE_PPC_SMT
28
29struct kvm_regs {
30 __u64 pc;
31 __u64 cr;
32 __u64 ctr;
33 __u64 lr;
34 __u64 xer;
35 __u64 msr;
36 __u64 srr0;
37 __u64 srr1;
38 __u64 pid;
39
40 __u64 sprg0;
41 __u64 sprg1;
42 __u64 sprg2;
43 __u64 sprg3;
44 __u64 sprg4;
45 __u64 sprg5;
46 __u64 sprg6;
47 __u64 sprg7;
48
49 __u64 gpr[32];
50};
51
52#define KVM_SREGS_E_IMPL_NONE 0
53#define KVM_SREGS_E_IMPL_FSL 1
54
55#define KVM_SREGS_E_FSL_PIDn (1 << 0) /* PID1/PID2 */
56
57/*
58 * Feature bits indicate which sections of the sregs struct are valid,
59 * both in KVM_GET_SREGS and KVM_SET_SREGS. On KVM_SET_SREGS, registers
60 * corresponding to unset feature bits will not be modified. This allows
61 * restoring a checkpoint made without that feature, while keeping the
62 * default values of the new registers.
63 *
64 * KVM_SREGS_E_BASE contains:
65 * CSRR0/1 (refers to SRR2/3 on 40x)
66 * ESR
67 * DEAR
68 * MCSR
69 * TSR
70 * TCR
71 * DEC
72 * TB
73 * VRSAVE (USPRG0)
74 */
75#define KVM_SREGS_E_BASE (1 << 0)
76
77/*
78 * KVM_SREGS_E_ARCH206 contains:
79 *
80 * PIR
81 * MCSRR0/1
82 * DECAR
83 * IVPR
84 */
85#define KVM_SREGS_E_ARCH206 (1 << 1)
86
87/*
88 * Contains EPCR, plus the upper half of 64-bit registers
89 * that are 32-bit on 32-bit implementations.
90 */
91#define KVM_SREGS_E_64 (1 << 2)
92
93#define KVM_SREGS_E_SPRG8 (1 << 3)
94#define KVM_SREGS_E_MCIVPR (1 << 4)
95
96/*
97 * IVORs are used -- contains IVOR0-15, plus additional IVORs
98 * in combination with an appropriate feature bit.
99 */
100#define KVM_SREGS_E_IVOR (1 << 5)
101
102/*
103 * Contains MAS0-4, MAS6-7, TLBnCFG, MMUCFG.
104 * Also TLBnPS if MMUCFG[MAVN] = 1.
105 */
106#define KVM_SREGS_E_ARCH206_MMU (1 << 6)
107
108/* DBSR, DBCR, IAC, DAC, DVC */
109#define KVM_SREGS_E_DEBUG (1 << 7)
110
111/* Enhanced debug -- DSRR0/1, SPRG9 */
112#define KVM_SREGS_E_ED (1 << 8)
113
114/* Embedded Floating Point (SPE) -- IVOR32-34 if KVM_SREGS_E_IVOR */
115#define KVM_SREGS_E_SPE (1 << 9)
116
117/* External Proxy (EXP) -- EPR */
118#define KVM_SREGS_EXP (1 << 10)
119
120/* External PID (E.PD) -- EPSC/EPLC */
121#define KVM_SREGS_E_PD (1 << 11)
122
123/* Processor Control (E.PC) -- IVOR36-37 if KVM_SREGS_E_IVOR */
124#define KVM_SREGS_E_PC (1 << 12)
125
126/* Page table (E.PT) -- EPTCFG */
127#define KVM_SREGS_E_PT (1 << 13)
128
129/* Embedded Performance Monitor (E.PM) -- IVOR35 if KVM_SREGS_E_IVOR */
130#define KVM_SREGS_E_PM (1 << 14)
131
132/*
133 * Special updates:
134 *
135 * Some registers may change even while a vcpu is not running.
136 * To avoid losing these changes, by default these registers are
137 * not updated by KVM_SET_SREGS. To force an update, set the bit
138 * in u.e.update_special corresponding to the register to be updated.
139 *
140 * The update_special field is zero on return from KVM_GET_SREGS.
141 *
142 * When restoring a checkpoint, the caller can set update_special
143 * to 0xffffffff to ensure that everything is restored, even new features
144 * that the caller doesn't know about.
145 */
146#define KVM_SREGS_E_UPDATE_MCSR (1 << 0)
147#define KVM_SREGS_E_UPDATE_TSR (1 << 1)
148#define KVM_SREGS_E_UPDATE_DEC (1 << 2)
149#define KVM_SREGS_E_UPDATE_DBSR (1 << 3)
150
151/*
152 * In KVM_SET_SREGS, reserved/pad fields must be left untouched from a
153 * previous KVM_GET_REGS.
154 *
155 * Unless otherwise indicated, setting any register with KVM_SET_SREGS
156 * directly sets its value. It does not trigger any special semantics such
157 * as write-one-to-clear. Calling KVM_SET_SREGS on an unmodified struct
158 * just received from KVM_GET_SREGS is always a no-op.
159 */
160struct kvm_sregs {
161 __u32 pvr;
162 union {
163 struct {
164 __u64 sdr1;
165 struct {
166 struct {
167 __u64 slbe;
168 __u64 slbv;
169 } slb[64];
170 } ppc64;
171 struct {
172 __u32 sr[16];
173 __u64 ibat[8];
174 __u64 dbat[8];
175 } ppc32;
176 } s;
177 struct {
178 union {
179 struct { /* KVM_SREGS_E_IMPL_FSL */
180 __u32 features; /* KVM_SREGS_E_FSL_ */
181 __u32 svr;
182 __u64 mcar;
183 __u32 hid0;
184
185 /* KVM_SREGS_E_FSL_PIDn */
186 __u32 pid1, pid2;
187 } fsl;
188 __u8 pad[256];
189 } impl;
190
191 __u32 features; /* KVM_SREGS_E_ */
192 __u32 impl_id; /* KVM_SREGS_E_IMPL_ */
193 __u32 update_special; /* KVM_SREGS_E_UPDATE_ */
194 __u32 pir; /* read-only */
195 __u64 sprg8;
196 __u64 sprg9; /* E.ED */
197 __u64 csrr0;
198 __u64 dsrr0; /* E.ED */
199 __u64 mcsrr0;
200 __u32 csrr1;
201 __u32 dsrr1; /* E.ED */
202 __u32 mcsrr1;
203 __u32 esr;
204 __u64 dear;
205 __u64 ivpr;
206 __u64 mcivpr;
207 __u64 mcsr; /* KVM_SREGS_E_UPDATE_MCSR */
208
209 __u32 tsr; /* KVM_SREGS_E_UPDATE_TSR */
210 __u32 tcr;
211 __u32 decar;
212 __u32 dec; /* KVM_SREGS_E_UPDATE_DEC */
213
214 /*
215 * Userspace can read TB directly, but the
216 * value reported here is consistent with "dec".
217 *
218 * Read-only.
219 */
220 __u64 tb;
221
222 __u32 dbsr; /* KVM_SREGS_E_UPDATE_DBSR */
223 __u32 dbcr[3];
224 __u32 iac[4];
225 __u32 dac[2];
226 __u32 dvc[2];
227 __u8 num_iac; /* read-only */
228 __u8 num_dac; /* read-only */
229 __u8 num_dvc; /* read-only */
230 __u8 pad;
231
232 __u32 epr; /* EXP */
233 __u32 vrsave; /* a.k.a. USPRG0 */
234 __u32 epcr; /* KVM_SREGS_E_64 */
235
236 __u32 mas0;
237 __u32 mas1;
238 __u64 mas2;
239 __u64 mas7_3;
240 __u32 mas4;
241 __u32 mas6;
242
243 __u32 ivor_low[16]; /* IVOR0-15 */
244 __u32 ivor_high[18]; /* IVOR32+, plus room to expand */
245
246 __u32 mmucfg; /* read-only */
247 __u32 eptcfg; /* E.PT, read-only */
248 __u32 tlbcfg[4];/* read-only */
249 __u32 tlbps[4]; /* read-only */
250
251 __u32 eplc, epsc; /* E.PD */
252 } e;
253 __u8 pad[1020];
254 } u;
255};
256
257struct kvm_fpu {
258 __u64 fpr[32];
259};
260
261struct kvm_debug_exit_arch {
262};
263
264/* for KVM_SET_GUEST_DEBUG */
265struct kvm_guest_debug_arch {
266};
267
268#define KVM_REG_MASK 0x001f
269#define KVM_REG_EXT_MASK 0xffe0
270#define KVM_REG_GPR 0x0000
271#define KVM_REG_FPR 0x0020
272#define KVM_REG_QPR 0x0040
273#define KVM_REG_FQPR 0x0060
274
275#define KVM_INTERRUPT_SET -1U
276#define KVM_INTERRUPT_UNSET -2U
277#define KVM_INTERRUPT_SET_LEVEL -3U
278
279/* for KVM_CAP_SPAPR_TCE */
280struct kvm_create_spapr_tce {
281 __u64 liobn;
282 __u32 window_size;
283};
284
285/* for KVM_ALLOCATE_RMA */
286struct kvm_allocate_rma {
287 __u64 rma_size;
288};
289
290#endif /* __LINUX_KVM_POWERPC_H */
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