aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/mpc8378_rdb.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8378_rdb.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts165
1 files changed, 99 insertions, 66 deletions
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 37c8555cc8d..5d90e85704c 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -127,37 +127,54 @@
127 gpio-controller; 127 gpio-controller;
128 }; 128 };
129 129
130 i2c@3000 { 130 sleep-nexus {
131 #address-cells = <1>; 131 #address-cells = <1>;
132 #size-cells = <0>; 132 #size-cells = <1>;
133 cell-index = <0>; 133 compatible = "simple-bus";
134 compatible = "fsl-i2c"; 134 sleep = <&pmc 0x0c000000>;
135 reg = <0x3000 0x100>; 135 ranges;
136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>;
138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149 136
150 rtc@68 { 137 i2c@3000 {
151 compatible = "dallas,ds1339"; 138 #address-cells = <1>;
152 reg = <0x68>; 139 #size-cells = <0>;
140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>;
145 dfsrr;
146
147 dtt@48 {
148 compatible = "national,lm75";
149 reg = <0x48>;
150 };
151
152 at24@50 {
153 compatible = "at24,24c256";
154 reg = <0x50>;
155 };
156
157 rtc@68 {
158 compatible = "dallas,ds1339";
159 reg = <0x68>;
160 };
161
162 mcu_pio: mcu@a {
163 #gpio-cells = <2>;
164 compatible = "fsl,mc9s08qg8-mpc8378erdb",
165 "fsl,mcu-mpc8349emitx";
166 reg = <0x0a>;
167 gpio-controller;
168 };
153 }; 169 };
154 170
155 mcu_pio: mcu@a { 171 sdhci@2e000 {
156 #gpio-cells = <2>; 172 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
157 compatible = "fsl,mc9s08qg8-mpc8378erdb", 173 reg = <0x2e000 0x1000>;
158 "fsl,mcu-mpc8349emitx"; 174 interrupts = <42 0x8>;
159 reg = <0x0a>; 175 interrupt-parent = <&ipic>;
160 gpio-controller; 176 /* Filled in by U-Boot */
177 clock-frequency = <0>;
161 }; 178 };
162 }; 179 };
163 180
@@ -228,62 +245,76 @@
228 interrupt-parent = <&ipic>; 245 interrupt-parent = <&ipic>;
229 interrupts = <38 0x8>; 246 interrupts = <38 0x8>;
230 phy_type = "ulpi"; 247 phy_type = "ulpi";
248 sleep = <&pmc 0x00c00000>;
231 }; 249 };
232 250
233 mdio@24520 {
234 #address-cells = <1>;
235 #size-cells = <0>;
236 compatible = "fsl,gianfar-mdio";
237 reg = <0x24520 0x20>;
238 phy2: ethernet-phy@2 {
239 interrupt-parent = <&ipic>;
240 interrupts = <17 0x8>;
241 reg = <0x2>;
242 device_type = "ethernet-phy";
243 };
244 tbi0: tbi-phy@11 {
245 reg = <0x11>;
246 device_type = "tbi-phy";
247 };
248 };
249
250 mdio@25520 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,gianfar-tbi";
254 reg = <0x25520 0x20>;
255
256 tbi1: tbi-phy@11 {
257 reg = <0x11>;
258 device_type = "tbi-phy";
259 };
260 };
261
262
263 enet0: ethernet@24000 { 251 enet0: ethernet@24000 {
252 #address-cells = <1>;
253 #size-cells = <1>;
264 cell-index = <0>; 254 cell-index = <0>;
265 device_type = "network"; 255 device_type = "network";
266 model = "eTSEC"; 256 model = "eTSEC";
267 compatible = "gianfar"; 257 compatible = "gianfar";
268 reg = <0x24000 0x1000>; 258 reg = <0x24000 0x1000>;
259 ranges = <0x0 0x24000 0x1000>;
269 local-mac-address = [ 00 00 00 00 00 00 ]; 260 local-mac-address = [ 00 00 00 00 00 00 ];
270 interrupts = <32 0x8 33 0x8 34 0x8>; 261 interrupts = <32 0x8 33 0x8 34 0x8>;
271 phy-connection-type = "mii"; 262 phy-connection-type = "mii";
272 interrupt-parent = <&ipic>; 263 interrupt-parent = <&ipic>;
264 tbi-handle = <&tbi0>;
273 phy-handle = <&phy2>; 265 phy-handle = <&phy2>;
266 sleep = <&pmc 0xc0000000>;
267 fsl,magic-packet;
268
269 mdio@520 {
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "fsl,gianfar-mdio";
273 reg = <0x520 0x20>;
274
275 phy2: ethernet-phy@2 {
276 interrupt-parent = <&ipic>;
277 interrupts = <17 0x8>;
278 reg = <0x2>;
279 device_type = "ethernet-phy";
280 };
281
282 tbi0: tbi-phy@11 {
283 reg = <0x11>;
284 device_type = "tbi-phy";
285 };
286 };
274 }; 287 };
275 288
276 enet1: ethernet@25000 { 289 enet1: ethernet@25000 {
290 #address-cells = <1>;
291 #size-cells = <1>;
277 cell-index = <1>; 292 cell-index = <1>;
278 device_type = "network"; 293 device_type = "network";
279 model = "eTSEC"; 294 model = "eTSEC";
280 compatible = "gianfar"; 295 compatible = "gianfar";
281 reg = <0x25000 0x1000>; 296 reg = <0x25000 0x1000>;
297 ranges = <0x0 0x25000 0x1000>;
282 local-mac-address = [ 00 00 00 00 00 00 ]; 298 local-mac-address = [ 00 00 00 00 00 00 ];
283 interrupts = <35 0x8 36 0x8 37 0x8>; 299 interrupts = <35 0x8 36 0x8 37 0x8>;
284 phy-connection-type = "mii"; 300 phy-connection-type = "mii";
285 interrupt-parent = <&ipic>; 301 interrupt-parent = <&ipic>;
286 fixed-link = <1 1 1000 0 0>; 302 fixed-link = <1 1 1000 0 0>;
303 tbi-handle = <&tbi1>;
304 sleep = <&pmc 0x30000000>;
305 fsl,magic-packet;
306
307 mdio@520 {
308 #address-cells = <1>;
309 #size-cells = <0>;
310 compatible = "fsl,gianfar-tbi";
311 reg = <0x520 0x20>;
312
313 tbi1: tbi-phy@11 {
314 reg = <0x11>;
315 device_type = "tbi-phy";
316 };
317 };
287 }; 318 };
288 319
289 serial0: serial@4500 { 320 serial0: serial@4500 {
@@ -316,15 +347,7 @@
316 fsl,channel-fifo-len = <24>; 347 fsl,channel-fifo-len = <24>;
317 fsl,exec-units-mask = <0x9fe>; 348 fsl,exec-units-mask = <0x9fe>;
318 fsl,descriptor-types-mask = <0x3ab0ebf>; 349 fsl,descriptor-types-mask = <0x3ab0ebf>;
319 }; 350 sleep = <&pmc 0x03000000>;
320
321 sdhci@2e000 {
322 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
323 reg = <0x2e000 0x1000>;
324 interrupts = <42 0x8>;
325 interrupt-parent = <&ipic>;
326 /* Filled in by U-Boot */
327 clock-frequency = <0>;
328 }; 351 };
329 352
330 /* IPIC 353 /* IPIC
@@ -340,6 +363,13 @@
340 #interrupt-cells = <2>; 363 #interrupt-cells = <2>;
341 reg = <0x700 0x100>; 364 reg = <0x700 0x100>;
342 }; 365 };
366
367 pmc: power@b00 {
368 compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
369 reg = <0xb00 0x100 0xa00 0x100>;
370 interrupts = <80 0x8>;
371 interrupt-parent = <&ipic>;
372 };
343 }; 373 };
344 374
345 pci0: pci@e0008500 { 375 pci0: pci@e0008500 {
@@ -365,6 +395,7 @@
365 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 395 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
366 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 396 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
367 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 397 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
398 sleep = <&pmc 0x00010000>;
368 clock-frequency = <66666666>; 399 clock-frequency = <66666666>;
369 #interrupt-cells = <1>; 400 #interrupt-cells = <1>;
370 #size-cells = <2>; 401 #size-cells = <2>;
@@ -390,6 +421,7 @@
390 0 0 0 2 &ipic 1 8 421 0 0 0 2 &ipic 1 8
391 0 0 0 3 &ipic 1 8 422 0 0 0 3 &ipic 1 8
392 0 0 0 4 &ipic 1 8>; 423 0 0 0 4 &ipic 1 8>;
424 sleep = <&pmc 0x00300000>;
393 clock-frequency = <0>; 425 clock-frequency = <0>;
394 426
395 pcie@0 { 427 pcie@0 {
@@ -421,6 +453,7 @@
421 0 0 0 2 &ipic 2 8 453 0 0 0 2 &ipic 2 8
422 0 0 0 3 &ipic 2 8 454 0 0 0 3 &ipic 2 8
423 0 0 0 4 &ipic 2 8>; 455 0 0 0 4 &ipic 2 8>;
456 sleep = <&pmc 0x000c0000>;
424 clock-frequency = <0>; 457 clock-frequency = <0>;
425 458
426 pcie@0 { 459 pcie@0 {