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Diffstat (limited to 'arch/powerpc/boot/dts/mpc8315erdb.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts64
1 files changed, 64 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 71784165b77..88d691cccb3 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -349,4 +351,66 @@
349 compatible = "fsl,mpc8349-pci"; 351 compatible = "fsl,mpc8349-pci";
350 device_type = "pci"; 352 device_type = "pci";
351 }; 353 };
354
355 pci1: pcie@e0009000 {
356 #address-cells = <3>;
357 #size-cells = <2>;
358 #interrupt-cells = <1>;
359 device_type = "pci";
360 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
361 reg = <0xe0009000 0x00001000>;
362 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
363 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
364 bus-range = <0 255>;
365 interrupt-map-mask = <0xf800 0 0 7>;
366 interrupt-map = <0 0 0 1 &ipic 1 8
367 0 0 0 2 &ipic 1 8
368 0 0 0 3 &ipic 1 8
369 0 0 0 4 &ipic 1 8>;
370 clock-frequency = <0>;
371
372 pcie@0 {
373 #address-cells = <3>;
374 #size-cells = <2>;
375 device_type = "pci";
376 reg = <0 0 0 0 0>;
377 ranges = <0x02000000 0 0xa0000000
378 0x02000000 0 0xa0000000
379 0 0x10000000
380 0x01000000 0 0x00000000
381 0x01000000 0 0x00000000
382 0 0x00800000>;
383 };
384 };
385
386 pci2: pcie@e000a000 {
387 #address-cells = <3>;
388 #size-cells = <2>;
389 #interrupt-cells = <1>;
390 device_type = "pci";
391 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
392 reg = <0xe000a000 0x00001000>;
393 ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000
394 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
395 bus-range = <0 255>;
396 interrupt-map-mask = <0xf800 0 0 7>;
397 interrupt-map = <0 0 0 1 &ipic 2 8
398 0 0 0 2 &ipic 2 8
399 0 0 0 3 &ipic 2 8
400 0 0 0 4 &ipic 2 8>;
401 clock-frequency = <0>;
402
403 pcie@0 {
404 #address-cells = <3>;
405 #size-cells = <2>;
406 device_type = "pci";
407 reg = <0 0 0 0 0>;
408 ranges = <0x02000000 0 0xc0000000
409 0x02000000 0 0xc0000000
410 0 0x10000000
411 0x01000000 0 0x00000000
412 0x01000000 0 0x00000000
413 0 0x00800000>;
414 };
415 };
352}; 416};