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Diffstat (limited to 'arch/powerpc/boot/dts/mpc7448hpc2.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc7448hpc2.dts72
1 files changed, 32 insertions, 40 deletions
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 6fa3754f293..765c306ecf8 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -16,12 +16,10 @@
16 compatible = "mpc74xx"; 16 compatible = "mpc74xx";
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 linux,phandle = <100>;
20 19
21 cpus { 20 cpus {
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells =<0>; 22 #size-cells =<0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,7448@0 { 24 PowerPC,7448@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 clock-frequency = <0>; // From U-Boot 32 clock-frequency = <0>; // From U-Boot
35 bus-frequency = <0>; // From U-Boot 33 bus-frequency = <0>; // From U-Boot
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 20000000 // DDR2 512M at 0 40 reg = <00000000 20000000 // DDR2 512M at 0
45 >; 41 >;
46 }; 42 };
@@ -55,7 +51,7 @@
55 bus-frequency = <0>; 51 bus-frequency = <0>;
56 52
57 i2c@7000 { 53 i2c@7000 {
58 interrupt-parent = <7400>; 54 interrupt-parent = <&mpic>;
59 interrupts = <E 0>; 55 interrupts = <E 0>;
60 reg = <7000 400>; 56 reg = <7000 400>;
61 device_type = "i2c"; 57 device_type = "i2c";
@@ -66,18 +62,16 @@
66 device_type = "mdio"; 62 device_type = "mdio";
67 compatible = "tsi-ethernet"; 63 compatible = "tsi-ethernet";
68 64
69 ethernet-phy@6000 { 65 phy8: ethernet-phy@6000 {
70 linux,phandle = <6000>; 66 interrupt-parent = <&mpic>;
71 interrupt-parent = <7400>;
72 interrupts = <2 1>; 67 interrupts = <2 1>;
73 reg = <6000 50>; 68 reg = <6000 50>;
74 phy-id = <8>; 69 phy-id = <8>;
75 device_type = "ethernet-phy"; 70 device_type = "ethernet-phy";
76 }; 71 };
77 72
78 ethernet-phy@6400 { 73 phy9: ethernet-phy@6400 {
79 linux,phandle = <6400>; 74 interrupt-parent = <&mpic>;
80 interrupt-parent = <7400>;
81 interrupts = <2 1>; 75 interrupts = <2 1>;
82 reg = <6000 50>; 76 reg = <6000 50>;
83 phy-id = <9>; 77 phy-id = <9>;
@@ -94,8 +88,8 @@
94 reg = <6000 200>; 88 reg = <6000 200>;
95 address = [ 00 06 D2 00 00 01 ]; 89 address = [ 00 06 D2 00 00 01 ];
96 interrupts = <10 2>; 90 interrupts = <10 2>;
97 interrupt-parent = <7400>; 91 interrupt-parent = <&mpic>;
98 phy-handle = <6000>; 92 phy-handle = <&phy8>;
99 }; 93 };
100 94
101 ethernet@6600 { 95 ethernet@6600 {
@@ -107,8 +101,8 @@
107 reg = <6400 200>; 101 reg = <6400 200>;
108 address = [ 00 06 D2 00 00 02 ]; 102 address = [ 00 06 D2 00 00 02 ];
109 interrupts = <11 2>; 103 interrupts = <11 2>;
110 interrupt-parent = <7400>; 104 interrupt-parent = <&mpic>;
111 phy-handle = <6400>; 105 phy-handle = <&phy9>;
112 }; 106 };
113 107
114 serial@7808 { 108 serial@7808 {
@@ -117,7 +111,7 @@
117 reg = <7808 200>; 111 reg = <7808 200>;
118 clock-frequency = <3f6b5a00>; 112 clock-frequency = <3f6b5a00>;
119 interrupts = <c 0>; 113 interrupts = <c 0>;
120 interrupt-parent = <7400>; 114 interrupt-parent = <&mpic>;
121 }; 115 };
122 116
123 serial@7c08 { 117 serial@7c08 {
@@ -126,11 +120,10 @@
126 reg = <7c08 200>; 120 reg = <7c08 200>;
127 clock-frequency = <3f6b5a00>; 121 clock-frequency = <3f6b5a00>;
128 interrupts = <d 0>; 122 interrupts = <d 0>;
129 interrupt-parent = <7400>; 123 interrupt-parent = <&mpic>;
130 }; 124 };
131 125
132 pic@7400 { 126 mpic: pic@7400 {
133 linux,phandle = <7400>;
134 clock-frequency = <0>; 127 clock-frequency = <0>;
135 interrupt-controller; 128 interrupt-controller;
136 #address-cells = <0>; 129 #address-cells = <0>;
@@ -144,7 +137,6 @@
144 pci@1000 { 137 pci@1000 {
145 compatible = "tsi10x"; 138 compatible = "tsi10x";
146 device_type = "pci"; 139 device_type = "pci";
147 linux,phandle = <1000>;
148 #interrupt-cells = <1>; 140 #interrupt-cells = <1>;
149 #size-cells = <2>; 141 #size-cells = <2>;
150 #address-cells = <3>; 142 #address-cells = <3>;
@@ -153,37 +145,37 @@
153 ranges = <02000000 0 e0000000 e0000000 0 1A000000 145 ranges = <02000000 0 e0000000 e0000000 0 1A000000
154 01000000 0 00000000 fa000000 0 00010000>; 146 01000000 0 00000000 fa000000 0 00010000>;
155 clock-frequency = <7f28154>; 147 clock-frequency = <7f28154>;
156 interrupt-parent = <7400>; 148 interrupt-parent = <&mpic>;
157 interrupts = <17 2>; 149 interrupts = <17 2>;
158 interrupt-map-mask = <f800 0 0 7>; 150 interrupt-map-mask = <f800 0 0 7>;
159 interrupt-map = < 151 interrupt-map = <
160 152
161 /* IDSEL 0x11 */ 153 /* IDSEL 0x11 */
162 0800 0 0 1 1180 24 0 154 0800 0 0 1 &RT0 24 0
163 0800 0 0 2 1180 25 0 155 0800 0 0 2 &RT0 25 0
164 0800 0 0 3 1180 26 0 156 0800 0 0 3 &RT0 26 0
165 0800 0 0 4 1180 27 0 157 0800 0 0 4 &RT0 27 0
166 158
167 /* IDSEL 0x12 */ 159 /* IDSEL 0x12 */
168 1000 0 0 1 1180 25 0 160 1000 0 0 1 &RT0 25 0
169 1000 0 0 2 1180 26 0 161 1000 0 0 2 &RT0 26 0
170 1000 0 0 3 1180 27 0 162 1000 0 0 3 &RT0 27 0
171 1000 0 0 4 1180 24 0 163 1000 0 0 4 &RT0 24 0
172 164
173 /* IDSEL 0x13 */ 165 /* IDSEL 0x13 */
174 1800 0 0 1 1180 26 0 166 1800 0 0 1 &RT0 26 0
175 1800 0 0 2 1180 27 0 167 1800 0 0 2 &RT0 27 0
176 1800 0 0 3 1180 24 0 168 1800 0 0 3 &RT0 24 0
177 1800 0 0 4 1180 25 0 169 1800 0 0 4 &RT0 25 0
178 170
179 /* IDSEL 0x14 */ 171 /* IDSEL 0x14 */
180 2000 0 0 1 1180 27 0 172 2000 0 0 1 &RT0 27 0
181 2000 0 0 2 1180 24 0 173 2000 0 0 2 &RT0 24 0
182 2000 0 0 3 1180 25 0 174 2000 0 0 3 &RT0 25 0
183 2000 0 0 4 1180 26 0 175 2000 0 0 4 &RT0 26 0
184 >; 176 >;
185 router@1180 { 177
186 linux,phandle = <1180>; 178 RT0: router@1180 {
187 clock-frequency = <0>; 179 clock-frequency = <0>;
188 interrupt-controller; 180 interrupt-controller;
189 device_type = "pic-router"; 181 device_type = "pic-router";
@@ -192,7 +184,7 @@
192 built-in; 184 built-in;
193 big-endian; 185 big-endian;
194 interrupts = <17 2>; 186 interrupts = <17 2>;
195 interrupt-parent = <7400>; 187 interrupt-parent = <&mpic>;
196 }; 188 };
197 }; 189 };
198 }; 190 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-17 18:04:53 -0400