diff options
Diffstat (limited to 'arch/powerpc/boot/dts/holly.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/holly.dts | 106 |
1 files changed, 53 insertions, 53 deletions
diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts index f87fe7b9ced..c6e11ebeceb 100644 --- a/arch/powerpc/boot/dts/holly.dts +++ b/arch/powerpc/boot/dts/holly.dts | |||
| @@ -133,61 +133,61 @@ | |||
| 133 | reg = <0x00007400 0x00000400>; | 133 | reg = <0x00007400 0x00000400>; |
| 134 | big-endian; | 134 | big-endian; |
| 135 | }; | 135 | }; |
| 136 | }; | ||
| 136 | 137 | ||
| 137 | pci@1000 { | 138 | pci@c0001000 { |
| 138 | device_type = "pci"; | 139 | device_type = "pci"; |
| 139 | compatible = "tsi109-pci", "tsi108-pci"; | 140 | compatible = "tsi109-pci", "tsi108-pci"; |
| 140 | #interrupt-cells = <1>; | 141 | #interrupt-cells = <1>; |
| 141 | #size-cells = <2>; | 142 | #size-cells = <2>; |
| 142 | #address-cells = <3>; | 143 | #address-cells = <3>; |
| 143 | reg = <0x00001000 0x00001000>; | 144 | reg = <0xc0001000 0x00001000>; |
| 144 | bus-range = <0x0 0x0>; | 145 | bus-range = <0x0 0x0>; |
| 145 | /*----------------------------------------------------+ | 146 | /*----------------------------------------------------+ |
| 146 | | PCI memory range. | 147 | | PCI memory range. |
| 147 | | 01 denotes I/O space | 148 | | 01 denotes I/O space |
| 148 | | 02 denotes 32-bit memory space | 149 | | 02 denotes 32-bit memory space |
| 149 | +----------------------------------------------------*/ | 150 | +----------------------------------------------------*/ |
| 150 | ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 | 151 | ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 |
| 151 | 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; | 152 | 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; |
| 152 | clock-frequency = <133333332>; | 153 | clock-frequency = <133333332>; |
| 153 | interrupt-parent = <&MPIC>; | 154 | interrupt-parent = <&MPIC>; |
| 155 | interrupts = <0x17 0x2>; | ||
| 156 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
| 157 | /*----------------------------------------------------+ | ||
| 158 | | The INTA, INTB, INTC, INTD are shared. | ||
| 159 | +----------------------------------------------------*/ | ||
| 160 | interrupt-map = < | ||
| 161 | 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 | ||
| 162 | 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 | ||
| 163 | 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 | ||
| 164 | 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 | ||
| 165 | |||
| 166 | 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 | ||
| 167 | 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 | ||
| 168 | 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 | ||
| 169 | 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 | ||
| 170 | |||
| 171 | 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 | ||
| 172 | 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 | ||
| 173 | 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 | ||
| 174 | 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 | ||
| 175 | |||
| 176 | 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 | ||
| 177 | 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 | ||
| 178 | 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 | ||
| 179 | 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 | ||
| 180 | >; | ||
| 181 | |||
| 182 | RT0: router@1180 { | ||
| 183 | device_type = "pic-router"; | ||
| 184 | interrupt-controller; | ||
| 185 | big-endian; | ||
| 186 | clock-frequency = <0>; | ||
| 187 | #address-cells = <0>; | ||
| 188 | #interrupt-cells = <2>; | ||
| 154 | interrupts = <0x17 0x2>; | 189 | interrupts = <0x17 0x2>; |
| 155 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 190 | interrupt-parent = <&MPIC>; |
| 156 | /*----------------------------------------------------+ | ||
| 157 | | The INTA, INTB, INTC, INTD are shared. | ||
| 158 | +----------------------------------------------------*/ | ||
| 159 | interrupt-map = < | ||
| 160 | 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 | ||
| 161 | 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 | ||
| 162 | 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 | ||
| 163 | 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 | ||
| 164 | |||
| 165 | 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 | ||
| 166 | 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 | ||
| 167 | 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 | ||
| 168 | 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 | ||
| 169 | |||
| 170 | 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 | ||
| 171 | 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 | ||
| 172 | 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 | ||
| 173 | 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 | ||
| 174 | |||
| 175 | 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 | ||
| 176 | 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 | ||
| 177 | 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 | ||
| 178 | 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 | ||
| 179 | >; | ||
| 180 | |||
| 181 | RT0: router@1180 { | ||
| 182 | device_type = "pic-router"; | ||
| 183 | interrupt-controller; | ||
| 184 | big-endian; | ||
| 185 | clock-frequency = <0>; | ||
| 186 | #address-cells = <0>; | ||
| 187 | #interrupt-cells = <2>; | ||
| 188 | interrupts = <0x17 0x2>; | ||
| 189 | interrupt-parent = <&MPIC>; | ||
| 190 | }; | ||
| 191 | }; | 191 | }; |
| 192 | }; | 192 | }; |
| 193 | 193 | ||