diff options
Diffstat (limited to 'arch/mips/lib/dump_tlb.c')
-rw-r--r-- | arch/mips/lib/dump_tlb.c | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c new file mode 100644 index 00000000000..1a4db7dc77c --- /dev/null +++ b/arch/mips/lib/dump_tlb.c | |||
@@ -0,0 +1,100 @@ | |||
1 | /* | ||
2 | * Dump R4x00 TLB for debugging purposes. | ||
3 | * | ||
4 | * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. | ||
5 | * Copyright (C) 1999 by Silicon Graphics, Inc. | ||
6 | */ | ||
7 | #include <linux/kernel.h> | ||
8 | #include <linux/mm.h> | ||
9 | |||
10 | #include <asm/mipsregs.h> | ||
11 | #include <asm/page.h> | ||
12 | #include <asm/pgtable.h> | ||
13 | |||
14 | static inline const char *msk2str(unsigned int mask) | ||
15 | { | ||
16 | switch (mask) { | ||
17 | case PM_4K: return "4kb"; | ||
18 | case PM_16K: return "16kb"; | ||
19 | case PM_64K: return "64kb"; | ||
20 | case PM_256K: return "256kb"; | ||
21 | #ifndef CONFIG_CPU_VR41XX | ||
22 | case PM_1M: return "1Mb"; | ||
23 | case PM_4M: return "4Mb"; | ||
24 | case PM_16M: return "16Mb"; | ||
25 | case PM_64M: return "64Mb"; | ||
26 | case PM_256M: return "256Mb"; | ||
27 | #endif | ||
28 | } | ||
29 | return ""; | ||
30 | } | ||
31 | |||
32 | #define BARRIER() \ | ||
33 | __asm__ __volatile__( \ | ||
34 | ".set\tnoreorder\n\t" \ | ||
35 | "nop;nop;nop;nop;nop;nop;nop\n\t" \ | ||
36 | ".set\treorder"); | ||
37 | |||
38 | static void dump_tlb(int first, int last) | ||
39 | { | ||
40 | unsigned long s_entryhi, entryhi, asid; | ||
41 | unsigned long long entrylo0, entrylo1; | ||
42 | unsigned int s_index, pagemask, c0, c1, i; | ||
43 | |||
44 | s_entryhi = read_c0_entryhi(); | ||
45 | s_index = read_c0_index(); | ||
46 | asid = s_entryhi & 0xff; | ||
47 | |||
48 | for (i = first; i <= last; i++) { | ||
49 | write_c0_index(i); | ||
50 | BARRIER(); | ||
51 | tlb_read(); | ||
52 | BARRIER(); | ||
53 | pagemask = read_c0_pagemask(); | ||
54 | entryhi = read_c0_entryhi(); | ||
55 | entrylo0 = read_c0_entrylo0(); | ||
56 | entrylo1 = read_c0_entrylo1(); | ||
57 | |||
58 | /* Unused entries have a virtual address of CKSEG0. */ | ||
59 | if ((entryhi & ~0x1ffffUL) != CKSEG0 | ||
60 | && (entryhi & 0xff) == asid) { | ||
61 | #ifdef CONFIG_32BIT | ||
62 | int width = 8; | ||
63 | #else | ||
64 | int width = 11; | ||
65 | #endif | ||
66 | /* | ||
67 | * Only print entries in use | ||
68 | */ | ||
69 | printk("Index: %2d pgmask=%s ", i, msk2str(pagemask)); | ||
70 | |||
71 | c0 = (entrylo0 >> 3) & 7; | ||
72 | c1 = (entrylo1 >> 3) & 7; | ||
73 | |||
74 | printk("va=%0*lx asid=%02lx\n", | ||
75 | width, (entryhi & ~0x1fffUL), | ||
76 | entryhi & 0xff); | ||
77 | printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ", | ||
78 | width, | ||
79 | (entrylo0 << 6) & PAGE_MASK, c0, | ||
80 | (entrylo0 & 4) ? 1 : 0, | ||
81 | (entrylo0 & 2) ? 1 : 0, | ||
82 | (entrylo0 & 1) ? 1 : 0); | ||
83 | printk("[pa=%0*llx c=%d d=%d v=%d g=%d]\n", | ||
84 | width, | ||
85 | (entrylo1 << 6) & PAGE_MASK, c1, | ||
86 | (entrylo1 & 4) ? 1 : 0, | ||
87 | (entrylo1 & 2) ? 1 : 0, | ||
88 | (entrylo1 & 1) ? 1 : 0); | ||
89 | } | ||
90 | } | ||
91 | printk("\n"); | ||
92 | |||
93 | write_c0_entryhi(s_entryhi); | ||
94 | write_c0_index(s_index); | ||
95 | } | ||
96 | |||
97 | void dump_tlb_all(void) | ||
98 | { | ||
99 | dump_tlb(0, current_cpu_data.tlbsize - 1); | ||
100 | } | ||