7 files changed, 30 insertions, 20 deletions

diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 98c5a9737c1..e2d8e199be3 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -103,19 +103,10 @@ static int c0_compare_int_pending(void)
 
 /*
  * Compare interrupt can be routed and latched outside the core,
- * so a single execution hazard barrier may not be enough to give
- * it time to clear as seen in the Cause register.  4 time the
- * pipeline depth seems reasonably conservative, and empirically
- * works better in configurations with high CPU/bus clock ratios.
+ * so wait up to worst case number of cycle counter ticks for timer interrupt
+ * changes to propagate to the cause register.
  */
-
-#define compare_change_hazard() \
-        do { \
-                irq_disable_hazard(); \
-                irq_disable_hazard(); \
-                irq_disable_hazard(); \
-                irq_disable_hazard(); \
-        } while (0)
+#define COMPARE_INT_SEEN_TICKS 50
 
 int c0_compare_int_usable(void)
 {
@@ -126,8 +117,12 @@ int c0_compare_int_usable(void)
          * IP7 already pending?  Try to clear it by acking the timer.
          */
         if (c0_compare_int_pending()) {
-                write_c0_compare(read_c0_count());
-                compare_change_hazard();
+                cnt = read_c0_count();
+                write_c0_compare(cnt);
+                back_to_back_c0_hazard();
+                while (read_c0_count() < (cnt  + COMPARE_INT_SEEN_TICKS))
+                        if (!c0_compare_int_pending())
+                                break;
                 if (c0_compare_int_pending())
                         return 0;
         }
@@ -136,7 +131,7 @@ int c0_compare_int_usable(void)
                 cnt = read_c0_count();
                 cnt += delta;
                 write_c0_compare(cnt);
-                compare_change_hazard();
+                back_to_back_c0_hazard();
                 if ((int)(read_c0_count() - cnt) < 0)
                     break;
                 /* increase delta if the timer was already expired */
@@ -145,12 +140,17 @@ int c0_compare_int_usable(void)
         while ((int)(read_c0_count() - cnt) <= 0)
                 ;       /* Wait for expiry  */
 
-        compare_change_hazard();
+        while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
+                if (c0_compare_int_pending())
+                        break;
         if (!c0_compare_int_pending())
                 return 0;
-
-        write_c0_compare(read_c0_count());
-        compare_change_hazard();
+        cnt = read_c0_count();
+        write_c0_compare(cnt);
+        back_to_back_c0_hazard();
+        while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
+                if (!c0_compare_int_pending())
+                        break;
         if (c0_compare_int_pending())
                 return 0;
 
diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/kernel/cpufreq/loongson2_clock.c
index cefc6e259ba..5426779d9fd 100644
--- a/arch/mips/kernel/cpufreq/loongson2_clock.c
+++ b/arch/mips/kernel/cpufreq/loongson2_clock.c
@@ -7,6 +7,7 @@
  * for more details.
  */
 
+#include <linux/module.h>
 #include <linux/cpufreq.h>
 #include <linux/platform_device.h>
 
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 47920657968..a632bc144ef 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -591,6 +591,8 @@ einval:	li	v0, -ENOSYS
         sys     sys_syncfs              1
         sys     sys_sendmmsg            4
         sys     sys_setns               2
+        sys     sys_process_vm_readv    6       /* 4345 */
+        sys     sys_process_vm_writev   6
         .endm
 
         /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index fb7334bea73..3b5a5e9ae49 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -430,4 +430,6 @@ sys_call_table:
         PTR     sys_syncfs
         PTR     sys_sendmmsg
         PTR     sys_setns
+        PTR     sys_process_vm_readv
+        PTR     sys_process_vm_writev           /* 5305 */
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 6de1f598346..6be6f702092 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -430,4 +430,6 @@ EXPORT(sysn32_call_table)
         PTR     sys_syncfs
         PTR     compat_sys_sendmmsg
         PTR     sys_setns
+        PTR     compat_sys_process_vm_readv
+        PTR     compat_sys_process_vm_writev    /* 6310 */
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 1d813169e45..54228553691 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -548,4 +548,6 @@ sys_call_table:
         PTR     sys_syncfs
         PTR     compat_sys_sendmmsg
         PTR     sys_setns
+        PTR     compat_sys_process_vm_readv     /* 4345 */
+        PTR     compat_sys_process_vm_writev
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 261ccbc0774..5c8a49d5505 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1596,7 +1596,8 @@ void __cpuinit per_cpu_trap_init(void)
         }
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-        cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
+        if (!cpu_data[cpu].asid_cache)
+                cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
 
         atomic_inc(&init_mm.mm_count);
         current->active_mm = &init_mm;