diff options
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-pciercx-defs.h')
-rw-r--r-- | arch/mips/include/asm/octeon/cvmx-pciercx-defs.h | 1839 |
1 files changed, 85 insertions, 1754 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h index 4bce393391e..f8cb88902ef 100644 --- a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h | |||
@@ -4,7 +4,7 @@ | |||
4 | * Contact: support@caviumnetworks.com | 4 | * Contact: support@caviumnetworks.com |
5 | * This file is part of the OCTEON SDK | 5 | * This file is part of the OCTEON SDK |
6 | * | 6 | * |
7 | * Copyright (c) 2003-2012 Cavium Networks | 7 | * Copyright (c) 2003-2010 Cavium Networks |
8 | * | 8 | * |
9 | * This file is free software; you can redistribute it and/or modify | 9 | * This file is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License, Version 2, as | 10 | * it under the terms of the GNU General Public License, Version 2, as |
@@ -109,31 +109,20 @@ | |||
109 | union cvmx_pciercx_cfg000 { | 109 | union cvmx_pciercx_cfg000 { |
110 | uint32_t u32; | 110 | uint32_t u32; |
111 | struct cvmx_pciercx_cfg000_s { | 111 | struct cvmx_pciercx_cfg000_s { |
112 | #ifdef __BIG_ENDIAN_BITFIELD | ||
113 | uint32_t devid:16; | 112 | uint32_t devid:16; |
114 | uint32_t vendid:16; | 113 | uint32_t vendid:16; |
115 | #else | ||
116 | uint32_t vendid:16; | ||
117 | uint32_t devid:16; | ||
118 | #endif | ||
119 | } s; | 114 | } s; |
120 | struct cvmx_pciercx_cfg000_s cn52xx; | 115 | struct cvmx_pciercx_cfg000_s cn52xx; |
121 | struct cvmx_pciercx_cfg000_s cn52xxp1; | 116 | struct cvmx_pciercx_cfg000_s cn52xxp1; |
122 | struct cvmx_pciercx_cfg000_s cn56xx; | 117 | struct cvmx_pciercx_cfg000_s cn56xx; |
123 | struct cvmx_pciercx_cfg000_s cn56xxp1; | 118 | struct cvmx_pciercx_cfg000_s cn56xxp1; |
124 | struct cvmx_pciercx_cfg000_s cn61xx; | ||
125 | struct cvmx_pciercx_cfg000_s cn63xx; | 119 | struct cvmx_pciercx_cfg000_s cn63xx; |
126 | struct cvmx_pciercx_cfg000_s cn63xxp1; | 120 | struct cvmx_pciercx_cfg000_s cn63xxp1; |
127 | struct cvmx_pciercx_cfg000_s cn66xx; | ||
128 | struct cvmx_pciercx_cfg000_s cn68xx; | ||
129 | struct cvmx_pciercx_cfg000_s cn68xxp1; | ||
130 | struct cvmx_pciercx_cfg000_s cnf71xx; | ||
131 | }; | 121 | }; |
132 | 122 | ||
133 | union cvmx_pciercx_cfg001 { | 123 | union cvmx_pciercx_cfg001 { |
134 | uint32_t u32; | 124 | uint32_t u32; |
135 | struct cvmx_pciercx_cfg001_s { | 125 | struct cvmx_pciercx_cfg001_s { |
136 | #ifdef __BIG_ENDIAN_BITFIELD | ||
137 | uint32_t dpe:1; | 126 | uint32_t dpe:1; |
138 | uint32_t sse:1; | 127 | uint32_t sse:1; |
139 | uint32_t rma:1; | 128 | uint32_t rma:1; |
@@ -158,180 +147,93 @@ union cvmx_pciercx_cfg001 { | |||
158 | uint32_t me:1; | 147 | uint32_t me:1; |
159 | uint32_t msae:1; | 148 | uint32_t msae:1; |
160 | uint32_t isae:1; | 149 | uint32_t isae:1; |
161 | #else | ||
162 | uint32_t isae:1; | ||
163 | uint32_t msae:1; | ||
164 | uint32_t me:1; | ||
165 | uint32_t scse:1; | ||
166 | uint32_t mwice:1; | ||
167 | uint32_t vps:1; | ||
168 | uint32_t per:1; | ||
169 | uint32_t ids_wcc:1; | ||
170 | uint32_t see:1; | ||
171 | uint32_t fbbe:1; | ||
172 | uint32_t i_dis:1; | ||
173 | uint32_t reserved_11_18:8; | ||
174 | uint32_t i_stat:1; | ||
175 | uint32_t cl:1; | ||
176 | uint32_t m66:1; | ||
177 | uint32_t reserved_22_22:1; | ||
178 | uint32_t fbb:1; | ||
179 | uint32_t mdpe:1; | ||
180 | uint32_t devt:2; | ||
181 | uint32_t sta:1; | ||
182 | uint32_t rta:1; | ||
183 | uint32_t rma:1; | ||
184 | uint32_t sse:1; | ||
185 | uint32_t dpe:1; | ||
186 | #endif | ||
187 | } s; | 150 | } s; |
188 | struct cvmx_pciercx_cfg001_s cn52xx; | 151 | struct cvmx_pciercx_cfg001_s cn52xx; |
189 | struct cvmx_pciercx_cfg001_s cn52xxp1; | 152 | struct cvmx_pciercx_cfg001_s cn52xxp1; |
190 | struct cvmx_pciercx_cfg001_s cn56xx; | 153 | struct cvmx_pciercx_cfg001_s cn56xx; |
191 | struct cvmx_pciercx_cfg001_s cn56xxp1; | 154 | struct cvmx_pciercx_cfg001_s cn56xxp1; |
192 | struct cvmx_pciercx_cfg001_s cn61xx; | ||
193 | struct cvmx_pciercx_cfg001_s cn63xx; | 155 | struct cvmx_pciercx_cfg001_s cn63xx; |
194 | struct cvmx_pciercx_cfg001_s cn63xxp1; | 156 | struct cvmx_pciercx_cfg001_s cn63xxp1; |
195 | struct cvmx_pciercx_cfg001_s cn66xx; | ||
196 | struct cvmx_pciercx_cfg001_s cn68xx; | ||
197 | struct cvmx_pciercx_cfg001_s cn68xxp1; | ||
198 | struct cvmx_pciercx_cfg001_s cnf71xx; | ||
199 | }; | 157 | }; |
200 | 158 | ||
201 | union cvmx_pciercx_cfg002 { | 159 | union cvmx_pciercx_cfg002 { |
202 | uint32_t u32; | 160 | uint32_t u32; |
203 | struct cvmx_pciercx_cfg002_s { | 161 | struct cvmx_pciercx_cfg002_s { |
204 | #ifdef __BIG_ENDIAN_BITFIELD | ||
205 | uint32_t bcc:8; | 162 | uint32_t bcc:8; |
206 | uint32_t sc:8; | 163 | uint32_t sc:8; |
207 | uint32_t pi:8; | 164 | uint32_t pi:8; |
208 | uint32_t rid:8; | 165 | uint32_t rid:8; |
209 | #else | ||
210 | uint32_t rid:8; | ||
211 | uint32_t pi:8; | ||
212 | uint32_t sc:8; | ||
213 | uint32_t bcc:8; | ||
214 | #endif | ||
215 | } s; | 166 | } s; |
216 | struct cvmx_pciercx_cfg002_s cn52xx; | 167 | struct cvmx_pciercx_cfg002_s cn52xx; |
217 | struct cvmx_pciercx_cfg002_s cn52xxp1; | 168 | struct cvmx_pciercx_cfg002_s cn52xxp1; |
218 | struct cvmx_pciercx_cfg002_s cn56xx; | 169 | struct cvmx_pciercx_cfg002_s cn56xx; |
219 | struct cvmx_pciercx_cfg002_s cn56xxp1; | 170 | struct cvmx_pciercx_cfg002_s cn56xxp1; |
220 | struct cvmx_pciercx_cfg002_s cn61xx; | ||
221 | struct cvmx_pciercx_cfg002_s cn63xx; | 171 | struct cvmx_pciercx_cfg002_s cn63xx; |
222 | struct cvmx_pciercx_cfg002_s cn63xxp1; | 172 | struct cvmx_pciercx_cfg002_s cn63xxp1; |
223 | struct cvmx_pciercx_cfg002_s cn66xx; | ||
224 | struct cvmx_pciercx_cfg002_s cn68xx; | ||
225 | struct cvmx_pciercx_cfg002_s cn68xxp1; | ||
226 | struct cvmx_pciercx_cfg002_s cnf71xx; | ||
227 | }; | 173 | }; |
228 | 174 | ||
229 | union cvmx_pciercx_cfg003 { | 175 | union cvmx_pciercx_cfg003 { |
230 | uint32_t u32; | 176 | uint32_t u32; |
231 | struct cvmx_pciercx_cfg003_s { | 177 | struct cvmx_pciercx_cfg003_s { |
232 | #ifdef __BIG_ENDIAN_BITFIELD | ||
233 | uint32_t bist:8; | 178 | uint32_t bist:8; |
234 | uint32_t mfd:1; | 179 | uint32_t mfd:1; |
235 | uint32_t chf:7; | 180 | uint32_t chf:7; |
236 | uint32_t lt:8; | 181 | uint32_t lt:8; |
237 | uint32_t cls:8; | 182 | uint32_t cls:8; |
238 | #else | ||
239 | uint32_t cls:8; | ||
240 | uint32_t lt:8; | ||
241 | uint32_t chf:7; | ||
242 | uint32_t mfd:1; | ||
243 | uint32_t bist:8; | ||
244 | #endif | ||
245 | } s; | 183 | } s; |
246 | struct cvmx_pciercx_cfg003_s cn52xx; | 184 | struct cvmx_pciercx_cfg003_s cn52xx; |
247 | struct cvmx_pciercx_cfg003_s cn52xxp1; | 185 | struct cvmx_pciercx_cfg003_s cn52xxp1; |
248 | struct cvmx_pciercx_cfg003_s cn56xx; | 186 | struct cvmx_pciercx_cfg003_s cn56xx; |
249 | struct cvmx_pciercx_cfg003_s cn56xxp1; | 187 | struct cvmx_pciercx_cfg003_s cn56xxp1; |
250 | struct cvmx_pciercx_cfg003_s cn61xx; | ||
251 | struct cvmx_pciercx_cfg003_s cn63xx; | 188 | struct cvmx_pciercx_cfg003_s cn63xx; |
252 | struct cvmx_pciercx_cfg003_s cn63xxp1; | 189 | struct cvmx_pciercx_cfg003_s cn63xxp1; |
253 | struct cvmx_pciercx_cfg003_s cn66xx; | ||
254 | struct cvmx_pciercx_cfg003_s cn68xx; | ||
255 | struct cvmx_pciercx_cfg003_s cn68xxp1; | ||
256 | struct cvmx_pciercx_cfg003_s cnf71xx; | ||
257 | }; | 190 | }; |
258 | 191 | ||
259 | union cvmx_pciercx_cfg004 { | 192 | union cvmx_pciercx_cfg004 { |
260 | uint32_t u32; | 193 | uint32_t u32; |
261 | struct cvmx_pciercx_cfg004_s { | 194 | struct cvmx_pciercx_cfg004_s { |
262 | #ifdef __BIG_ENDIAN_BITFIELD | ||
263 | uint32_t reserved_0_31:32; | ||
264 | #else | ||
265 | uint32_t reserved_0_31:32; | 195 | uint32_t reserved_0_31:32; |
266 | #endif | ||
267 | } s; | 196 | } s; |
268 | struct cvmx_pciercx_cfg004_s cn52xx; | 197 | struct cvmx_pciercx_cfg004_s cn52xx; |
269 | struct cvmx_pciercx_cfg004_s cn52xxp1; | 198 | struct cvmx_pciercx_cfg004_s cn52xxp1; |
270 | struct cvmx_pciercx_cfg004_s cn56xx; | 199 | struct cvmx_pciercx_cfg004_s cn56xx; |
271 | struct cvmx_pciercx_cfg004_s cn56xxp1; | 200 | struct cvmx_pciercx_cfg004_s cn56xxp1; |
272 | struct cvmx_pciercx_cfg004_s cn61xx; | ||
273 | struct cvmx_pciercx_cfg004_s cn63xx; | 201 | struct cvmx_pciercx_cfg004_s cn63xx; |
274 | struct cvmx_pciercx_cfg004_s cn63xxp1; | 202 | struct cvmx_pciercx_cfg004_s cn63xxp1; |
275 | struct cvmx_pciercx_cfg004_s cn66xx; | ||
276 | struct cvmx_pciercx_cfg004_s cn68xx; | ||
277 | struct cvmx_pciercx_cfg004_s cn68xxp1; | ||
278 | struct cvmx_pciercx_cfg004_s cnf71xx; | ||
279 | }; | 203 | }; |
280 | 204 | ||
281 | union cvmx_pciercx_cfg005 { | 205 | union cvmx_pciercx_cfg005 { |
282 | uint32_t u32; | 206 | uint32_t u32; |
283 | struct cvmx_pciercx_cfg005_s { | 207 | struct cvmx_pciercx_cfg005_s { |
284 | #ifdef __BIG_ENDIAN_BITFIELD | ||
285 | uint32_t reserved_0_31:32; | ||
286 | #else | ||
287 | uint32_t reserved_0_31:32; | 208 | uint32_t reserved_0_31:32; |
288 | #endif | ||
289 | } s; | 209 | } s; |
290 | struct cvmx_pciercx_cfg005_s cn52xx; | 210 | struct cvmx_pciercx_cfg005_s cn52xx; |
291 | struct cvmx_pciercx_cfg005_s cn52xxp1; | 211 | struct cvmx_pciercx_cfg005_s cn52xxp1; |
292 | struct cvmx_pciercx_cfg005_s cn56xx; | 212 | struct cvmx_pciercx_cfg005_s cn56xx; |
293 | struct cvmx_pciercx_cfg005_s cn56xxp1; | 213 | struct cvmx_pciercx_cfg005_s cn56xxp1; |
294 | struct cvmx_pciercx_cfg005_s cn61xx; | ||
295 | struct cvmx_pciercx_cfg005_s cn63xx; | 214 | struct cvmx_pciercx_cfg005_s cn63xx; |
296 | struct cvmx_pciercx_cfg005_s cn63xxp1; | 215 | struct cvmx_pciercx_cfg005_s cn63xxp1; |
297 | struct cvmx_pciercx_cfg005_s cn66xx; | ||
298 | struct cvmx_pciercx_cfg005_s cn68xx; | ||
299 | struct cvmx_pciercx_cfg005_s cn68xxp1; | ||
300 | struct cvmx_pciercx_cfg005_s cnf71xx; | ||
301 | }; | 216 | }; |
302 | 217 | ||
303 | union cvmx_pciercx_cfg006 { | 218 | union cvmx_pciercx_cfg006 { |
304 | uint32_t u32; | 219 | uint32_t u32; |
305 | struct cvmx_pciercx_cfg006_s { | 220 | struct cvmx_pciercx_cfg006_s { |
306 | #ifdef __BIG_ENDIAN_BITFIELD | ||
307 | uint32_t slt:8; | 221 | uint32_t slt:8; |
308 | uint32_t subbnum:8; | 222 | uint32_t subbnum:8; |
309 | uint32_t sbnum:8; | 223 | uint32_t sbnum:8; |
310 | uint32_t pbnum:8; | 224 | uint32_t pbnum:8; |
311 | #else | ||
312 | uint32_t pbnum:8; | ||
313 | uint32_t sbnum:8; | ||
314 | uint32_t subbnum:8; | ||
315 | uint32_t slt:8; | ||
316 | #endif | ||
317 | } s; | 225 | } s; |
318 | struct cvmx_pciercx_cfg006_s cn52xx; | 226 | struct cvmx_pciercx_cfg006_s cn52xx; |
319 | struct cvmx_pciercx_cfg006_s cn52xxp1; | 227 | struct cvmx_pciercx_cfg006_s cn52xxp1; |
320 | struct cvmx_pciercx_cfg006_s cn56xx; | 228 | struct cvmx_pciercx_cfg006_s cn56xx; |
321 | struct cvmx_pciercx_cfg006_s cn56xxp1; | 229 | struct cvmx_pciercx_cfg006_s cn56xxp1; |
322 | struct cvmx_pciercx_cfg006_s cn61xx; | ||
323 | struct cvmx_pciercx_cfg006_s cn63xx; | 230 | struct cvmx_pciercx_cfg006_s cn63xx; |
324 | struct cvmx_pciercx_cfg006_s cn63xxp1; | 231 | struct cvmx_pciercx_cfg006_s cn63xxp1; |
325 | struct cvmx_pciercx_cfg006_s cn66xx; | ||
326 | struct cvmx_pciercx_cfg006_s cn68xx; | ||
327 | struct cvmx_pciercx_cfg006_s cn68xxp1; | ||
328 | struct cvmx_pciercx_cfg006_s cnf71xx; | ||
329 | }; | 232 | }; |
330 | 233 | ||
331 | union cvmx_pciercx_cfg007 { | 234 | union cvmx_pciercx_cfg007 { |
332 | uint32_t u32; | 235 | uint32_t u32; |
333 | struct cvmx_pciercx_cfg007_s { | 236 | struct cvmx_pciercx_cfg007_s { |
334 | #ifdef __BIG_ENDIAN_BITFIELD | ||
335 | uint32_t dpe:1; | 237 | uint32_t dpe:1; |
336 | uint32_t sse:1; | 238 | uint32_t sse:1; |
337 | uint32_t rma:1; | 239 | uint32_t rma:1; |
@@ -349,217 +251,119 @@ union cvmx_pciercx_cfg007 { | |||
349 | uint32_t lio_base:4; | 251 | uint32_t lio_base:4; |
350 | uint32_t reserved_1_3:3; | 252 | uint32_t reserved_1_3:3; |
351 | uint32_t io32a:1; | 253 | uint32_t io32a:1; |
352 | #else | ||
353 | uint32_t io32a:1; | ||
354 | uint32_t reserved_1_3:3; | ||
355 | uint32_t lio_base:4; | ||
356 | uint32_t io32b:1; | ||
357 | uint32_t reserved_9_11:3; | ||
358 | uint32_t lio_limi:4; | ||
359 | uint32_t reserved_16_20:5; | ||
360 | uint32_t m66:1; | ||
361 | uint32_t reserved_22_22:1; | ||
362 | uint32_t fbb:1; | ||
363 | uint32_t mdpe:1; | ||
364 | uint32_t devt:2; | ||
365 | uint32_t sta:1; | ||
366 | uint32_t rta:1; | ||
367 | uint32_t rma:1; | ||
368 | uint32_t sse:1; | ||
369 | uint32_t dpe:1; | ||
370 | #endif | ||
371 | } s; | 254 | } s; |
372 | struct cvmx_pciercx_cfg007_s cn52xx; | 255 | struct cvmx_pciercx_cfg007_s cn52xx; |
373 | struct cvmx_pciercx_cfg007_s cn52xxp1; | 256 | struct cvmx_pciercx_cfg007_s cn52xxp1; |
374 | struct cvmx_pciercx_cfg007_s cn56xx; | 257 | struct cvmx_pciercx_cfg007_s cn56xx; |
375 | struct cvmx_pciercx_cfg007_s cn56xxp1; | 258 | struct cvmx_pciercx_cfg007_s cn56xxp1; |
376 | struct cvmx_pciercx_cfg007_s cn61xx; | ||
377 | struct cvmx_pciercx_cfg007_s cn63xx; | 259 | struct cvmx_pciercx_cfg007_s cn63xx; |
378 | struct cvmx_pciercx_cfg007_s cn63xxp1; | 260 | struct cvmx_pciercx_cfg007_s cn63xxp1; |
379 | struct cvmx_pciercx_cfg007_s cn66xx; | ||
380 | struct cvmx_pciercx_cfg007_s cn68xx; | ||
381 | struct cvmx_pciercx_cfg007_s cn68xxp1; | ||
382 | struct cvmx_pciercx_cfg007_s cnf71xx; | ||
383 | }; | 261 | }; |
384 | 262 | ||
385 | union cvmx_pciercx_cfg008 { | 263 | union cvmx_pciercx_cfg008 { |
386 | uint32_t u32; | 264 | uint32_t u32; |
387 | struct cvmx_pciercx_cfg008_s { | 265 | struct cvmx_pciercx_cfg008_s { |
388 | #ifdef __BIG_ENDIAN_BITFIELD | ||
389 | uint32_t ml_addr:12; | 266 | uint32_t ml_addr:12; |
390 | uint32_t reserved_16_19:4; | 267 | uint32_t reserved_16_19:4; |
391 | uint32_t mb_addr:12; | 268 | uint32_t mb_addr:12; |
392 | uint32_t reserved_0_3:4; | 269 | uint32_t reserved_0_3:4; |
393 | #else | ||
394 | uint32_t reserved_0_3:4; | ||
395 | uint32_t mb_addr:12; | ||
396 | uint32_t reserved_16_19:4; | ||
397 | uint32_t ml_addr:12; | ||
398 | #endif | ||
399 | } s; | 270 | } s; |
400 | struct cvmx_pciercx_cfg008_s cn52xx; | 271 | struct cvmx_pciercx_cfg008_s cn52xx; |
401 | struct cvmx_pciercx_cfg008_s cn52xxp1; | 272 | struct cvmx_pciercx_cfg008_s cn52xxp1; |
402 | struct cvmx_pciercx_cfg008_s cn56xx; | 273 | struct cvmx_pciercx_cfg008_s cn56xx; |
403 | struct cvmx_pciercx_cfg008_s cn56xxp1; | 274 | struct cvmx_pciercx_cfg008_s cn56xxp1; |
404 | struct cvmx_pciercx_cfg008_s cn61xx; | ||
405 | struct cvmx_pciercx_cfg008_s cn63xx; | 275 | struct cvmx_pciercx_cfg008_s cn63xx; |
406 | struct cvmx_pciercx_cfg008_s cn63xxp1; | 276 | struct cvmx_pciercx_cfg008_s cn63xxp1; |
407 | struct cvmx_pciercx_cfg008_s cn66xx; | ||
408 | struct cvmx_pciercx_cfg008_s cn68xx; | ||
409 | struct cvmx_pciercx_cfg008_s cn68xxp1; | ||
410 | struct cvmx_pciercx_cfg008_s cnf71xx; | ||
411 | }; | 277 | }; |
412 | 278 | ||
413 | union cvmx_pciercx_cfg009 { | 279 | union cvmx_pciercx_cfg009 { |
414 | uint32_t u32; | 280 | uint32_t u32; |
415 | struct cvmx_pciercx_cfg009_s { | 281 | struct cvmx_pciercx_cfg009_s { |
416 | #ifdef __BIG_ENDIAN_BITFIELD | ||
417 | uint32_t lmem_limit:12; | 282 | uint32_t lmem_limit:12; |
418 | uint32_t reserved_17_19:3; | 283 | uint32_t reserved_17_19:3; |
419 | uint32_t mem64b:1; | 284 | uint32_t mem64b:1; |
420 | uint32_t lmem_base:12; | 285 | uint32_t lmem_base:12; |
421 | uint32_t reserved_1_3:3; | 286 | uint32_t reserved_1_3:3; |
422 | uint32_t mem64a:1; | 287 | uint32_t mem64a:1; |
423 | #else | ||
424 | uint32_t mem64a:1; | ||
425 | uint32_t reserved_1_3:3; | ||
426 | uint32_t lmem_base:12; | ||
427 | uint32_t mem64b:1; | ||
428 | uint32_t reserved_17_19:3; | ||
429 | uint32_t lmem_limit:12; | ||
430 | #endif | ||
431 | } s; | 288 | } s; |
432 | struct cvmx_pciercx_cfg009_s cn52xx; | 289 | struct cvmx_pciercx_cfg009_s cn52xx; |
433 | struct cvmx_pciercx_cfg009_s cn52xxp1; | 290 | struct cvmx_pciercx_cfg009_s cn52xxp1; |
434 | struct cvmx_pciercx_cfg009_s cn56xx; | 291 | struct cvmx_pciercx_cfg009_s cn56xx; |
435 | struct cvmx_pciercx_cfg009_s cn56xxp1; | 292 | struct cvmx_pciercx_cfg009_s cn56xxp1; |
436 | struct cvmx_pciercx_cfg009_s cn61xx; | ||
437 | struct cvmx_pciercx_cfg009_s cn63xx; | 293 | struct cvmx_pciercx_cfg009_s cn63xx; |
438 | struct cvmx_pciercx_cfg009_s cn63xxp1; | 294 | struct cvmx_pciercx_cfg009_s cn63xxp1; |
439 | struct cvmx_pciercx_cfg009_s cn66xx; | ||
440 | struct cvmx_pciercx_cfg009_s cn68xx; | ||
441 | struct cvmx_pciercx_cfg009_s cn68xxp1; | ||
442 | struct cvmx_pciercx_cfg009_s cnf71xx; | ||
443 | }; | 295 | }; |
444 | 296 | ||
445 | union cvmx_pciercx_cfg010 { | 297 | union cvmx_pciercx_cfg010 { |
446 | uint32_t u32; | 298 | uint32_t u32; |
447 | struct cvmx_pciercx_cfg010_s { | 299 | struct cvmx_pciercx_cfg010_s { |
448 | #ifdef __BIG_ENDIAN_BITFIELD | ||
449 | uint32_t umem_base:32; | 300 | uint32_t umem_base:32; |
450 | #else | ||
451 | uint32_t umem_base:32; | ||
452 | #endif | ||
453 | } s; | 301 | } s; |
454 | struct cvmx_pciercx_cfg010_s cn52xx; | 302 | struct cvmx_pciercx_cfg010_s cn52xx; |
455 | struct cvmx_pciercx_cfg010_s cn52xxp1; | 303 | struct cvmx_pciercx_cfg010_s cn52xxp1; |
456 | struct cvmx_pciercx_cfg010_s cn56xx; | 304 | struct cvmx_pciercx_cfg010_s cn56xx; |
457 | struct cvmx_pciercx_cfg010_s cn56xxp1; | 305 | struct cvmx_pciercx_cfg010_s cn56xxp1; |
458 | struct cvmx_pciercx_cfg010_s cn61xx; | ||
459 | struct cvmx_pciercx_cfg010_s cn63xx; | 306 | struct cvmx_pciercx_cfg010_s cn63xx; |
460 | struct cvmx_pciercx_cfg010_s cn63xxp1; | 307 | struct cvmx_pciercx_cfg010_s cn63xxp1; |
461 | struct cvmx_pciercx_cfg010_s cn66xx; | ||
462 | struct cvmx_pciercx_cfg010_s cn68xx; | ||
463 | struct cvmx_pciercx_cfg010_s cn68xxp1; | ||
464 | struct cvmx_pciercx_cfg010_s cnf71xx; | ||
465 | }; | 308 | }; |
466 | 309 | ||
467 | union cvmx_pciercx_cfg011 { | 310 | union cvmx_pciercx_cfg011 { |
468 | uint32_t u32; | 311 | uint32_t u32; |
469 | struct cvmx_pciercx_cfg011_s { | 312 | struct cvmx_pciercx_cfg011_s { |
470 | #ifdef __BIG_ENDIAN_BITFIELD | ||
471 | uint32_t umem_limit:32; | ||
472 | #else | ||
473 | uint32_t umem_limit:32; | 313 | uint32_t umem_limit:32; |
474 | #endif | ||
475 | } s; | 314 | } s; |
476 | struct cvmx_pciercx_cfg011_s cn52xx; | 315 | struct cvmx_pciercx_cfg011_s cn52xx; |
477 | struct cvmx_pciercx_cfg011_s cn52xxp1; | 316 | struct cvmx_pciercx_cfg011_s cn52xxp1; |
478 | struct cvmx_pciercx_cfg011_s cn56xx; | 317 | struct cvmx_pciercx_cfg011_s cn56xx; |
479 | struct cvmx_pciercx_cfg011_s cn56xxp1; | 318 | struct cvmx_pciercx_cfg011_s cn56xxp1; |
480 | struct cvmx_pciercx_cfg011_s cn61xx; | ||
481 | struct cvmx_pciercx_cfg011_s cn63xx; | 319 | struct cvmx_pciercx_cfg011_s cn63xx; |
482 | struct cvmx_pciercx_cfg011_s cn63xxp1; | 320 | struct cvmx_pciercx_cfg011_s cn63xxp1; |
483 | struct cvmx_pciercx_cfg011_s cn66xx; | ||
484 | struct cvmx_pciercx_cfg011_s cn68xx; | ||
485 | struct cvmx_pciercx_cfg011_s cn68xxp1; | ||
486 | struct cvmx_pciercx_cfg011_s cnf71xx; | ||
487 | }; | 321 | }; |
488 | 322 | ||
489 | union cvmx_pciercx_cfg012 { | 323 | union cvmx_pciercx_cfg012 { |
490 | uint32_t u32; | 324 | uint32_t u32; |
491 | struct cvmx_pciercx_cfg012_s { | 325 | struct cvmx_pciercx_cfg012_s { |
492 | #ifdef __BIG_ENDIAN_BITFIELD | ||
493 | uint32_t uio_limit:16; | 326 | uint32_t uio_limit:16; |
494 | uint32_t uio_base:16; | 327 | uint32_t uio_base:16; |
495 | #else | ||
496 | uint32_t uio_base:16; | ||
497 | uint32_t uio_limit:16; | ||
498 | #endif | ||
499 | } s; | 328 | } s; |
500 | struct cvmx_pciercx_cfg012_s cn52xx; | 329 | struct cvmx_pciercx_cfg012_s cn52xx; |
501 | struct cvmx_pciercx_cfg012_s cn52xxp1; | 330 | struct cvmx_pciercx_cfg012_s cn52xxp1; |
502 | struct cvmx_pciercx_cfg012_s cn56xx; | 331 | struct cvmx_pciercx_cfg012_s cn56xx; |
503 | struct cvmx_pciercx_cfg012_s cn56xxp1; | 332 | struct cvmx_pciercx_cfg012_s cn56xxp1; |
504 | struct cvmx_pciercx_cfg012_s cn61xx; | ||
505 | struct cvmx_pciercx_cfg012_s cn63xx; | 333 | struct cvmx_pciercx_cfg012_s cn63xx; |
506 | struct cvmx_pciercx_cfg012_s cn63xxp1; | 334 | struct cvmx_pciercx_cfg012_s cn63xxp1; |
507 | struct cvmx_pciercx_cfg012_s cn66xx; | ||
508 | struct cvmx_pciercx_cfg012_s cn68xx; | ||
509 | struct cvmx_pciercx_cfg012_s cn68xxp1; | ||
510 | struct cvmx_pciercx_cfg012_s cnf71xx; | ||
511 | }; | 335 | }; |
512 | 336 | ||
513 | union cvmx_pciercx_cfg013 { | 337 | union cvmx_pciercx_cfg013 { |
514 | uint32_t u32; | 338 | uint32_t u32; |
515 | struct cvmx_pciercx_cfg013_s { | 339 | struct cvmx_pciercx_cfg013_s { |
516 | #ifdef __BIG_ENDIAN_BITFIELD | ||
517 | uint32_t reserved_8_31:24; | 340 | uint32_t reserved_8_31:24; |
518 | uint32_t cp:8; | 341 | uint32_t cp:8; |
519 | #else | ||
520 | uint32_t cp:8; | ||
521 | uint32_t reserved_8_31:24; | ||
522 | #endif | ||
523 | } s; | 342 | } s; |
524 | struct cvmx_pciercx_cfg013_s cn52xx; | 343 | struct cvmx_pciercx_cfg013_s cn52xx; |
525 | struct cvmx_pciercx_cfg013_s cn52xxp1; | 344 | struct cvmx_pciercx_cfg013_s cn52xxp1; |
526 | struct cvmx_pciercx_cfg013_s cn56xx; | 345 | struct cvmx_pciercx_cfg013_s cn56xx; |
527 | struct cvmx_pciercx_cfg013_s cn56xxp1; | 346 | struct cvmx_pciercx_cfg013_s cn56xxp1; |
528 | struct cvmx_pciercx_cfg013_s cn61xx; | ||
529 | struct cvmx_pciercx_cfg013_s cn63xx; | 347 | struct cvmx_pciercx_cfg013_s cn63xx; |
530 | struct cvmx_pciercx_cfg013_s cn63xxp1; | 348 | struct cvmx_pciercx_cfg013_s cn63xxp1; |
531 | struct cvmx_pciercx_cfg013_s cn66xx; | ||
532 | struct cvmx_pciercx_cfg013_s cn68xx; | ||
533 | struct cvmx_pciercx_cfg013_s cn68xxp1; | ||
534 | struct cvmx_pciercx_cfg013_s cnf71xx; | ||
535 | }; | 349 | }; |
536 | 350 | ||
537 | union cvmx_pciercx_cfg014 { | 351 | union cvmx_pciercx_cfg014 { |
538 | uint32_t u32; | 352 | uint32_t u32; |
539 | struct cvmx_pciercx_cfg014_s { | 353 | struct cvmx_pciercx_cfg014_s { |
540 | #ifdef __BIG_ENDIAN_BITFIELD | ||
541 | uint32_t reserved_0_31:32; | 354 | uint32_t reserved_0_31:32; |
542 | #else | ||
543 | uint32_t reserved_0_31:32; | ||
544 | #endif | ||
545 | } s; | 355 | } s; |
546 | struct cvmx_pciercx_cfg014_s cn52xx; | 356 | struct cvmx_pciercx_cfg014_s cn52xx; |
547 | struct cvmx_pciercx_cfg014_s cn52xxp1; | 357 | struct cvmx_pciercx_cfg014_s cn52xxp1; |
548 | struct cvmx_pciercx_cfg014_s cn56xx; | 358 | struct cvmx_pciercx_cfg014_s cn56xx; |
549 | struct cvmx_pciercx_cfg014_s cn56xxp1; | 359 | struct cvmx_pciercx_cfg014_s cn56xxp1; |
550 | struct cvmx_pciercx_cfg014_s cn61xx; | ||
551 | struct cvmx_pciercx_cfg014_s cn63xx; | 360 | struct cvmx_pciercx_cfg014_s cn63xx; |
552 | struct cvmx_pciercx_cfg014_s cn63xxp1; | 361 | struct cvmx_pciercx_cfg014_s cn63xxp1; |
553 | struct cvmx_pciercx_cfg014_s cn66xx; | ||
554 | struct cvmx_pciercx_cfg014_s cn68xx; | ||
555 | struct cvmx_pciercx_cfg014_s cn68xxp1; | ||
556 | struct cvmx_pciercx_cfg014_s cnf71xx; | ||
557 | }; | 362 | }; |
558 | 363 | ||
559 | union cvmx_pciercx_cfg015 { | 364 | union cvmx_pciercx_cfg015 { |
560 | uint32_t u32; | 365 | uint32_t u32; |
561 | struct cvmx_pciercx_cfg015_s { | 366 | struct cvmx_pciercx_cfg015_s { |
562 | #ifdef __BIG_ENDIAN_BITFIELD | ||
563 | uint32_t reserved_28_31:4; | 367 | uint32_t reserved_28_31:4; |
564 | uint32_t dtsees:1; | 368 | uint32_t dtsees:1; |
565 | uint32_t dts:1; | 369 | uint32_t dts:1; |
@@ -575,41 +379,18 @@ union cvmx_pciercx_cfg015 { | |||
575 | uint32_t pere:1; | 379 | uint32_t pere:1; |
576 | uint32_t inta:8; | 380 | uint32_t inta:8; |
577 | uint32_t il:8; | 381 | uint32_t il:8; |
578 | #else | ||
579 | uint32_t il:8; | ||
580 | uint32_t inta:8; | ||
581 | uint32_t pere:1; | ||
582 | uint32_t see:1; | ||
583 | uint32_t isae:1; | ||
584 | uint32_t vgae:1; | ||
585 | uint32_t vga16d:1; | ||
586 | uint32_t mam:1; | ||
587 | uint32_t sbrst:1; | ||
588 | uint32_t fbbe:1; | ||
589 | uint32_t pdt:1; | ||
590 | uint32_t sdt:1; | ||
591 | uint32_t dts:1; | ||
592 | uint32_t dtsees:1; | ||
593 | uint32_t reserved_28_31:4; | ||
594 | #endif | ||
595 | } s; | 382 | } s; |
596 | struct cvmx_pciercx_cfg015_s cn52xx; | 383 | struct cvmx_pciercx_cfg015_s cn52xx; |
597 | struct cvmx_pciercx_cfg015_s cn52xxp1; | 384 | struct cvmx_pciercx_cfg015_s cn52xxp1; |
598 | struct cvmx_pciercx_cfg015_s cn56xx; | 385 | struct cvmx_pciercx_cfg015_s cn56xx; |
599 | struct cvmx_pciercx_cfg015_s cn56xxp1; | 386 | struct cvmx_pciercx_cfg015_s cn56xxp1; |
600 | struct cvmx_pciercx_cfg015_s cn61xx; | ||
601 | struct cvmx_pciercx_cfg015_s cn63xx; | 387 | struct cvmx_pciercx_cfg015_s cn63xx; |
602 | struct cvmx_pciercx_cfg015_s cn63xxp1; | 388 | struct cvmx_pciercx_cfg015_s cn63xxp1; |
603 | struct cvmx_pciercx_cfg015_s cn66xx; | ||
604 | struct cvmx_pciercx_cfg015_s cn68xx; | ||
605 | struct cvmx_pciercx_cfg015_s cn68xxp1; | ||
606 | struct cvmx_pciercx_cfg015_s cnf71xx; | ||
607 | }; | 389 | }; |
608 | 390 | ||
609 | union cvmx_pciercx_cfg016 { | 391 | union cvmx_pciercx_cfg016 { |
610 | uint32_t u32; | 392 | uint32_t u32; |
611 | struct cvmx_pciercx_cfg016_s { | 393 | struct cvmx_pciercx_cfg016_s { |
612 | #ifdef __BIG_ENDIAN_BITFIELD | ||
613 | uint32_t pmes:5; | 394 | uint32_t pmes:5; |
614 | uint32_t d2s:1; | 395 | uint32_t d2s:1; |
615 | uint32_t d1s:1; | 396 | uint32_t d1s:1; |
@@ -620,36 +401,18 @@ union cvmx_pciercx_cfg016 { | |||
620 | uint32_t pmsv:3; | 401 | uint32_t pmsv:3; |
621 | uint32_t ncp:8; | 402 | uint32_t ncp:8; |
622 | uint32_t pmcid:8; | 403 | uint32_t pmcid:8; |
623 | #else | ||
624 | uint32_t pmcid:8; | ||
625 | uint32_t ncp:8; | ||
626 | uint32_t pmsv:3; | ||
627 | uint32_t pme_clock:1; | ||
628 | uint32_t reserved_20_20:1; | ||
629 | uint32_t dsi:1; | ||
630 | uint32_t auxc:3; | ||
631 | uint32_t d1s:1; | ||
632 | uint32_t d2s:1; | ||
633 | uint32_t pmes:5; | ||
634 | #endif | ||
635 | } s; | 404 | } s; |
636 | struct cvmx_pciercx_cfg016_s cn52xx; | 405 | struct cvmx_pciercx_cfg016_s cn52xx; |
637 | struct cvmx_pciercx_cfg016_s cn52xxp1; | 406 | struct cvmx_pciercx_cfg016_s cn52xxp1; |
638 | struct cvmx_pciercx_cfg016_s cn56xx; | 407 | struct cvmx_pciercx_cfg016_s cn56xx; |
639 | struct cvmx_pciercx_cfg016_s cn56xxp1; | 408 | struct cvmx_pciercx_cfg016_s cn56xxp1; |
640 | struct cvmx_pciercx_cfg016_s cn61xx; | ||
641 | struct cvmx_pciercx_cfg016_s cn63xx; | 409 | struct cvmx_pciercx_cfg016_s cn63xx; |
642 | struct cvmx_pciercx_cfg016_s cn63xxp1; | 410 | struct cvmx_pciercx_cfg016_s cn63xxp1; |
643 | struct cvmx_pciercx_cfg016_s cn66xx; | ||
644 | struct cvmx_pciercx_cfg016_s cn68xx; | ||
645 | struct cvmx_pciercx_cfg016_s cn68xxp1; | ||
646 | struct cvmx_pciercx_cfg016_s cnf71xx; | ||
647 | }; | 411 | }; |
648 | 412 | ||
649 | union cvmx_pciercx_cfg017 { | 413 | union cvmx_pciercx_cfg017 { |
650 | uint32_t u32; | 414 | uint32_t u32; |
651 | struct cvmx_pciercx_cfg017_s { | 415 | struct cvmx_pciercx_cfg017_s { |
652 | #ifdef __BIG_ENDIAN_BITFIELD | ||
653 | uint32_t pmdia:8; | 416 | uint32_t pmdia:8; |
654 | uint32_t bpccee:1; | 417 | uint32_t bpccee:1; |
655 | uint32_t bd3h:1; | 418 | uint32_t bd3h:1; |
@@ -662,59 +425,18 @@ union cvmx_pciercx_cfg017 { | |||
662 | uint32_t nsr:1; | 425 | uint32_t nsr:1; |
663 | uint32_t reserved_2_2:1; | 426 | uint32_t reserved_2_2:1; |
664 | uint32_t ps:2; | 427 | uint32_t ps:2; |
665 | #else | ||
666 | uint32_t ps:2; | ||
667 | uint32_t reserved_2_2:1; | ||
668 | uint32_t nsr:1; | ||
669 | uint32_t reserved_4_7:4; | ||
670 | uint32_t pmeens:1; | ||
671 | uint32_t pmds:4; | ||
672 | uint32_t pmedsia:2; | ||
673 | uint32_t pmess:1; | ||
674 | uint32_t reserved_16_21:6; | ||
675 | uint32_t bd3h:1; | ||
676 | uint32_t bpccee:1; | ||
677 | uint32_t pmdia:8; | ||
678 | #endif | ||
679 | } s; | 428 | } s; |
680 | struct cvmx_pciercx_cfg017_s cn52xx; | 429 | struct cvmx_pciercx_cfg017_s cn52xx; |
681 | struct cvmx_pciercx_cfg017_s cn52xxp1; | 430 | struct cvmx_pciercx_cfg017_s cn52xxp1; |
682 | struct cvmx_pciercx_cfg017_s cn56xx; | 431 | struct cvmx_pciercx_cfg017_s cn56xx; |
683 | struct cvmx_pciercx_cfg017_s cn56xxp1; | 432 | struct cvmx_pciercx_cfg017_s cn56xxp1; |
684 | struct cvmx_pciercx_cfg017_s cn61xx; | ||
685 | struct cvmx_pciercx_cfg017_s cn63xx; | 433 | struct cvmx_pciercx_cfg017_s cn63xx; |
686 | struct cvmx_pciercx_cfg017_s cn63xxp1; | 434 | struct cvmx_pciercx_cfg017_s cn63xxp1; |
687 | struct cvmx_pciercx_cfg017_s cn66xx; | ||
688 | struct cvmx_pciercx_cfg017_s cn68xx; | ||
689 | struct cvmx_pciercx_cfg017_s cn68xxp1; | ||
690 | struct cvmx_pciercx_cfg017_s cnf71xx; | ||
691 | }; | 435 | }; |
692 | 436 | ||
693 | union cvmx_pciercx_cfg020 { | 437 | union cvmx_pciercx_cfg020 { |
694 | uint32_t u32; | 438 | uint32_t u32; |
695 | struct cvmx_pciercx_cfg020_s { | 439 | struct cvmx_pciercx_cfg020_s { |
696 | #ifdef __BIG_ENDIAN_BITFIELD | ||
697 | uint32_t reserved_25_31:7; | ||
698 | uint32_t pvm:1; | ||
699 | uint32_t m64:1; | ||
700 | uint32_t mme:3; | ||
701 | uint32_t mmc:3; | ||
702 | uint32_t msien:1; | ||
703 | uint32_t ncp:8; | ||
704 | uint32_t msicid:8; | ||
705 | #else | ||
706 | uint32_t msicid:8; | ||
707 | uint32_t ncp:8; | ||
708 | uint32_t msien:1; | ||
709 | uint32_t mmc:3; | ||
710 | uint32_t mme:3; | ||
711 | uint32_t m64:1; | ||
712 | uint32_t pvm:1; | ||
713 | uint32_t reserved_25_31:7; | ||
714 | #endif | ||
715 | } s; | ||
716 | struct cvmx_pciercx_cfg020_cn52xx { | ||
717 | #ifdef __BIG_ENDIAN_BITFIELD | ||
718 | uint32_t reserved_24_31:8; | 440 | uint32_t reserved_24_31:8; |
719 | uint32_t m64:1; | 441 | uint32_t m64:1; |
720 | uint32_t mme:3; | 442 | uint32_t mme:3; |
@@ -722,102 +444,59 @@ union cvmx_pciercx_cfg020 { | |||
722 | uint32_t msien:1; | 444 | uint32_t msien:1; |
723 | uint32_t ncp:8; | 445 | uint32_t ncp:8; |
724 | uint32_t msicid:8; | 446 | uint32_t msicid:8; |
725 | #else | 447 | } s; |
726 | uint32_t msicid:8; | 448 | struct cvmx_pciercx_cfg020_s cn52xx; |
727 | uint32_t ncp:8; | 449 | struct cvmx_pciercx_cfg020_s cn52xxp1; |
728 | uint32_t msien:1; | 450 | struct cvmx_pciercx_cfg020_s cn56xx; |
729 | uint32_t mmc:3; | 451 | struct cvmx_pciercx_cfg020_s cn56xxp1; |
730 | uint32_t mme:3; | 452 | struct cvmx_pciercx_cfg020_s cn63xx; |
731 | uint32_t m64:1; | 453 | struct cvmx_pciercx_cfg020_s cn63xxp1; |
732 | uint32_t reserved_24_31:8; | ||
733 | #endif | ||
734 | } cn52xx; | ||
735 | struct cvmx_pciercx_cfg020_cn52xx cn52xxp1; | ||
736 | struct cvmx_pciercx_cfg020_cn52xx cn56xx; | ||
737 | struct cvmx_pciercx_cfg020_cn52xx cn56xxp1; | ||
738 | struct cvmx_pciercx_cfg020_s cn61xx; | ||
739 | struct cvmx_pciercx_cfg020_cn52xx cn63xx; | ||
740 | struct cvmx_pciercx_cfg020_cn52xx cn63xxp1; | ||
741 | struct cvmx_pciercx_cfg020_cn52xx cn66xx; | ||
742 | struct cvmx_pciercx_cfg020_cn52xx cn68xx; | ||
743 | struct cvmx_pciercx_cfg020_cn52xx cn68xxp1; | ||
744 | struct cvmx_pciercx_cfg020_s cnf71xx; | ||
745 | }; | 454 | }; |
746 | 455 | ||
747 | union cvmx_pciercx_cfg021 { | 456 | union cvmx_pciercx_cfg021 { |
748 | uint32_t u32; | 457 | uint32_t u32; |
749 | struct cvmx_pciercx_cfg021_s { | 458 | struct cvmx_pciercx_cfg021_s { |
750 | #ifdef __BIG_ENDIAN_BITFIELD | ||
751 | uint32_t lmsi:30; | 459 | uint32_t lmsi:30; |
752 | uint32_t reserved_0_1:2; | 460 | uint32_t reserved_0_1:2; |
753 | #else | ||
754 | uint32_t reserved_0_1:2; | ||
755 | uint32_t lmsi:30; | ||
756 | #endif | ||
757 | } s; | 461 | } s; |
758 | struct cvmx_pciercx_cfg021_s cn52xx; | 462 | struct cvmx_pciercx_cfg021_s cn52xx; |
759 | struct cvmx_pciercx_cfg021_s cn52xxp1; | 463 | struct cvmx_pciercx_cfg021_s cn52xxp1; |
760 | struct cvmx_pciercx_cfg021_s cn56xx; | 464 | struct cvmx_pciercx_cfg021_s cn56xx; |
761 | struct cvmx_pciercx_cfg021_s cn56xxp1; | 465 | struct cvmx_pciercx_cfg021_s cn56xxp1; |
762 | struct cvmx_pciercx_cfg021_s cn61xx; | ||
763 | struct cvmx_pciercx_cfg021_s cn63xx; | 466 | struct cvmx_pciercx_cfg021_s cn63xx; |
764 | struct cvmx_pciercx_cfg021_s cn63xxp1; | 467 | struct cvmx_pciercx_cfg021_s cn63xxp1; |
765 | struct cvmx_pciercx_cfg021_s cn66xx; | ||
766 | struct cvmx_pciercx_cfg021_s cn68xx; | ||
767 | struct cvmx_pciercx_cfg021_s cn68xxp1; | ||
768 | struct cvmx_pciercx_cfg021_s cnf71xx; | ||
769 | }; | 468 | }; |
770 | 469 | ||
771 | union cvmx_pciercx_cfg022 { | 470 | union cvmx_pciercx_cfg022 { |
772 | uint32_t u32; | 471 | uint32_t u32; |
773 | struct cvmx_pciercx_cfg022_s { | 472 | struct cvmx_pciercx_cfg022_s { |
774 | #ifdef __BIG_ENDIAN_BITFIELD | ||
775 | uint32_t umsi:32; | ||
776 | #else | ||
777 | uint32_t umsi:32; | 473 | uint32_t umsi:32; |
778 | #endif | ||
779 | } s; | 474 | } s; |
780 | struct cvmx_pciercx_cfg022_s cn52xx; | 475 | struct cvmx_pciercx_cfg022_s cn52xx; |
781 | struct cvmx_pciercx_cfg022_s cn52xxp1; | 476 | struct cvmx_pciercx_cfg022_s cn52xxp1; |
782 | struct cvmx_pciercx_cfg022_s cn56xx; | 477 | struct cvmx_pciercx_cfg022_s cn56xx; |
783 | struct cvmx_pciercx_cfg022_s cn56xxp1; | 478 | struct cvmx_pciercx_cfg022_s cn56xxp1; |
784 | struct cvmx_pciercx_cfg022_s cn61xx; | ||
785 | struct cvmx_pciercx_cfg022_s cn63xx; | 479 | struct cvmx_pciercx_cfg022_s cn63xx; |
786 | struct cvmx_pciercx_cfg022_s cn63xxp1; | 480 | struct cvmx_pciercx_cfg022_s cn63xxp1; |
787 | struct cvmx_pciercx_cfg022_s cn66xx; | ||
788 | struct cvmx_pciercx_cfg022_s cn68xx; | ||
789 | struct cvmx_pciercx_cfg022_s cn68xxp1; | ||
790 | struct cvmx_pciercx_cfg022_s cnf71xx; | ||
791 | }; | 481 | }; |
792 | 482 | ||
793 | union cvmx_pciercx_cfg023 { | 483 | union cvmx_pciercx_cfg023 { |
794 | uint32_t u32; | 484 | uint32_t u32; |
795 | struct cvmx_pciercx_cfg023_s { | 485 | struct cvmx_pciercx_cfg023_s { |
796 | #ifdef __BIG_ENDIAN_BITFIELD | ||
797 | uint32_t reserved_16_31:16; | 486 | uint32_t reserved_16_31:16; |
798 | uint32_t msimd:16; | 487 | uint32_t msimd:16; |
799 | #else | ||
800 | uint32_t msimd:16; | ||
801 | uint32_t reserved_16_31:16; | ||
802 | #endif | ||
803 | } s; | 488 | } s; |
804 | struct cvmx_pciercx_cfg023_s cn52xx; | 489 | struct cvmx_pciercx_cfg023_s cn52xx; |
805 | struct cvmx_pciercx_cfg023_s cn52xxp1; | 490 | struct cvmx_pciercx_cfg023_s cn52xxp1; |
806 | struct cvmx_pciercx_cfg023_s cn56xx; | 491 | struct cvmx_pciercx_cfg023_s cn56xx; |
807 | struct cvmx_pciercx_cfg023_s cn56xxp1; | 492 | struct cvmx_pciercx_cfg023_s cn56xxp1; |
808 | struct cvmx_pciercx_cfg023_s cn61xx; | ||
809 | struct cvmx_pciercx_cfg023_s cn63xx; | 493 | struct cvmx_pciercx_cfg023_s cn63xx; |
810 | struct cvmx_pciercx_cfg023_s cn63xxp1; | 494 | struct cvmx_pciercx_cfg023_s cn63xxp1; |
811 | struct cvmx_pciercx_cfg023_s cn66xx; | ||
812 | struct cvmx_pciercx_cfg023_s cn68xx; | ||
813 | struct cvmx_pciercx_cfg023_s cn68xxp1; | ||
814 | struct cvmx_pciercx_cfg023_s cnf71xx; | ||
815 | }; | 495 | }; |
816 | 496 | ||
817 | union cvmx_pciercx_cfg028 { | 497 | union cvmx_pciercx_cfg028 { |
818 | uint32_t u32; | 498 | uint32_t u32; |
819 | struct cvmx_pciercx_cfg028_s { | 499 | struct cvmx_pciercx_cfg028_s { |
820 | #ifdef __BIG_ENDIAN_BITFIELD | ||
821 | uint32_t reserved_30_31:2; | 500 | uint32_t reserved_30_31:2; |
822 | uint32_t imn:5; | 501 | uint32_t imn:5; |
823 | uint32_t si:1; | 502 | uint32_t si:1; |
@@ -825,33 +504,18 @@ union cvmx_pciercx_cfg028 { | |||
825 | uint32_t pciecv:4; | 504 | uint32_t pciecv:4; |
826 | uint32_t ncp:8; | 505 | uint32_t ncp:8; |
827 | uint32_t pcieid:8; | 506 | uint32_t pcieid:8; |
828 | #else | ||
829 | uint32_t pcieid:8; | ||
830 | uint32_t ncp:8; | ||
831 | uint32_t pciecv:4; | ||
832 | uint32_t dpt:4; | ||
833 | uint32_t si:1; | ||
834 | uint32_t imn:5; | ||
835 | uint32_t reserved_30_31:2; | ||
836 | #endif | ||
837 | } s; | 507 | } s; |
838 | struct cvmx_pciercx_cfg028_s cn52xx; | 508 | struct cvmx_pciercx_cfg028_s cn52xx; |
839 | struct cvmx_pciercx_cfg028_s cn52xxp1; | 509 | struct cvmx_pciercx_cfg028_s cn52xxp1; |
840 | struct cvmx_pciercx_cfg028_s cn56xx; | 510 | struct cvmx_pciercx_cfg028_s cn56xx; |
841 | struct cvmx_pciercx_cfg028_s cn56xxp1; | 511 | struct cvmx_pciercx_cfg028_s cn56xxp1; |
842 | struct cvmx_pciercx_cfg028_s cn61xx; | ||
843 | struct cvmx_pciercx_cfg028_s cn63xx; | 512 | struct cvmx_pciercx_cfg028_s cn63xx; |
844 | struct cvmx_pciercx_cfg028_s cn63xxp1; | 513 | struct cvmx_pciercx_cfg028_s cn63xxp1; |
845 | struct cvmx_pciercx_cfg028_s cn66xx; | ||
846 | struct cvmx_pciercx_cfg028_s cn68xx; | ||
847 | struct cvmx_pciercx_cfg028_s cn68xxp1; | ||
848 | struct cvmx_pciercx_cfg028_s cnf71xx; | ||
849 | }; | 514 | }; |
850 | 515 | ||
851 | union cvmx_pciercx_cfg029 { | 516 | union cvmx_pciercx_cfg029 { |
852 | uint32_t u32; | 517 | uint32_t u32; |
853 | struct cvmx_pciercx_cfg029_s { | 518 | struct cvmx_pciercx_cfg029_s { |
854 | #ifdef __BIG_ENDIAN_BITFIELD | ||
855 | uint32_t reserved_28_31:4; | 519 | uint32_t reserved_28_31:4; |
856 | uint32_t cspls:2; | 520 | uint32_t cspls:2; |
857 | uint32_t csplv:8; | 521 | uint32_t csplv:8; |
@@ -863,37 +527,18 @@ union cvmx_pciercx_cfg029 { | |||
863 | uint32_t etfs:1; | 527 | uint32_t etfs:1; |
864 | uint32_t pfs:2; | 528 | uint32_t pfs:2; |
865 | uint32_t mpss:3; | 529 | uint32_t mpss:3; |
866 | #else | ||
867 | uint32_t mpss:3; | ||
868 | uint32_t pfs:2; | ||
869 | uint32_t etfs:1; | ||
870 | uint32_t el0al:3; | ||
871 | uint32_t el1al:3; | ||
872 | uint32_t reserved_12_14:3; | ||
873 | uint32_t rber:1; | ||
874 | uint32_t reserved_16_17:2; | ||
875 | uint32_t csplv:8; | ||
876 | uint32_t cspls:2; | ||
877 | uint32_t reserved_28_31:4; | ||
878 | #endif | ||
879 | } s; | 530 | } s; |
880 | struct cvmx_pciercx_cfg029_s cn52xx; | 531 | struct cvmx_pciercx_cfg029_s cn52xx; |
881 | struct cvmx_pciercx_cfg029_s cn52xxp1; | 532 | struct cvmx_pciercx_cfg029_s cn52xxp1; |
882 | struct cvmx_pciercx_cfg029_s cn56xx; | 533 | struct cvmx_pciercx_cfg029_s cn56xx; |
883 | struct cvmx_pciercx_cfg029_s cn56xxp1; | 534 | struct cvmx_pciercx_cfg029_s cn56xxp1; |
884 | struct cvmx_pciercx_cfg029_s cn61xx; | ||
885 | struct cvmx_pciercx_cfg029_s cn63xx; | 535 | struct cvmx_pciercx_cfg029_s cn63xx; |
886 | struct cvmx_pciercx_cfg029_s cn63xxp1; | 536 | struct cvmx_pciercx_cfg029_s cn63xxp1; |
887 | struct cvmx_pciercx_cfg029_s cn66xx; | ||
888 | struct cvmx_pciercx_cfg029_s cn68xx; | ||
889 | struct cvmx_pciercx_cfg029_s cn68xxp1; | ||
890 | struct cvmx_pciercx_cfg029_s cnf71xx; | ||
891 | }; | 537 | }; |
892 | 538 | ||
893 | union cvmx_pciercx_cfg030 { | 539 | union cvmx_pciercx_cfg030 { |
894 | uint32_t u32; | 540 | uint32_t u32; |
895 | struct cvmx_pciercx_cfg030_s { | 541 | struct cvmx_pciercx_cfg030_s { |
896 | #ifdef __BIG_ENDIAN_BITFIELD | ||
897 | uint32_t reserved_22_31:10; | 542 | uint32_t reserved_22_31:10; |
898 | uint32_t tp:1; | 543 | uint32_t tp:1; |
899 | uint32_t ap_d:1; | 544 | uint32_t ap_d:1; |
@@ -913,74 +558,18 @@ union cvmx_pciercx_cfg030 { | |||
913 | uint32_t fe_en:1; | 558 | uint32_t fe_en:1; |
914 | uint32_t nfe_en:1; | 559 | uint32_t nfe_en:1; |
915 | uint32_t ce_en:1; | 560 | uint32_t ce_en:1; |
916 | #else | ||
917 | uint32_t ce_en:1; | ||
918 | uint32_t nfe_en:1; | ||
919 | uint32_t fe_en:1; | ||
920 | uint32_t ur_en:1; | ||
921 | uint32_t ro_en:1; | ||
922 | uint32_t mps:3; | ||
923 | uint32_t etf_en:1; | ||
924 | uint32_t pf_en:1; | ||
925 | uint32_t ap_en:1; | ||
926 | uint32_t ns_en:1; | ||
927 | uint32_t mrrs:3; | ||
928 | uint32_t reserved_15_15:1; | ||
929 | uint32_t ce_d:1; | ||
930 | uint32_t nfe_d:1; | ||
931 | uint32_t fe_d:1; | ||
932 | uint32_t ur_d:1; | ||
933 | uint32_t ap_d:1; | ||
934 | uint32_t tp:1; | ||
935 | uint32_t reserved_22_31:10; | ||
936 | #endif | ||
937 | } s; | 561 | } s; |
938 | struct cvmx_pciercx_cfg030_s cn52xx; | 562 | struct cvmx_pciercx_cfg030_s cn52xx; |
939 | struct cvmx_pciercx_cfg030_s cn52xxp1; | 563 | struct cvmx_pciercx_cfg030_s cn52xxp1; |
940 | struct cvmx_pciercx_cfg030_s cn56xx; | 564 | struct cvmx_pciercx_cfg030_s cn56xx; |
941 | struct cvmx_pciercx_cfg030_s cn56xxp1; | 565 | struct cvmx_pciercx_cfg030_s cn56xxp1; |
942 | struct cvmx_pciercx_cfg030_s cn61xx; | ||
943 | struct cvmx_pciercx_cfg030_s cn63xx; | 566 | struct cvmx_pciercx_cfg030_s cn63xx; |
944 | struct cvmx_pciercx_cfg030_s cn63xxp1; | 567 | struct cvmx_pciercx_cfg030_s cn63xxp1; |
945 | struct cvmx_pciercx_cfg030_s cn66xx; | ||
946 | struct cvmx_pciercx_cfg030_s cn68xx; | ||
947 | struct cvmx_pciercx_cfg030_s cn68xxp1; | ||
948 | struct cvmx_pciercx_cfg030_s cnf71xx; | ||
949 | }; | 568 | }; |
950 | 569 | ||
951 | union cvmx_pciercx_cfg031 { | 570 | union cvmx_pciercx_cfg031 { |
952 | uint32_t u32; | 571 | uint32_t u32; |
953 | struct cvmx_pciercx_cfg031_s { | 572 | struct cvmx_pciercx_cfg031_s { |
954 | #ifdef __BIG_ENDIAN_BITFIELD | ||
955 | uint32_t pnum:8; | ||
956 | uint32_t reserved_23_23:1; | ||
957 | uint32_t aspm:1; | ||
958 | uint32_t lbnc:1; | ||
959 | uint32_t dllarc:1; | ||
960 | uint32_t sderc:1; | ||
961 | uint32_t cpm:1; | ||
962 | uint32_t l1el:3; | ||
963 | uint32_t l0el:3; | ||
964 | uint32_t aslpms:2; | ||
965 | uint32_t mlw:6; | ||
966 | uint32_t mls:4; | ||
967 | #else | ||
968 | uint32_t mls:4; | ||
969 | uint32_t mlw:6; | ||
970 | uint32_t aslpms:2; | ||
971 | uint32_t l0el:3; | ||
972 | uint32_t l1el:3; | ||
973 | uint32_t cpm:1; | ||
974 | uint32_t sderc:1; | ||
975 | uint32_t dllarc:1; | ||
976 | uint32_t lbnc:1; | ||
977 | uint32_t aspm:1; | ||
978 | uint32_t reserved_23_23:1; | ||
979 | uint32_t pnum:8; | ||
980 | #endif | ||
981 | } s; | ||
982 | struct cvmx_pciercx_cfg031_cn52xx { | ||
983 | #ifdef __BIG_ENDIAN_BITFIELD | ||
984 | uint32_t pnum:8; | 573 | uint32_t pnum:8; |
985 | uint32_t reserved_22_23:2; | 574 | uint32_t reserved_22_23:2; |
986 | uint32_t lbnc:1; | 575 | uint32_t lbnc:1; |
@@ -992,36 +581,18 @@ union cvmx_pciercx_cfg031 { | |||
992 | uint32_t aslpms:2; | 581 | uint32_t aslpms:2; |
993 | uint32_t mlw:6; | 582 | uint32_t mlw:6; |
994 | uint32_t mls:4; | 583 | uint32_t mls:4; |
995 | #else | 584 | } s; |
996 | uint32_t mls:4; | 585 | struct cvmx_pciercx_cfg031_s cn52xx; |
997 | uint32_t mlw:6; | 586 | struct cvmx_pciercx_cfg031_s cn52xxp1; |
998 | uint32_t aslpms:2; | 587 | struct cvmx_pciercx_cfg031_s cn56xx; |
999 | uint32_t l0el:3; | 588 | struct cvmx_pciercx_cfg031_s cn56xxp1; |
1000 | uint32_t l1el:3; | 589 | struct cvmx_pciercx_cfg031_s cn63xx; |
1001 | uint32_t cpm:1; | 590 | struct cvmx_pciercx_cfg031_s cn63xxp1; |
1002 | uint32_t sderc:1; | ||
1003 | uint32_t dllarc:1; | ||
1004 | uint32_t lbnc:1; | ||
1005 | uint32_t reserved_22_23:2; | ||
1006 | uint32_t pnum:8; | ||
1007 | #endif | ||
1008 | } cn52xx; | ||
1009 | struct cvmx_pciercx_cfg031_cn52xx cn52xxp1; | ||
1010 | struct cvmx_pciercx_cfg031_cn52xx cn56xx; | ||
1011 | struct cvmx_pciercx_cfg031_cn52xx cn56xxp1; | ||
1012 | struct cvmx_pciercx_cfg031_s cn61xx; | ||
1013 | struct cvmx_pciercx_cfg031_cn52xx cn63xx; | ||
1014 | struct cvmx_pciercx_cfg031_cn52xx cn63xxp1; | ||
1015 | struct cvmx_pciercx_cfg031_s cn66xx; | ||
1016 | struct cvmx_pciercx_cfg031_s cn68xx; | ||
1017 | struct cvmx_pciercx_cfg031_cn52xx cn68xxp1; | ||
1018 | struct cvmx_pciercx_cfg031_s cnf71xx; | ||
1019 | }; | 591 | }; |
1020 | 592 | ||
1021 | union cvmx_pciercx_cfg032 { | 593 | union cvmx_pciercx_cfg032 { |
1022 | uint32_t u32; | 594 | uint32_t u32; |
1023 | struct cvmx_pciercx_cfg032_s { | 595 | struct cvmx_pciercx_cfg032_s { |
1024 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1025 | uint32_t lab:1; | 596 | uint32_t lab:1; |
1026 | uint32_t lbm:1; | 597 | uint32_t lbm:1; |
1027 | uint32_t dlla:1; | 598 | uint32_t dlla:1; |
@@ -1042,46 +613,18 @@ union cvmx_pciercx_cfg032 { | |||
1042 | uint32_t rcb:1; | 613 | uint32_t rcb:1; |
1043 | uint32_t reserved_2_2:1; | 614 | uint32_t reserved_2_2:1; |
1044 | uint32_t aslpc:2; | 615 | uint32_t aslpc:2; |
1045 | #else | ||
1046 | uint32_t aslpc:2; | ||
1047 | uint32_t reserved_2_2:1; | ||
1048 | uint32_t rcb:1; | ||
1049 | uint32_t ld:1; | ||
1050 | uint32_t rl:1; | ||
1051 | uint32_t ccc:1; | ||
1052 | uint32_t es:1; | ||
1053 | uint32_t ecpm:1; | ||
1054 | uint32_t hawd:1; | ||
1055 | uint32_t lbm_int_enb:1; | ||
1056 | uint32_t lab_int_enb:1; | ||
1057 | uint32_t reserved_12_15:4; | ||
1058 | uint32_t ls:4; | ||
1059 | uint32_t nlw:6; | ||
1060 | uint32_t reserved_26_26:1; | ||
1061 | uint32_t lt:1; | ||
1062 | uint32_t scc:1; | ||
1063 | uint32_t dlla:1; | ||
1064 | uint32_t lbm:1; | ||
1065 | uint32_t lab:1; | ||
1066 | #endif | ||
1067 | } s; | 616 | } s; |
1068 | struct cvmx_pciercx_cfg032_s cn52xx; | 617 | struct cvmx_pciercx_cfg032_s cn52xx; |
1069 | struct cvmx_pciercx_cfg032_s cn52xxp1; | 618 | struct cvmx_pciercx_cfg032_s cn52xxp1; |
1070 | struct cvmx_pciercx_cfg032_s cn56xx; | 619 | struct cvmx_pciercx_cfg032_s cn56xx; |
1071 | struct cvmx_pciercx_cfg032_s cn56xxp1; | 620 | struct cvmx_pciercx_cfg032_s cn56xxp1; |
1072 | struct cvmx_pciercx_cfg032_s cn61xx; | ||
1073 | struct cvmx_pciercx_cfg032_s cn63xx; | 621 | struct cvmx_pciercx_cfg032_s cn63xx; |
1074 | struct cvmx_pciercx_cfg032_s cn63xxp1; | 622 | struct cvmx_pciercx_cfg032_s cn63xxp1; |
1075 | struct cvmx_pciercx_cfg032_s cn66xx; | ||
1076 | struct cvmx_pciercx_cfg032_s cn68xx; | ||
1077 | struct cvmx_pciercx_cfg032_s cn68xxp1; | ||
1078 | struct cvmx_pciercx_cfg032_s cnf71xx; | ||
1079 | }; | 623 | }; |
1080 | 624 | ||
1081 | union cvmx_pciercx_cfg033 { | 625 | union cvmx_pciercx_cfg033 { |
1082 | uint32_t u32; | 626 | uint32_t u32; |
1083 | struct cvmx_pciercx_cfg033_s { | 627 | struct cvmx_pciercx_cfg033_s { |
1084 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1085 | uint32_t ps_num:13; | 628 | uint32_t ps_num:13; |
1086 | uint32_t nccs:1; | 629 | uint32_t nccs:1; |
1087 | uint32_t emip:1; | 630 | uint32_t emip:1; |
@@ -1094,38 +637,18 @@ union cvmx_pciercx_cfg033 { | |||
1094 | uint32_t mrlsp:1; | 637 | uint32_t mrlsp:1; |
1095 | uint32_t pcp:1; | 638 | uint32_t pcp:1; |
1096 | uint32_t abp:1; | 639 | uint32_t abp:1; |
1097 | #else | ||
1098 | uint32_t abp:1; | ||
1099 | uint32_t pcp:1; | ||
1100 | uint32_t mrlsp:1; | ||
1101 | uint32_t aip:1; | ||
1102 | uint32_t pip:1; | ||
1103 | uint32_t hp_s:1; | ||
1104 | uint32_t hp_c:1; | ||
1105 | uint32_t sp_lv:8; | ||
1106 | uint32_t sp_ls:2; | ||
1107 | uint32_t emip:1; | ||
1108 | uint32_t nccs:1; | ||
1109 | uint32_t ps_num:13; | ||
1110 | #endif | ||
1111 | } s; | 640 | } s; |
1112 | struct cvmx_pciercx_cfg033_s cn52xx; | 641 | struct cvmx_pciercx_cfg033_s cn52xx; |
1113 | struct cvmx_pciercx_cfg033_s cn52xxp1; | 642 | struct cvmx_pciercx_cfg033_s cn52xxp1; |
1114 | struct cvmx_pciercx_cfg033_s cn56xx; | 643 | struct cvmx_pciercx_cfg033_s cn56xx; |
1115 | struct cvmx_pciercx_cfg033_s cn56xxp1; | 644 | struct cvmx_pciercx_cfg033_s cn56xxp1; |
1116 | struct cvmx_pciercx_cfg033_s cn61xx; | ||
1117 | struct cvmx_pciercx_cfg033_s cn63xx; | 645 | struct cvmx_pciercx_cfg033_s cn63xx; |
1118 | struct cvmx_pciercx_cfg033_s cn63xxp1; | 646 | struct cvmx_pciercx_cfg033_s cn63xxp1; |
1119 | struct cvmx_pciercx_cfg033_s cn66xx; | ||
1120 | struct cvmx_pciercx_cfg033_s cn68xx; | ||
1121 | struct cvmx_pciercx_cfg033_s cn68xxp1; | ||
1122 | struct cvmx_pciercx_cfg033_s cnf71xx; | ||
1123 | }; | 647 | }; |
1124 | 648 | ||
1125 | union cvmx_pciercx_cfg034 { | 649 | union cvmx_pciercx_cfg034 { |
1126 | uint32_t u32; | 650 | uint32_t u32; |
1127 | struct cvmx_pciercx_cfg034_s { | 651 | struct cvmx_pciercx_cfg034_s { |
1128 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1129 | uint32_t reserved_25_31:7; | 652 | uint32_t reserved_25_31:7; |
1130 | uint32_t dlls_c:1; | 653 | uint32_t dlls_c:1; |
1131 | uint32_t emis:1; | 654 | uint32_t emis:1; |
@@ -1148,48 +671,18 @@ union cvmx_pciercx_cfg034 { | |||
1148 | uint32_t mrls_en:1; | 671 | uint32_t mrls_en:1; |
1149 | uint32_t pf_en:1; | 672 | uint32_t pf_en:1; |
1150 | uint32_t abp_en:1; | 673 | uint32_t abp_en:1; |
1151 | #else | ||
1152 | uint32_t abp_en:1; | ||
1153 | uint32_t pf_en:1; | ||
1154 | uint32_t mrls_en:1; | ||
1155 | uint32_t pd_en:1; | ||
1156 | uint32_t ccint_en:1; | ||
1157 | uint32_t hpint_en:1; | ||
1158 | uint32_t aic:2; | ||
1159 | uint32_t pic:2; | ||
1160 | uint32_t pcc:1; | ||
1161 | uint32_t emic:1; | ||
1162 | uint32_t dlls_en:1; | ||
1163 | uint32_t reserved_13_15:3; | ||
1164 | uint32_t abp_d:1; | ||
1165 | uint32_t pf_d:1; | ||
1166 | uint32_t mrls_c:1; | ||
1167 | uint32_t pd_c:1; | ||
1168 | uint32_t ccint_d:1; | ||
1169 | uint32_t mrlss:1; | ||
1170 | uint32_t pds:1; | ||
1171 | uint32_t emis:1; | ||
1172 | uint32_t dlls_c:1; | ||
1173 | uint32_t reserved_25_31:7; | ||
1174 | #endif | ||
1175 | } s; | 674 | } s; |
1176 | struct cvmx_pciercx_cfg034_s cn52xx; | 675 | struct cvmx_pciercx_cfg034_s cn52xx; |
1177 | struct cvmx_pciercx_cfg034_s cn52xxp1; | 676 | struct cvmx_pciercx_cfg034_s cn52xxp1; |
1178 | struct cvmx_pciercx_cfg034_s cn56xx; | 677 | struct cvmx_pciercx_cfg034_s cn56xx; |
1179 | struct cvmx_pciercx_cfg034_s cn56xxp1; | 678 | struct cvmx_pciercx_cfg034_s cn56xxp1; |
1180 | struct cvmx_pciercx_cfg034_s cn61xx; | ||
1181 | struct cvmx_pciercx_cfg034_s cn63xx; | 679 | struct cvmx_pciercx_cfg034_s cn63xx; |
1182 | struct cvmx_pciercx_cfg034_s cn63xxp1; | 680 | struct cvmx_pciercx_cfg034_s cn63xxp1; |
1183 | struct cvmx_pciercx_cfg034_s cn66xx; | ||
1184 | struct cvmx_pciercx_cfg034_s cn68xx; | ||
1185 | struct cvmx_pciercx_cfg034_s cn68xxp1; | ||
1186 | struct cvmx_pciercx_cfg034_s cnf71xx; | ||
1187 | }; | 681 | }; |
1188 | 682 | ||
1189 | union cvmx_pciercx_cfg035 { | 683 | union cvmx_pciercx_cfg035 { |
1190 | uint32_t u32; | 684 | uint32_t u32; |
1191 | struct cvmx_pciercx_cfg035_s { | 685 | struct cvmx_pciercx_cfg035_s { |
1192 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1193 | uint32_t reserved_17_31:15; | 686 | uint32_t reserved_17_31:15; |
1194 | uint32_t crssv:1; | 687 | uint32_t crssv:1; |
1195 | uint32_t reserved_5_15:11; | 688 | uint32_t reserved_5_15:11; |
@@ -1198,304 +691,82 @@ union cvmx_pciercx_cfg035 { | |||
1198 | uint32_t sefee:1; | 691 | uint32_t sefee:1; |
1199 | uint32_t senfee:1; | 692 | uint32_t senfee:1; |
1200 | uint32_t secee:1; | 693 | uint32_t secee:1; |
1201 | #else | ||
1202 | uint32_t secee:1; | ||
1203 | uint32_t senfee:1; | ||
1204 | uint32_t sefee:1; | ||
1205 | uint32_t pmeie:1; | ||
1206 | uint32_t crssve:1; | ||
1207 | uint32_t reserved_5_15:11; | ||
1208 | uint32_t crssv:1; | ||
1209 | uint32_t reserved_17_31:15; | ||
1210 | #endif | ||
1211 | } s; | 694 | } s; |
1212 | struct cvmx_pciercx_cfg035_s cn52xx; | 695 | struct cvmx_pciercx_cfg035_s cn52xx; |
1213 | struct cvmx_pciercx_cfg035_s cn52xxp1; | 696 | struct cvmx_pciercx_cfg035_s cn52xxp1; |
1214 | struct cvmx_pciercx_cfg035_s cn56xx; | 697 | struct cvmx_pciercx_cfg035_s cn56xx; |
1215 | struct cvmx_pciercx_cfg035_s cn56xxp1; | 698 | struct cvmx_pciercx_cfg035_s cn56xxp1; |
1216 | struct cvmx_pciercx_cfg035_s cn61xx; | ||
1217 | struct cvmx_pciercx_cfg035_s cn63xx; | 699 | struct cvmx_pciercx_cfg035_s cn63xx; |
1218 | struct cvmx_pciercx_cfg035_s cn63xxp1; | 700 | struct cvmx_pciercx_cfg035_s cn63xxp1; |
1219 | struct cvmx_pciercx_cfg035_s cn66xx; | ||
1220 | struct cvmx_pciercx_cfg035_s cn68xx; | ||
1221 | struct cvmx_pciercx_cfg035_s cn68xxp1; | ||
1222 | struct cvmx_pciercx_cfg035_s cnf71xx; | ||
1223 | }; | 701 | }; |
1224 | 702 | ||
1225 | union cvmx_pciercx_cfg036 { | 703 | union cvmx_pciercx_cfg036 { |
1226 | uint32_t u32; | 704 | uint32_t u32; |
1227 | struct cvmx_pciercx_cfg036_s { | 705 | struct cvmx_pciercx_cfg036_s { |
1228 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1229 | uint32_t reserved_18_31:14; | 706 | uint32_t reserved_18_31:14; |
1230 | uint32_t pme_pend:1; | 707 | uint32_t pme_pend:1; |
1231 | uint32_t pme_stat:1; | 708 | uint32_t pme_stat:1; |
1232 | uint32_t pme_rid:16; | 709 | uint32_t pme_rid:16; |
1233 | #else | ||
1234 | uint32_t pme_rid:16; | ||
1235 | uint32_t pme_stat:1; | ||
1236 | uint32_t pme_pend:1; | ||
1237 | uint32_t reserved_18_31:14; | ||
1238 | #endif | ||
1239 | } s; | 710 | } s; |
1240 | struct cvmx_pciercx_cfg036_s cn52xx; | 711 | struct cvmx_pciercx_cfg036_s cn52xx; |
1241 | struct cvmx_pciercx_cfg036_s cn52xxp1; | 712 | struct cvmx_pciercx_cfg036_s cn52xxp1; |
1242 | struct cvmx_pciercx_cfg036_s cn56xx; | 713 | struct cvmx_pciercx_cfg036_s cn56xx; |
1243 | struct cvmx_pciercx_cfg036_s cn56xxp1; | 714 | struct cvmx_pciercx_cfg036_s cn56xxp1; |
1244 | struct cvmx_pciercx_cfg036_s cn61xx; | ||
1245 | struct cvmx_pciercx_cfg036_s cn63xx; | 715 | struct cvmx_pciercx_cfg036_s cn63xx; |
1246 | struct cvmx_pciercx_cfg036_s cn63xxp1; | 716 | struct cvmx_pciercx_cfg036_s cn63xxp1; |
1247 | struct cvmx_pciercx_cfg036_s cn66xx; | ||
1248 | struct cvmx_pciercx_cfg036_s cn68xx; | ||
1249 | struct cvmx_pciercx_cfg036_s cn68xxp1; | ||
1250 | struct cvmx_pciercx_cfg036_s cnf71xx; | ||
1251 | }; | 717 | }; |
1252 | 718 | ||
1253 | union cvmx_pciercx_cfg037 { | 719 | union cvmx_pciercx_cfg037 { |
1254 | uint32_t u32; | 720 | uint32_t u32; |
1255 | struct cvmx_pciercx_cfg037_s { | 721 | struct cvmx_pciercx_cfg037_s { |
1256 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1257 | uint32_t reserved_20_31:12; | ||
1258 | uint32_t obffs:2; | ||
1259 | uint32_t reserved_12_17:6; | ||
1260 | uint32_t ltrs:1; | ||
1261 | uint32_t noroprpr:1; | ||
1262 | uint32_t atom128s:1; | ||
1263 | uint32_t atom64s:1; | ||
1264 | uint32_t atom32s:1; | ||
1265 | uint32_t atom_ops:1; | ||
1266 | uint32_t reserved_5_5:1; | ||
1267 | uint32_t ctds:1; | ||
1268 | uint32_t ctrs:4; | ||
1269 | #else | ||
1270 | uint32_t ctrs:4; | ||
1271 | uint32_t ctds:1; | ||
1272 | uint32_t reserved_5_5:1; | ||
1273 | uint32_t atom_ops:1; | ||
1274 | uint32_t atom32s:1; | ||
1275 | uint32_t atom64s:1; | ||
1276 | uint32_t atom128s:1; | ||
1277 | uint32_t noroprpr:1; | ||
1278 | uint32_t ltrs:1; | ||
1279 | uint32_t reserved_12_17:6; | ||
1280 | uint32_t obffs:2; | ||
1281 | uint32_t reserved_20_31:12; | ||
1282 | #endif | ||
1283 | } s; | ||
1284 | struct cvmx_pciercx_cfg037_cn52xx { | ||
1285 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1286 | uint32_t reserved_5_31:27; | ||
1287 | uint32_t ctds:1; | ||
1288 | uint32_t ctrs:4; | ||
1289 | #else | ||
1290 | uint32_t ctrs:4; | ||
1291 | uint32_t ctds:1; | ||
1292 | uint32_t reserved_5_31:27; | 722 | uint32_t reserved_5_31:27; |
1293 | #endif | ||
1294 | } cn52xx; | ||
1295 | struct cvmx_pciercx_cfg037_cn52xx cn52xxp1; | ||
1296 | struct cvmx_pciercx_cfg037_cn52xx cn56xx; | ||
1297 | struct cvmx_pciercx_cfg037_cn52xx cn56xxp1; | ||
1298 | struct cvmx_pciercx_cfg037_cn61xx { | ||
1299 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1300 | uint32_t reserved_14_31:18; | ||
1301 | uint32_t tph:2; | ||
1302 | uint32_t reserved_11_11:1; | ||
1303 | uint32_t noroprpr:1; | ||
1304 | uint32_t atom128s:1; | ||
1305 | uint32_t atom64s:1; | ||
1306 | uint32_t atom32s:1; | ||
1307 | uint32_t atom_ops:1; | ||
1308 | uint32_t ari_fw:1; | ||
1309 | uint32_t ctds:1; | 723 | uint32_t ctds:1; |
1310 | uint32_t ctrs:4; | 724 | uint32_t ctrs:4; |
1311 | #else | 725 | } s; |
1312 | uint32_t ctrs:4; | 726 | struct cvmx_pciercx_cfg037_s cn52xx; |
1313 | uint32_t ctds:1; | 727 | struct cvmx_pciercx_cfg037_s cn52xxp1; |
1314 | uint32_t ari_fw:1; | 728 | struct cvmx_pciercx_cfg037_s cn56xx; |
1315 | uint32_t atom_ops:1; | 729 | struct cvmx_pciercx_cfg037_s cn56xxp1; |
1316 | uint32_t atom32s:1; | 730 | struct cvmx_pciercx_cfg037_s cn63xx; |
1317 | uint32_t atom64s:1; | 731 | struct cvmx_pciercx_cfg037_s cn63xxp1; |
1318 | uint32_t atom128s:1; | ||
1319 | uint32_t noroprpr:1; | ||
1320 | uint32_t reserved_11_11:1; | ||
1321 | uint32_t tph:2; | ||
1322 | uint32_t reserved_14_31:18; | ||
1323 | #endif | ||
1324 | } cn61xx; | ||
1325 | struct cvmx_pciercx_cfg037_cn52xx cn63xx; | ||
1326 | struct cvmx_pciercx_cfg037_cn52xx cn63xxp1; | ||
1327 | struct cvmx_pciercx_cfg037_cn66xx { | ||
1328 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1329 | uint32_t reserved_14_31:18; | ||
1330 | uint32_t tph:2; | ||
1331 | uint32_t reserved_11_11:1; | ||
1332 | uint32_t noroprpr:1; | ||
1333 | uint32_t atom128s:1; | ||
1334 | uint32_t atom64s:1; | ||
1335 | uint32_t atom32s:1; | ||
1336 | uint32_t atom_ops:1; | ||
1337 | uint32_t ari:1; | ||
1338 | uint32_t ctds:1; | ||
1339 | uint32_t ctrs:4; | ||
1340 | #else | ||
1341 | uint32_t ctrs:4; | ||
1342 | uint32_t ctds:1; | ||
1343 | uint32_t ari:1; | ||
1344 | uint32_t atom_ops:1; | ||
1345 | uint32_t atom32s:1; | ||
1346 | uint32_t atom64s:1; | ||
1347 | uint32_t atom128s:1; | ||
1348 | uint32_t noroprpr:1; | ||
1349 | uint32_t reserved_11_11:1; | ||
1350 | uint32_t tph:2; | ||
1351 | uint32_t reserved_14_31:18; | ||
1352 | #endif | ||
1353 | } cn66xx; | ||
1354 | struct cvmx_pciercx_cfg037_cn66xx cn68xx; | ||
1355 | struct cvmx_pciercx_cfg037_cn66xx cn68xxp1; | ||
1356 | struct cvmx_pciercx_cfg037_cnf71xx { | ||
1357 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1358 | uint32_t reserved_20_31:12; | ||
1359 | uint32_t obffs:2; | ||
1360 | uint32_t reserved_14_17:4; | ||
1361 | uint32_t tphs:2; | ||
1362 | uint32_t ltrs:1; | ||
1363 | uint32_t noroprpr:1; | ||
1364 | uint32_t atom128s:1; | ||
1365 | uint32_t atom64s:1; | ||
1366 | uint32_t atom32s:1; | ||
1367 | uint32_t atom_ops:1; | ||
1368 | uint32_t ari_fw:1; | ||
1369 | uint32_t ctds:1; | ||
1370 | uint32_t ctrs:4; | ||
1371 | #else | ||
1372 | uint32_t ctrs:4; | ||
1373 | uint32_t ctds:1; | ||
1374 | uint32_t ari_fw:1; | ||
1375 | uint32_t atom_ops:1; | ||
1376 | uint32_t atom32s:1; | ||
1377 | uint32_t atom64s:1; | ||
1378 | uint32_t atom128s:1; | ||
1379 | uint32_t noroprpr:1; | ||
1380 | uint32_t ltrs:1; | ||
1381 | uint32_t tphs:2; | ||
1382 | uint32_t reserved_14_17:4; | ||
1383 | uint32_t obffs:2; | ||
1384 | uint32_t reserved_20_31:12; | ||
1385 | #endif | ||
1386 | } cnf71xx; | ||
1387 | }; | 732 | }; |
1388 | 733 | ||
1389 | union cvmx_pciercx_cfg038 { | 734 | union cvmx_pciercx_cfg038 { |
1390 | uint32_t u32; | 735 | uint32_t u32; |
1391 | struct cvmx_pciercx_cfg038_s { | 736 | struct cvmx_pciercx_cfg038_s { |
1392 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1393 | uint32_t reserved_15_31:17; | ||
1394 | uint32_t obffe:2; | ||
1395 | uint32_t reserved_11_12:2; | ||
1396 | uint32_t ltre:1; | ||
1397 | uint32_t id0_cp:1; | ||
1398 | uint32_t id0_rq:1; | ||
1399 | uint32_t atom_op_eb:1; | ||
1400 | uint32_t atom_op:1; | ||
1401 | uint32_t ari:1; | ||
1402 | uint32_t ctd:1; | ||
1403 | uint32_t ctv:4; | ||
1404 | #else | ||
1405 | uint32_t ctv:4; | ||
1406 | uint32_t ctd:1; | ||
1407 | uint32_t ari:1; | ||
1408 | uint32_t atom_op:1; | ||
1409 | uint32_t atom_op_eb:1; | ||
1410 | uint32_t id0_rq:1; | ||
1411 | uint32_t id0_cp:1; | ||
1412 | uint32_t ltre:1; | ||
1413 | uint32_t reserved_11_12:2; | ||
1414 | uint32_t obffe:2; | ||
1415 | uint32_t reserved_15_31:17; | ||
1416 | #endif | ||
1417 | } s; | ||
1418 | struct cvmx_pciercx_cfg038_cn52xx { | ||
1419 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1420 | uint32_t reserved_5_31:27; | 737 | uint32_t reserved_5_31:27; |
1421 | uint32_t ctd:1; | 738 | uint32_t ctd:1; |
1422 | uint32_t ctv:4; | 739 | uint32_t ctv:4; |
1423 | #else | 740 | } s; |
1424 | uint32_t ctv:4; | 741 | struct cvmx_pciercx_cfg038_s cn52xx; |
1425 | uint32_t ctd:1; | 742 | struct cvmx_pciercx_cfg038_s cn52xxp1; |
1426 | uint32_t reserved_5_31:27; | 743 | struct cvmx_pciercx_cfg038_s cn56xx; |
1427 | #endif | 744 | struct cvmx_pciercx_cfg038_s cn56xxp1; |
1428 | } cn52xx; | 745 | struct cvmx_pciercx_cfg038_s cn63xx; |
1429 | struct cvmx_pciercx_cfg038_cn52xx cn52xxp1; | 746 | struct cvmx_pciercx_cfg038_s cn63xxp1; |
1430 | struct cvmx_pciercx_cfg038_cn52xx cn56xx; | ||
1431 | struct cvmx_pciercx_cfg038_cn52xx cn56xxp1; | ||
1432 | struct cvmx_pciercx_cfg038_cn61xx { | ||
1433 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1434 | uint32_t reserved_10_31:22; | ||
1435 | uint32_t id0_cp:1; | ||
1436 | uint32_t id0_rq:1; | ||
1437 | uint32_t atom_op_eb:1; | ||
1438 | uint32_t atom_op:1; | ||
1439 | uint32_t ari:1; | ||
1440 | uint32_t ctd:1; | ||
1441 | uint32_t ctv:4; | ||
1442 | #else | ||
1443 | uint32_t ctv:4; | ||
1444 | uint32_t ctd:1; | ||
1445 | uint32_t ari:1; | ||
1446 | uint32_t atom_op:1; | ||
1447 | uint32_t atom_op_eb:1; | ||
1448 | uint32_t id0_rq:1; | ||
1449 | uint32_t id0_cp:1; | ||
1450 | uint32_t reserved_10_31:22; | ||
1451 | #endif | ||
1452 | } cn61xx; | ||
1453 | struct cvmx_pciercx_cfg038_cn52xx cn63xx; | ||
1454 | struct cvmx_pciercx_cfg038_cn52xx cn63xxp1; | ||
1455 | struct cvmx_pciercx_cfg038_cn61xx cn66xx; | ||
1456 | struct cvmx_pciercx_cfg038_cn61xx cn68xx; | ||
1457 | struct cvmx_pciercx_cfg038_cn61xx cn68xxp1; | ||
1458 | struct cvmx_pciercx_cfg038_s cnf71xx; | ||
1459 | }; | 747 | }; |
1460 | 748 | ||
1461 | union cvmx_pciercx_cfg039 { | 749 | union cvmx_pciercx_cfg039 { |
1462 | uint32_t u32; | 750 | uint32_t u32; |
1463 | struct cvmx_pciercx_cfg039_s { | 751 | struct cvmx_pciercx_cfg039_s { |
1464 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1465 | uint32_t reserved_9_31:23; | 752 | uint32_t reserved_9_31:23; |
1466 | uint32_t cls:1; | 753 | uint32_t cls:1; |
1467 | uint32_t slsv:7; | 754 | uint32_t slsv:7; |
1468 | uint32_t reserved_0_0:1; | 755 | uint32_t reserved_0_0:1; |
1469 | #else | ||
1470 | uint32_t reserved_0_0:1; | ||
1471 | uint32_t slsv:7; | ||
1472 | uint32_t cls:1; | ||
1473 | uint32_t reserved_9_31:23; | ||
1474 | #endif | ||
1475 | } s; | 756 | } s; |
1476 | struct cvmx_pciercx_cfg039_cn52xx { | 757 | struct cvmx_pciercx_cfg039_cn52xx { |
1477 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1478 | uint32_t reserved_0_31:32; | 758 | uint32_t reserved_0_31:32; |
1479 | #else | ||
1480 | uint32_t reserved_0_31:32; | ||
1481 | #endif | ||
1482 | } cn52xx; | 759 | } cn52xx; |
1483 | struct cvmx_pciercx_cfg039_cn52xx cn52xxp1; | 760 | struct cvmx_pciercx_cfg039_cn52xx cn52xxp1; |
1484 | struct cvmx_pciercx_cfg039_cn52xx cn56xx; | 761 | struct cvmx_pciercx_cfg039_cn52xx cn56xx; |
1485 | struct cvmx_pciercx_cfg039_cn52xx cn56xxp1; | 762 | struct cvmx_pciercx_cfg039_cn52xx cn56xxp1; |
1486 | struct cvmx_pciercx_cfg039_s cn61xx; | ||
1487 | struct cvmx_pciercx_cfg039_s cn63xx; | 763 | struct cvmx_pciercx_cfg039_s cn63xx; |
1488 | struct cvmx_pciercx_cfg039_cn52xx cn63xxp1; | 764 | struct cvmx_pciercx_cfg039_cn52xx cn63xxp1; |
1489 | struct cvmx_pciercx_cfg039_s cn66xx; | ||
1490 | struct cvmx_pciercx_cfg039_s cn68xx; | ||
1491 | struct cvmx_pciercx_cfg039_s cn68xxp1; | ||
1492 | struct cvmx_pciercx_cfg039_s cnf71xx; | ||
1493 | }; | 765 | }; |
1494 | 766 | ||
1495 | union cvmx_pciercx_cfg040 { | 767 | union cvmx_pciercx_cfg040 { |
1496 | uint32_t u32; | 768 | uint32_t u32; |
1497 | struct cvmx_pciercx_cfg040_s { | 769 | struct cvmx_pciercx_cfg040_s { |
1498 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1499 | uint32_t reserved_17_31:15; | 770 | uint32_t reserved_17_31:15; |
1500 | uint32_t cdl:1; | 771 | uint32_t cdl:1; |
1501 | uint32_t reserved_13_15:3; | 772 | uint32_t reserved_13_15:3; |
@@ -1507,193 +778,62 @@ union cvmx_pciercx_cfg040 { | |||
1507 | uint32_t hasd:1; | 778 | uint32_t hasd:1; |
1508 | uint32_t ec:1; | 779 | uint32_t ec:1; |
1509 | uint32_t tls:4; | 780 | uint32_t tls:4; |
1510 | #else | ||
1511 | uint32_t tls:4; | ||
1512 | uint32_t ec:1; | ||
1513 | uint32_t hasd:1; | ||
1514 | uint32_t sde:1; | ||
1515 | uint32_t tm:3; | ||
1516 | uint32_t emc:1; | ||
1517 | uint32_t csos:1; | ||
1518 | uint32_t cde:1; | ||
1519 | uint32_t reserved_13_15:3; | ||
1520 | uint32_t cdl:1; | ||
1521 | uint32_t reserved_17_31:15; | ||
1522 | #endif | ||
1523 | } s; | 781 | } s; |
1524 | struct cvmx_pciercx_cfg040_cn52xx { | 782 | struct cvmx_pciercx_cfg040_cn52xx { |
1525 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1526 | uint32_t reserved_0_31:32; | 783 | uint32_t reserved_0_31:32; |
1527 | #else | ||
1528 | uint32_t reserved_0_31:32; | ||
1529 | #endif | ||
1530 | } cn52xx; | 784 | } cn52xx; |
1531 | struct cvmx_pciercx_cfg040_cn52xx cn52xxp1; | 785 | struct cvmx_pciercx_cfg040_cn52xx cn52xxp1; |
1532 | struct cvmx_pciercx_cfg040_cn52xx cn56xx; | 786 | struct cvmx_pciercx_cfg040_cn52xx cn56xx; |
1533 | struct cvmx_pciercx_cfg040_cn52xx cn56xxp1; | 787 | struct cvmx_pciercx_cfg040_cn52xx cn56xxp1; |
1534 | struct cvmx_pciercx_cfg040_s cn61xx; | ||
1535 | struct cvmx_pciercx_cfg040_s cn63xx; | 788 | struct cvmx_pciercx_cfg040_s cn63xx; |
1536 | struct cvmx_pciercx_cfg040_s cn63xxp1; | 789 | struct cvmx_pciercx_cfg040_s cn63xxp1; |
1537 | struct cvmx_pciercx_cfg040_s cn66xx; | ||
1538 | struct cvmx_pciercx_cfg040_s cn68xx; | ||
1539 | struct cvmx_pciercx_cfg040_s cn68xxp1; | ||
1540 | struct cvmx_pciercx_cfg040_s cnf71xx; | ||
1541 | }; | 790 | }; |
1542 | 791 | ||
1543 | union cvmx_pciercx_cfg041 { | 792 | union cvmx_pciercx_cfg041 { |
1544 | uint32_t u32; | 793 | uint32_t u32; |
1545 | struct cvmx_pciercx_cfg041_s { | 794 | struct cvmx_pciercx_cfg041_s { |
1546 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1547 | uint32_t reserved_0_31:32; | 795 | uint32_t reserved_0_31:32; |
1548 | #else | ||
1549 | uint32_t reserved_0_31:32; | ||
1550 | #endif | ||
1551 | } s; | 796 | } s; |
1552 | struct cvmx_pciercx_cfg041_s cn52xx; | 797 | struct cvmx_pciercx_cfg041_s cn52xx; |
1553 | struct cvmx_pciercx_cfg041_s cn52xxp1; | 798 | struct cvmx_pciercx_cfg041_s cn52xxp1; |
1554 | struct cvmx_pciercx_cfg041_s cn56xx; | 799 | struct cvmx_pciercx_cfg041_s cn56xx; |
1555 | struct cvmx_pciercx_cfg041_s cn56xxp1; | 800 | struct cvmx_pciercx_cfg041_s cn56xxp1; |
1556 | struct cvmx_pciercx_cfg041_s cn61xx; | ||
1557 | struct cvmx_pciercx_cfg041_s cn63xx; | 801 | struct cvmx_pciercx_cfg041_s cn63xx; |
1558 | struct cvmx_pciercx_cfg041_s cn63xxp1; | 802 | struct cvmx_pciercx_cfg041_s cn63xxp1; |
1559 | struct cvmx_pciercx_cfg041_s cn66xx; | ||
1560 | struct cvmx_pciercx_cfg041_s cn68xx; | ||
1561 | struct cvmx_pciercx_cfg041_s cn68xxp1; | ||
1562 | struct cvmx_pciercx_cfg041_s cnf71xx; | ||
1563 | }; | 803 | }; |
1564 | 804 | ||
1565 | union cvmx_pciercx_cfg042 { | 805 | union cvmx_pciercx_cfg042 { |
1566 | uint32_t u32; | 806 | uint32_t u32; |
1567 | struct cvmx_pciercx_cfg042_s { | 807 | struct cvmx_pciercx_cfg042_s { |
1568 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1569 | uint32_t reserved_0_31:32; | 808 | uint32_t reserved_0_31:32; |
1570 | #else | ||
1571 | uint32_t reserved_0_31:32; | ||
1572 | #endif | ||
1573 | } s; | 809 | } s; |
1574 | struct cvmx_pciercx_cfg042_s cn52xx; | 810 | struct cvmx_pciercx_cfg042_s cn52xx; |
1575 | struct cvmx_pciercx_cfg042_s cn52xxp1; | 811 | struct cvmx_pciercx_cfg042_s cn52xxp1; |
1576 | struct cvmx_pciercx_cfg042_s cn56xx; | 812 | struct cvmx_pciercx_cfg042_s cn56xx; |
1577 | struct cvmx_pciercx_cfg042_s cn56xxp1; | 813 | struct cvmx_pciercx_cfg042_s cn56xxp1; |
1578 | struct cvmx_pciercx_cfg042_s cn61xx; | ||
1579 | struct cvmx_pciercx_cfg042_s cn63xx; | 814 | struct cvmx_pciercx_cfg042_s cn63xx; |
1580 | struct cvmx_pciercx_cfg042_s cn63xxp1; | 815 | struct cvmx_pciercx_cfg042_s cn63xxp1; |
1581 | struct cvmx_pciercx_cfg042_s cn66xx; | ||
1582 | struct cvmx_pciercx_cfg042_s cn68xx; | ||
1583 | struct cvmx_pciercx_cfg042_s cn68xxp1; | ||
1584 | struct cvmx_pciercx_cfg042_s cnf71xx; | ||
1585 | }; | 816 | }; |
1586 | 817 | ||
1587 | union cvmx_pciercx_cfg064 { | 818 | union cvmx_pciercx_cfg064 { |
1588 | uint32_t u32; | 819 | uint32_t u32; |
1589 | struct cvmx_pciercx_cfg064_s { | 820 | struct cvmx_pciercx_cfg064_s { |
1590 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1591 | uint32_t nco:12; | 821 | uint32_t nco:12; |
1592 | uint32_t cv:4; | 822 | uint32_t cv:4; |
1593 | uint32_t pcieec:16; | 823 | uint32_t pcieec:16; |
1594 | #else | ||
1595 | uint32_t pcieec:16; | ||
1596 | uint32_t cv:4; | ||
1597 | uint32_t nco:12; | ||
1598 | #endif | ||
1599 | } s; | 824 | } s; |
1600 | struct cvmx_pciercx_cfg064_s cn52xx; | 825 | struct cvmx_pciercx_cfg064_s cn52xx; |
1601 | struct cvmx_pciercx_cfg064_s cn52xxp1; | 826 | struct cvmx_pciercx_cfg064_s cn52xxp1; |
1602 | struct cvmx_pciercx_cfg064_s cn56xx; | 827 | struct cvmx_pciercx_cfg064_s cn56xx; |
1603 | struct cvmx_pciercx_cfg064_s cn56xxp1; | 828 | struct cvmx_pciercx_cfg064_s cn56xxp1; |
1604 | struct cvmx_pciercx_cfg064_s cn61xx; | ||
1605 | struct cvmx_pciercx_cfg064_s cn63xx; | 829 | struct cvmx_pciercx_cfg064_s cn63xx; |
1606 | struct cvmx_pciercx_cfg064_s cn63xxp1; | 830 | struct cvmx_pciercx_cfg064_s cn63xxp1; |
1607 | struct cvmx_pciercx_cfg064_s cn66xx; | ||
1608 | struct cvmx_pciercx_cfg064_s cn68xx; | ||
1609 | struct cvmx_pciercx_cfg064_s cn68xxp1; | ||
1610 | struct cvmx_pciercx_cfg064_s cnf71xx; | ||
1611 | }; | 831 | }; |
1612 | 832 | ||
1613 | union cvmx_pciercx_cfg065 { | 833 | union cvmx_pciercx_cfg065 { |
1614 | uint32_t u32; | 834 | uint32_t u32; |
1615 | struct cvmx_pciercx_cfg065_s { | 835 | struct cvmx_pciercx_cfg065_s { |
1616 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1617 | uint32_t reserved_25_31:7; | ||
1618 | uint32_t uatombs:1; | ||
1619 | uint32_t reserved_23_23:1; | ||
1620 | uint32_t ucies:1; | ||
1621 | uint32_t reserved_21_21:1; | ||
1622 | uint32_t ures:1; | ||
1623 | uint32_t ecrces:1; | ||
1624 | uint32_t mtlps:1; | ||
1625 | uint32_t ros:1; | ||
1626 | uint32_t ucs:1; | ||
1627 | uint32_t cas:1; | ||
1628 | uint32_t cts:1; | ||
1629 | uint32_t fcpes:1; | ||
1630 | uint32_t ptlps:1; | ||
1631 | uint32_t reserved_6_11:6; | ||
1632 | uint32_t sdes:1; | ||
1633 | uint32_t dlpes:1; | ||
1634 | uint32_t reserved_0_3:4; | ||
1635 | #else | ||
1636 | uint32_t reserved_0_3:4; | ||
1637 | uint32_t dlpes:1; | ||
1638 | uint32_t sdes:1; | ||
1639 | uint32_t reserved_6_11:6; | ||
1640 | uint32_t ptlps:1; | ||
1641 | uint32_t fcpes:1; | ||
1642 | uint32_t cts:1; | ||
1643 | uint32_t cas:1; | ||
1644 | uint32_t ucs:1; | ||
1645 | uint32_t ros:1; | ||
1646 | uint32_t mtlps:1; | ||
1647 | uint32_t ecrces:1; | ||
1648 | uint32_t ures:1; | ||
1649 | uint32_t reserved_21_21:1; | ||
1650 | uint32_t ucies:1; | ||
1651 | uint32_t reserved_23_23:1; | ||
1652 | uint32_t uatombs:1; | ||
1653 | uint32_t reserved_25_31:7; | ||
1654 | #endif | ||
1655 | } s; | ||
1656 | struct cvmx_pciercx_cfg065_cn52xx { | ||
1657 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1658 | uint32_t reserved_21_31:11; | ||
1659 | uint32_t ures:1; | ||
1660 | uint32_t ecrces:1; | ||
1661 | uint32_t mtlps:1; | ||
1662 | uint32_t ros:1; | ||
1663 | uint32_t ucs:1; | ||
1664 | uint32_t cas:1; | ||
1665 | uint32_t cts:1; | ||
1666 | uint32_t fcpes:1; | ||
1667 | uint32_t ptlps:1; | ||
1668 | uint32_t reserved_6_11:6; | ||
1669 | uint32_t sdes:1; | ||
1670 | uint32_t dlpes:1; | ||
1671 | uint32_t reserved_0_3:4; | ||
1672 | #else | ||
1673 | uint32_t reserved_0_3:4; | ||
1674 | uint32_t dlpes:1; | ||
1675 | uint32_t sdes:1; | ||
1676 | uint32_t reserved_6_11:6; | ||
1677 | uint32_t ptlps:1; | ||
1678 | uint32_t fcpes:1; | ||
1679 | uint32_t cts:1; | ||
1680 | uint32_t cas:1; | ||
1681 | uint32_t ucs:1; | ||
1682 | uint32_t ros:1; | ||
1683 | uint32_t mtlps:1; | ||
1684 | uint32_t ecrces:1; | ||
1685 | uint32_t ures:1; | ||
1686 | uint32_t reserved_21_31:11; | 836 | uint32_t reserved_21_31:11; |
1687 | #endif | ||
1688 | } cn52xx; | ||
1689 | struct cvmx_pciercx_cfg065_cn52xx cn52xxp1; | ||
1690 | struct cvmx_pciercx_cfg065_cn52xx cn56xx; | ||
1691 | struct cvmx_pciercx_cfg065_cn52xx cn56xxp1; | ||
1692 | struct cvmx_pciercx_cfg065_cn61xx { | ||
1693 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1694 | uint32_t reserved_25_31:7; | ||
1695 | uint32_t uatombs:1; | ||
1696 | uint32_t reserved_21_23:3; | ||
1697 | uint32_t ures:1; | 837 | uint32_t ures:1; |
1698 | uint32_t ecrces:1; | 838 | uint32_t ecrces:1; |
1699 | uint32_t mtlps:1; | 839 | uint32_t mtlps:1; |
@@ -1707,117 +847,19 @@ union cvmx_pciercx_cfg065 { | |||
1707 | uint32_t sdes:1; | 847 | uint32_t sdes:1; |
1708 | uint32_t dlpes:1; | 848 | uint32_t dlpes:1; |
1709 | uint32_t reserved_0_3:4; | 849 | uint32_t reserved_0_3:4; |
1710 | #else | 850 | } s; |
1711 | uint32_t reserved_0_3:4; | 851 | struct cvmx_pciercx_cfg065_s cn52xx; |
1712 | uint32_t dlpes:1; | 852 | struct cvmx_pciercx_cfg065_s cn52xxp1; |
1713 | uint32_t sdes:1; | 853 | struct cvmx_pciercx_cfg065_s cn56xx; |
1714 | uint32_t reserved_6_11:6; | 854 | struct cvmx_pciercx_cfg065_s cn56xxp1; |
1715 | uint32_t ptlps:1; | 855 | struct cvmx_pciercx_cfg065_s cn63xx; |
1716 | uint32_t fcpes:1; | 856 | struct cvmx_pciercx_cfg065_s cn63xxp1; |
1717 | uint32_t cts:1; | ||
1718 | uint32_t cas:1; | ||
1719 | uint32_t ucs:1; | ||
1720 | uint32_t ros:1; | ||
1721 | uint32_t mtlps:1; | ||
1722 | uint32_t ecrces:1; | ||
1723 | uint32_t ures:1; | ||
1724 | uint32_t reserved_21_23:3; | ||
1725 | uint32_t uatombs:1; | ||
1726 | uint32_t reserved_25_31:7; | ||
1727 | #endif | ||
1728 | } cn61xx; | ||
1729 | struct cvmx_pciercx_cfg065_cn52xx cn63xx; | ||
1730 | struct cvmx_pciercx_cfg065_cn52xx cn63xxp1; | ||
1731 | struct cvmx_pciercx_cfg065_cn61xx cn66xx; | ||
1732 | struct cvmx_pciercx_cfg065_cn61xx cn68xx; | ||
1733 | struct cvmx_pciercx_cfg065_cn52xx cn68xxp1; | ||
1734 | struct cvmx_pciercx_cfg065_s cnf71xx; | ||
1735 | }; | 857 | }; |
1736 | 858 | ||
1737 | union cvmx_pciercx_cfg066 { | 859 | union cvmx_pciercx_cfg066 { |
1738 | uint32_t u32; | 860 | uint32_t u32; |
1739 | struct cvmx_pciercx_cfg066_s { | 861 | struct cvmx_pciercx_cfg066_s { |
1740 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1741 | uint32_t reserved_25_31:7; | ||
1742 | uint32_t uatombm:1; | ||
1743 | uint32_t reserved_23_23:1; | ||
1744 | uint32_t uciem:1; | ||
1745 | uint32_t reserved_21_21:1; | ||
1746 | uint32_t urem:1; | ||
1747 | uint32_t ecrcem:1; | ||
1748 | uint32_t mtlpm:1; | ||
1749 | uint32_t rom:1; | ||
1750 | uint32_t ucm:1; | ||
1751 | uint32_t cam:1; | ||
1752 | uint32_t ctm:1; | ||
1753 | uint32_t fcpem:1; | ||
1754 | uint32_t ptlpm:1; | ||
1755 | uint32_t reserved_6_11:6; | ||
1756 | uint32_t sdem:1; | ||
1757 | uint32_t dlpem:1; | ||
1758 | uint32_t reserved_0_3:4; | ||
1759 | #else | ||
1760 | uint32_t reserved_0_3:4; | ||
1761 | uint32_t dlpem:1; | ||
1762 | uint32_t sdem:1; | ||
1763 | uint32_t reserved_6_11:6; | ||
1764 | uint32_t ptlpm:1; | ||
1765 | uint32_t fcpem:1; | ||
1766 | uint32_t ctm:1; | ||
1767 | uint32_t cam:1; | ||
1768 | uint32_t ucm:1; | ||
1769 | uint32_t rom:1; | ||
1770 | uint32_t mtlpm:1; | ||
1771 | uint32_t ecrcem:1; | ||
1772 | uint32_t urem:1; | ||
1773 | uint32_t reserved_21_21:1; | ||
1774 | uint32_t uciem:1; | ||
1775 | uint32_t reserved_23_23:1; | ||
1776 | uint32_t uatombm:1; | ||
1777 | uint32_t reserved_25_31:7; | ||
1778 | #endif | ||
1779 | } s; | ||
1780 | struct cvmx_pciercx_cfg066_cn52xx { | ||
1781 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1782 | uint32_t reserved_21_31:11; | ||
1783 | uint32_t urem:1; | ||
1784 | uint32_t ecrcem:1; | ||
1785 | uint32_t mtlpm:1; | ||
1786 | uint32_t rom:1; | ||
1787 | uint32_t ucm:1; | ||
1788 | uint32_t cam:1; | ||
1789 | uint32_t ctm:1; | ||
1790 | uint32_t fcpem:1; | ||
1791 | uint32_t ptlpm:1; | ||
1792 | uint32_t reserved_6_11:6; | ||
1793 | uint32_t sdem:1; | ||
1794 | uint32_t dlpem:1; | ||
1795 | uint32_t reserved_0_3:4; | ||
1796 | #else | ||
1797 | uint32_t reserved_0_3:4; | ||
1798 | uint32_t dlpem:1; | ||
1799 | uint32_t sdem:1; | ||
1800 | uint32_t reserved_6_11:6; | ||
1801 | uint32_t ptlpm:1; | ||
1802 | uint32_t fcpem:1; | ||
1803 | uint32_t ctm:1; | ||
1804 | uint32_t cam:1; | ||
1805 | uint32_t ucm:1; | ||
1806 | uint32_t rom:1; | ||
1807 | uint32_t mtlpm:1; | ||
1808 | uint32_t ecrcem:1; | ||
1809 | uint32_t urem:1; | ||
1810 | uint32_t reserved_21_31:11; | 862 | uint32_t reserved_21_31:11; |
1811 | #endif | ||
1812 | } cn52xx; | ||
1813 | struct cvmx_pciercx_cfg066_cn52xx cn52xxp1; | ||
1814 | struct cvmx_pciercx_cfg066_cn52xx cn56xx; | ||
1815 | struct cvmx_pciercx_cfg066_cn52xx cn56xxp1; | ||
1816 | struct cvmx_pciercx_cfg066_cn61xx { | ||
1817 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1818 | uint32_t reserved_25_31:7; | ||
1819 | uint32_t uatombm:1; | ||
1820 | uint32_t reserved_21_23:3; | ||
1821 | uint32_t urem:1; | 863 | uint32_t urem:1; |
1822 | uint32_t ecrcem:1; | 864 | uint32_t ecrcem:1; |
1823 | uint32_t mtlpm:1; | 865 | uint32_t mtlpm:1; |
@@ -1831,117 +873,19 @@ union cvmx_pciercx_cfg066 { | |||
1831 | uint32_t sdem:1; | 873 | uint32_t sdem:1; |
1832 | uint32_t dlpem:1; | 874 | uint32_t dlpem:1; |
1833 | uint32_t reserved_0_3:4; | 875 | uint32_t reserved_0_3:4; |
1834 | #else | 876 | } s; |
1835 | uint32_t reserved_0_3:4; | 877 | struct cvmx_pciercx_cfg066_s cn52xx; |
1836 | uint32_t dlpem:1; | 878 | struct cvmx_pciercx_cfg066_s cn52xxp1; |
1837 | uint32_t sdem:1; | 879 | struct cvmx_pciercx_cfg066_s cn56xx; |
1838 | uint32_t reserved_6_11:6; | 880 | struct cvmx_pciercx_cfg066_s cn56xxp1; |
1839 | uint32_t ptlpm:1; | 881 | struct cvmx_pciercx_cfg066_s cn63xx; |
1840 | uint32_t fcpem:1; | 882 | struct cvmx_pciercx_cfg066_s cn63xxp1; |
1841 | uint32_t ctm:1; | ||
1842 | uint32_t cam:1; | ||
1843 | uint32_t ucm:1; | ||
1844 | uint32_t rom:1; | ||
1845 | uint32_t mtlpm:1; | ||
1846 | uint32_t ecrcem:1; | ||
1847 | uint32_t urem:1; | ||
1848 | uint32_t reserved_21_23:3; | ||
1849 | uint32_t uatombm:1; | ||
1850 | uint32_t reserved_25_31:7; | ||
1851 | #endif | ||
1852 | } cn61xx; | ||
1853 | struct cvmx_pciercx_cfg066_cn52xx cn63xx; | ||
1854 | struct cvmx_pciercx_cfg066_cn52xx cn63xxp1; | ||
1855 | struct cvmx_pciercx_cfg066_cn61xx cn66xx; | ||
1856 | struct cvmx_pciercx_cfg066_cn61xx cn68xx; | ||
1857 | struct cvmx_pciercx_cfg066_cn52xx cn68xxp1; | ||
1858 | struct cvmx_pciercx_cfg066_s cnf71xx; | ||
1859 | }; | 883 | }; |
1860 | 884 | ||
1861 | union cvmx_pciercx_cfg067 { | 885 | union cvmx_pciercx_cfg067 { |
1862 | uint32_t u32; | 886 | uint32_t u32; |
1863 | struct cvmx_pciercx_cfg067_s { | 887 | struct cvmx_pciercx_cfg067_s { |
1864 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1865 | uint32_t reserved_25_31:7; | ||
1866 | uint32_t uatombs:1; | ||
1867 | uint32_t reserved_23_23:1; | ||
1868 | uint32_t ucies:1; | ||
1869 | uint32_t reserved_21_21:1; | ||
1870 | uint32_t ures:1; | ||
1871 | uint32_t ecrces:1; | ||
1872 | uint32_t mtlps:1; | ||
1873 | uint32_t ros:1; | ||
1874 | uint32_t ucs:1; | ||
1875 | uint32_t cas:1; | ||
1876 | uint32_t cts:1; | ||
1877 | uint32_t fcpes:1; | ||
1878 | uint32_t ptlps:1; | ||
1879 | uint32_t reserved_6_11:6; | ||
1880 | uint32_t sdes:1; | ||
1881 | uint32_t dlpes:1; | ||
1882 | uint32_t reserved_0_3:4; | ||
1883 | #else | ||
1884 | uint32_t reserved_0_3:4; | ||
1885 | uint32_t dlpes:1; | ||
1886 | uint32_t sdes:1; | ||
1887 | uint32_t reserved_6_11:6; | ||
1888 | uint32_t ptlps:1; | ||
1889 | uint32_t fcpes:1; | ||
1890 | uint32_t cts:1; | ||
1891 | uint32_t cas:1; | ||
1892 | uint32_t ucs:1; | ||
1893 | uint32_t ros:1; | ||
1894 | uint32_t mtlps:1; | ||
1895 | uint32_t ecrces:1; | ||
1896 | uint32_t ures:1; | ||
1897 | uint32_t reserved_21_21:1; | ||
1898 | uint32_t ucies:1; | ||
1899 | uint32_t reserved_23_23:1; | ||
1900 | uint32_t uatombs:1; | ||
1901 | uint32_t reserved_25_31:7; | ||
1902 | #endif | ||
1903 | } s; | ||
1904 | struct cvmx_pciercx_cfg067_cn52xx { | ||
1905 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1906 | uint32_t reserved_21_31:11; | ||
1907 | uint32_t ures:1; | ||
1908 | uint32_t ecrces:1; | ||
1909 | uint32_t mtlps:1; | ||
1910 | uint32_t ros:1; | ||
1911 | uint32_t ucs:1; | ||
1912 | uint32_t cas:1; | ||
1913 | uint32_t cts:1; | ||
1914 | uint32_t fcpes:1; | ||
1915 | uint32_t ptlps:1; | ||
1916 | uint32_t reserved_6_11:6; | ||
1917 | uint32_t sdes:1; | ||
1918 | uint32_t dlpes:1; | ||
1919 | uint32_t reserved_0_3:4; | ||
1920 | #else | ||
1921 | uint32_t reserved_0_3:4; | ||
1922 | uint32_t dlpes:1; | ||
1923 | uint32_t sdes:1; | ||
1924 | uint32_t reserved_6_11:6; | ||
1925 | uint32_t ptlps:1; | ||
1926 | uint32_t fcpes:1; | ||
1927 | uint32_t cts:1; | ||
1928 | uint32_t cas:1; | ||
1929 | uint32_t ucs:1; | ||
1930 | uint32_t ros:1; | ||
1931 | uint32_t mtlps:1; | ||
1932 | uint32_t ecrces:1; | ||
1933 | uint32_t ures:1; | ||
1934 | uint32_t reserved_21_31:11; | 888 | uint32_t reserved_21_31:11; |
1935 | #endif | ||
1936 | } cn52xx; | ||
1937 | struct cvmx_pciercx_cfg067_cn52xx cn52xxp1; | ||
1938 | struct cvmx_pciercx_cfg067_cn52xx cn56xx; | ||
1939 | struct cvmx_pciercx_cfg067_cn52xx cn56xxp1; | ||
1940 | struct cvmx_pciercx_cfg067_cn61xx { | ||
1941 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1942 | uint32_t reserved_25_31:7; | ||
1943 | uint32_t uatombs:1; | ||
1944 | uint32_t reserved_21_23:3; | ||
1945 | uint32_t ures:1; | 889 | uint32_t ures:1; |
1946 | uint32_t ecrces:1; | 890 | uint32_t ecrces:1; |
1947 | uint32_t mtlps:1; | 891 | uint32_t mtlps:1; |
@@ -1955,62 +899,18 @@ union cvmx_pciercx_cfg067 { | |||
1955 | uint32_t sdes:1; | 899 | uint32_t sdes:1; |
1956 | uint32_t dlpes:1; | 900 | uint32_t dlpes:1; |
1957 | uint32_t reserved_0_3:4; | 901 | uint32_t reserved_0_3:4; |
1958 | #else | 902 | } s; |
1959 | uint32_t reserved_0_3:4; | 903 | struct cvmx_pciercx_cfg067_s cn52xx; |
1960 | uint32_t dlpes:1; | 904 | struct cvmx_pciercx_cfg067_s cn52xxp1; |
1961 | uint32_t sdes:1; | 905 | struct cvmx_pciercx_cfg067_s cn56xx; |
1962 | uint32_t reserved_6_11:6; | 906 | struct cvmx_pciercx_cfg067_s cn56xxp1; |
1963 | uint32_t ptlps:1; | 907 | struct cvmx_pciercx_cfg067_s cn63xx; |
1964 | uint32_t fcpes:1; | 908 | struct cvmx_pciercx_cfg067_s cn63xxp1; |
1965 | uint32_t cts:1; | ||
1966 | uint32_t cas:1; | ||
1967 | uint32_t ucs:1; | ||
1968 | uint32_t ros:1; | ||
1969 | uint32_t mtlps:1; | ||
1970 | uint32_t ecrces:1; | ||
1971 | uint32_t ures:1; | ||
1972 | uint32_t reserved_21_23:3; | ||
1973 | uint32_t uatombs:1; | ||
1974 | uint32_t reserved_25_31:7; | ||
1975 | #endif | ||
1976 | } cn61xx; | ||
1977 | struct cvmx_pciercx_cfg067_cn52xx cn63xx; | ||
1978 | struct cvmx_pciercx_cfg067_cn52xx cn63xxp1; | ||
1979 | struct cvmx_pciercx_cfg067_cn61xx cn66xx; | ||
1980 | struct cvmx_pciercx_cfg067_cn61xx cn68xx; | ||
1981 | struct cvmx_pciercx_cfg067_cn52xx cn68xxp1; | ||
1982 | struct cvmx_pciercx_cfg067_s cnf71xx; | ||
1983 | }; | 909 | }; |
1984 | 910 | ||
1985 | union cvmx_pciercx_cfg068 { | 911 | union cvmx_pciercx_cfg068 { |
1986 | uint32_t u32; | 912 | uint32_t u32; |
1987 | struct cvmx_pciercx_cfg068_s { | 913 | struct cvmx_pciercx_cfg068_s { |
1988 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1989 | uint32_t reserved_15_31:17; | ||
1990 | uint32_t cies:1; | ||
1991 | uint32_t anfes:1; | ||
1992 | uint32_t rtts:1; | ||
1993 | uint32_t reserved_9_11:3; | ||
1994 | uint32_t rnrs:1; | ||
1995 | uint32_t bdllps:1; | ||
1996 | uint32_t btlps:1; | ||
1997 | uint32_t reserved_1_5:5; | ||
1998 | uint32_t res:1; | ||
1999 | #else | ||
2000 | uint32_t res:1; | ||
2001 | uint32_t reserved_1_5:5; | ||
2002 | uint32_t btlps:1; | ||
2003 | uint32_t bdllps:1; | ||
2004 | uint32_t rnrs:1; | ||
2005 | uint32_t reserved_9_11:3; | ||
2006 | uint32_t rtts:1; | ||
2007 | uint32_t anfes:1; | ||
2008 | uint32_t cies:1; | ||
2009 | uint32_t reserved_15_31:17; | ||
2010 | #endif | ||
2011 | } s; | ||
2012 | struct cvmx_pciercx_cfg068_cn52xx { | ||
2013 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2014 | uint32_t reserved_14_31:18; | 914 | uint32_t reserved_14_31:18; |
2015 | uint32_t anfes:1; | 915 | uint32_t anfes:1; |
2016 | uint32_t rtts:1; | 916 | uint32_t rtts:1; |
@@ -2020,59 +920,18 @@ union cvmx_pciercx_cfg068 { | |||
2020 | uint32_t btlps:1; | 920 | uint32_t btlps:1; |
2021 | uint32_t reserved_1_5:5; | 921 | uint32_t reserved_1_5:5; |
2022 | uint32_t res:1; | 922 | uint32_t res:1; |
2023 | #else | 923 | } s; |
2024 | uint32_t res:1; | 924 | struct cvmx_pciercx_cfg068_s cn52xx; |
2025 | uint32_t reserved_1_5:5; | 925 | struct cvmx_pciercx_cfg068_s cn52xxp1; |
2026 | uint32_t btlps:1; | 926 | struct cvmx_pciercx_cfg068_s cn56xx; |
2027 | uint32_t bdllps:1; | 927 | struct cvmx_pciercx_cfg068_s cn56xxp1; |
2028 | uint32_t rnrs:1; | 928 | struct cvmx_pciercx_cfg068_s cn63xx; |
2029 | uint32_t reserved_9_11:3; | 929 | struct cvmx_pciercx_cfg068_s cn63xxp1; |
2030 | uint32_t rtts:1; | ||
2031 | uint32_t anfes:1; | ||
2032 | uint32_t reserved_14_31:18; | ||
2033 | #endif | ||
2034 | } cn52xx; | ||
2035 | struct cvmx_pciercx_cfg068_cn52xx cn52xxp1; | ||
2036 | struct cvmx_pciercx_cfg068_cn52xx cn56xx; | ||
2037 | struct cvmx_pciercx_cfg068_cn52xx cn56xxp1; | ||
2038 | struct cvmx_pciercx_cfg068_cn52xx cn61xx; | ||
2039 | struct cvmx_pciercx_cfg068_cn52xx cn63xx; | ||
2040 | struct cvmx_pciercx_cfg068_cn52xx cn63xxp1; | ||
2041 | struct cvmx_pciercx_cfg068_cn52xx cn66xx; | ||
2042 | struct cvmx_pciercx_cfg068_cn52xx cn68xx; | ||
2043 | struct cvmx_pciercx_cfg068_cn52xx cn68xxp1; | ||
2044 | struct cvmx_pciercx_cfg068_s cnf71xx; | ||
2045 | }; | 930 | }; |
2046 | 931 | ||
2047 | union cvmx_pciercx_cfg069 { | 932 | union cvmx_pciercx_cfg069 { |
2048 | uint32_t u32; | 933 | uint32_t u32; |
2049 | struct cvmx_pciercx_cfg069_s { | 934 | struct cvmx_pciercx_cfg069_s { |
2050 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2051 | uint32_t reserved_15_31:17; | ||
2052 | uint32_t ciem:1; | ||
2053 | uint32_t anfem:1; | ||
2054 | uint32_t rttm:1; | ||
2055 | uint32_t reserved_9_11:3; | ||
2056 | uint32_t rnrm:1; | ||
2057 | uint32_t bdllpm:1; | ||
2058 | uint32_t btlpm:1; | ||
2059 | uint32_t reserved_1_5:5; | ||
2060 | uint32_t rem:1; | ||
2061 | #else | ||
2062 | uint32_t rem:1; | ||
2063 | uint32_t reserved_1_5:5; | ||
2064 | uint32_t btlpm:1; | ||
2065 | uint32_t bdllpm:1; | ||
2066 | uint32_t rnrm:1; | ||
2067 | uint32_t reserved_9_11:3; | ||
2068 | uint32_t rttm:1; | ||
2069 | uint32_t anfem:1; | ||
2070 | uint32_t ciem:1; | ||
2071 | uint32_t reserved_15_31:17; | ||
2072 | #endif | ||
2073 | } s; | ||
2074 | struct cvmx_pciercx_cfg069_cn52xx { | ||
2075 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2076 | uint32_t reserved_14_31:18; | 935 | uint32_t reserved_14_31:18; |
2077 | uint32_t anfem:1; | 936 | uint32_t anfem:1; |
2078 | uint32_t rttm:1; | 937 | uint32_t rttm:1; |
@@ -2082,182 +941,104 @@ union cvmx_pciercx_cfg069 { | |||
2082 | uint32_t btlpm:1; | 941 | uint32_t btlpm:1; |
2083 | uint32_t reserved_1_5:5; | 942 | uint32_t reserved_1_5:5; |
2084 | uint32_t rem:1; | 943 | uint32_t rem:1; |
2085 | #else | 944 | } s; |
2086 | uint32_t rem:1; | 945 | struct cvmx_pciercx_cfg069_s cn52xx; |
2087 | uint32_t reserved_1_5:5; | 946 | struct cvmx_pciercx_cfg069_s cn52xxp1; |
2088 | uint32_t btlpm:1; | 947 | struct cvmx_pciercx_cfg069_s cn56xx; |
2089 | uint32_t bdllpm:1; | 948 | struct cvmx_pciercx_cfg069_s cn56xxp1; |
2090 | uint32_t rnrm:1; | 949 | struct cvmx_pciercx_cfg069_s cn63xx; |
2091 | uint32_t reserved_9_11:3; | 950 | struct cvmx_pciercx_cfg069_s cn63xxp1; |
2092 | uint32_t rttm:1; | ||
2093 | uint32_t anfem:1; | ||
2094 | uint32_t reserved_14_31:18; | ||
2095 | #endif | ||
2096 | } cn52xx; | ||
2097 | struct cvmx_pciercx_cfg069_cn52xx cn52xxp1; | ||
2098 | struct cvmx_pciercx_cfg069_cn52xx cn56xx; | ||
2099 | struct cvmx_pciercx_cfg069_cn52xx cn56xxp1; | ||
2100 | struct cvmx_pciercx_cfg069_cn52xx cn61xx; | ||
2101 | struct cvmx_pciercx_cfg069_cn52xx cn63xx; | ||
2102 | struct cvmx_pciercx_cfg069_cn52xx cn63xxp1; | ||
2103 | struct cvmx_pciercx_cfg069_cn52xx cn66xx; | ||
2104 | struct cvmx_pciercx_cfg069_cn52xx cn68xx; | ||
2105 | struct cvmx_pciercx_cfg069_cn52xx cn68xxp1; | ||
2106 | struct cvmx_pciercx_cfg069_s cnf71xx; | ||
2107 | }; | 951 | }; |
2108 | 952 | ||
2109 | union cvmx_pciercx_cfg070 { | 953 | union cvmx_pciercx_cfg070 { |
2110 | uint32_t u32; | 954 | uint32_t u32; |
2111 | struct cvmx_pciercx_cfg070_s { | 955 | struct cvmx_pciercx_cfg070_s { |
2112 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2113 | uint32_t reserved_9_31:23; | 956 | uint32_t reserved_9_31:23; |
2114 | uint32_t ce:1; | 957 | uint32_t ce:1; |
2115 | uint32_t cc:1; | 958 | uint32_t cc:1; |
2116 | uint32_t ge:1; | 959 | uint32_t ge:1; |
2117 | uint32_t gc:1; | 960 | uint32_t gc:1; |
2118 | uint32_t fep:5; | 961 | uint32_t fep:5; |
2119 | #else | ||
2120 | uint32_t fep:5; | ||
2121 | uint32_t gc:1; | ||
2122 | uint32_t ge:1; | ||
2123 | uint32_t cc:1; | ||
2124 | uint32_t ce:1; | ||
2125 | uint32_t reserved_9_31:23; | ||
2126 | #endif | ||
2127 | } s; | 962 | } s; |
2128 | struct cvmx_pciercx_cfg070_s cn52xx; | 963 | struct cvmx_pciercx_cfg070_s cn52xx; |
2129 | struct cvmx_pciercx_cfg070_s cn52xxp1; | 964 | struct cvmx_pciercx_cfg070_s cn52xxp1; |
2130 | struct cvmx_pciercx_cfg070_s cn56xx; | 965 | struct cvmx_pciercx_cfg070_s cn56xx; |
2131 | struct cvmx_pciercx_cfg070_s cn56xxp1; | 966 | struct cvmx_pciercx_cfg070_s cn56xxp1; |
2132 | struct cvmx_pciercx_cfg070_s cn61xx; | ||
2133 | struct cvmx_pciercx_cfg070_s cn63xx; | 967 | struct cvmx_pciercx_cfg070_s cn63xx; |
2134 | struct cvmx_pciercx_cfg070_s cn63xxp1; | 968 | struct cvmx_pciercx_cfg070_s cn63xxp1; |
2135 | struct cvmx_pciercx_cfg070_s cn66xx; | ||
2136 | struct cvmx_pciercx_cfg070_s cn68xx; | ||
2137 | struct cvmx_pciercx_cfg070_s cn68xxp1; | ||
2138 | struct cvmx_pciercx_cfg070_s cnf71xx; | ||
2139 | }; | 969 | }; |
2140 | 970 | ||
2141 | union cvmx_pciercx_cfg071 { | 971 | union cvmx_pciercx_cfg071 { |
2142 | uint32_t u32; | 972 | uint32_t u32; |
2143 | struct cvmx_pciercx_cfg071_s { | 973 | struct cvmx_pciercx_cfg071_s { |
2144 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2145 | uint32_t dword1:32; | 974 | uint32_t dword1:32; |
2146 | #else | ||
2147 | uint32_t dword1:32; | ||
2148 | #endif | ||
2149 | } s; | 975 | } s; |
2150 | struct cvmx_pciercx_cfg071_s cn52xx; | 976 | struct cvmx_pciercx_cfg071_s cn52xx; |
2151 | struct cvmx_pciercx_cfg071_s cn52xxp1; | 977 | struct cvmx_pciercx_cfg071_s cn52xxp1; |
2152 | struct cvmx_pciercx_cfg071_s cn56xx; | 978 | struct cvmx_pciercx_cfg071_s cn56xx; |
2153 | struct cvmx_pciercx_cfg071_s cn56xxp1; | 979 | struct cvmx_pciercx_cfg071_s cn56xxp1; |
2154 | struct cvmx_pciercx_cfg071_s cn61xx; | ||
2155 | struct cvmx_pciercx_cfg071_s cn63xx; | 980 | struct cvmx_pciercx_cfg071_s cn63xx; |
2156 | struct cvmx_pciercx_cfg071_s cn63xxp1; | 981 | struct cvmx_pciercx_cfg071_s cn63xxp1; |
2157 | struct cvmx_pciercx_cfg071_s cn66xx; | ||
2158 | struct cvmx_pciercx_cfg071_s cn68xx; | ||
2159 | struct cvmx_pciercx_cfg071_s cn68xxp1; | ||
2160 | struct cvmx_pciercx_cfg071_s cnf71xx; | ||
2161 | }; | 982 | }; |
2162 | 983 | ||
2163 | union cvmx_pciercx_cfg072 { | 984 | union cvmx_pciercx_cfg072 { |
2164 | uint32_t u32; | 985 | uint32_t u32; |
2165 | struct cvmx_pciercx_cfg072_s { | 986 | struct cvmx_pciercx_cfg072_s { |
2166 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2167 | uint32_t dword2:32; | ||
2168 | #else | ||
2169 | uint32_t dword2:32; | 987 | uint32_t dword2:32; |
2170 | #endif | ||
2171 | } s; | 988 | } s; |
2172 | struct cvmx_pciercx_cfg072_s cn52xx; | 989 | struct cvmx_pciercx_cfg072_s cn52xx; |
2173 | struct cvmx_pciercx_cfg072_s cn52xxp1; | 990 | struct cvmx_pciercx_cfg072_s cn52xxp1; |
2174 | struct cvmx_pciercx_cfg072_s cn56xx; | 991 | struct cvmx_pciercx_cfg072_s cn56xx; |
2175 | struct cvmx_pciercx_cfg072_s cn56xxp1; | 992 | struct cvmx_pciercx_cfg072_s cn56xxp1; |
2176 | struct cvmx_pciercx_cfg072_s cn61xx; | ||
2177 | struct cvmx_pciercx_cfg072_s cn63xx; | 993 | struct cvmx_pciercx_cfg072_s cn63xx; |
2178 | struct cvmx_pciercx_cfg072_s cn63xxp1; | 994 | struct cvmx_pciercx_cfg072_s cn63xxp1; |
2179 | struct cvmx_pciercx_cfg072_s cn66xx; | ||
2180 | struct cvmx_pciercx_cfg072_s cn68xx; | ||
2181 | struct cvmx_pciercx_cfg072_s cn68xxp1; | ||
2182 | struct cvmx_pciercx_cfg072_s cnf71xx; | ||
2183 | }; | 995 | }; |
2184 | 996 | ||
2185 | union cvmx_pciercx_cfg073 { | 997 | union cvmx_pciercx_cfg073 { |
2186 | uint32_t u32; | 998 | uint32_t u32; |
2187 | struct cvmx_pciercx_cfg073_s { | 999 | struct cvmx_pciercx_cfg073_s { |
2188 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2189 | uint32_t dword3:32; | ||
2190 | #else | ||
2191 | uint32_t dword3:32; | 1000 | uint32_t dword3:32; |
2192 | #endif | ||
2193 | } s; | 1001 | } s; |
2194 | struct cvmx_pciercx_cfg073_s cn52xx; | 1002 | struct cvmx_pciercx_cfg073_s cn52xx; |
2195 | struct cvmx_pciercx_cfg073_s cn52xxp1; | 1003 | struct cvmx_pciercx_cfg073_s cn52xxp1; |
2196 | struct cvmx_pciercx_cfg073_s cn56xx; | 1004 | struct cvmx_pciercx_cfg073_s cn56xx; |
2197 | struct cvmx_pciercx_cfg073_s cn56xxp1; | 1005 | struct cvmx_pciercx_cfg073_s cn56xxp1; |
2198 | struct cvmx_pciercx_cfg073_s cn61xx; | ||
2199 | struct cvmx_pciercx_cfg073_s cn63xx; | 1006 | struct cvmx_pciercx_cfg073_s cn63xx; |
2200 | struct cvmx_pciercx_cfg073_s cn63xxp1; | 1007 | struct cvmx_pciercx_cfg073_s cn63xxp1; |
2201 | struct cvmx_pciercx_cfg073_s cn66xx; | ||
2202 | struct cvmx_pciercx_cfg073_s cn68xx; | ||
2203 | struct cvmx_pciercx_cfg073_s cn68xxp1; | ||
2204 | struct cvmx_pciercx_cfg073_s cnf71xx; | ||
2205 | }; | 1008 | }; |
2206 | 1009 | ||
2207 | union cvmx_pciercx_cfg074 { | 1010 | union cvmx_pciercx_cfg074 { |
2208 | uint32_t u32; | 1011 | uint32_t u32; |
2209 | struct cvmx_pciercx_cfg074_s { | 1012 | struct cvmx_pciercx_cfg074_s { |
2210 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2211 | uint32_t dword4:32; | ||
2212 | #else | ||
2213 | uint32_t dword4:32; | 1013 | uint32_t dword4:32; |
2214 | #endif | ||
2215 | } s; | 1014 | } s; |
2216 | struct cvmx_pciercx_cfg074_s cn52xx; | 1015 | struct cvmx_pciercx_cfg074_s cn52xx; |
2217 | struct cvmx_pciercx_cfg074_s cn52xxp1; | 1016 | struct cvmx_pciercx_cfg074_s cn52xxp1; |
2218 | struct cvmx_pciercx_cfg074_s cn56xx; | 1017 | struct cvmx_pciercx_cfg074_s cn56xx; |
2219 | struct cvmx_pciercx_cfg074_s cn56xxp1; | 1018 | struct cvmx_pciercx_cfg074_s cn56xxp1; |
2220 | struct cvmx_pciercx_cfg074_s cn61xx; | ||
2221 | struct cvmx_pciercx_cfg074_s cn63xx; | 1019 | struct cvmx_pciercx_cfg074_s cn63xx; |
2222 | struct cvmx_pciercx_cfg074_s cn63xxp1; | 1020 | struct cvmx_pciercx_cfg074_s cn63xxp1; |
2223 | struct cvmx_pciercx_cfg074_s cn66xx; | ||
2224 | struct cvmx_pciercx_cfg074_s cn68xx; | ||
2225 | struct cvmx_pciercx_cfg074_s cn68xxp1; | ||
2226 | struct cvmx_pciercx_cfg074_s cnf71xx; | ||
2227 | }; | 1021 | }; |
2228 | 1022 | ||
2229 | union cvmx_pciercx_cfg075 { | 1023 | union cvmx_pciercx_cfg075 { |
2230 | uint32_t u32; | 1024 | uint32_t u32; |
2231 | struct cvmx_pciercx_cfg075_s { | 1025 | struct cvmx_pciercx_cfg075_s { |
2232 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2233 | uint32_t reserved_3_31:29; | 1026 | uint32_t reserved_3_31:29; |
2234 | uint32_t fere:1; | 1027 | uint32_t fere:1; |
2235 | uint32_t nfere:1; | 1028 | uint32_t nfere:1; |
2236 | uint32_t cere:1; | 1029 | uint32_t cere:1; |
2237 | #else | ||
2238 | uint32_t cere:1; | ||
2239 | uint32_t nfere:1; | ||
2240 | uint32_t fere:1; | ||
2241 | uint32_t reserved_3_31:29; | ||
2242 | #endif | ||
2243 | } s; | 1030 | } s; |
2244 | struct cvmx_pciercx_cfg075_s cn52xx; | 1031 | struct cvmx_pciercx_cfg075_s cn52xx; |
2245 | struct cvmx_pciercx_cfg075_s cn52xxp1; | 1032 | struct cvmx_pciercx_cfg075_s cn52xxp1; |
2246 | struct cvmx_pciercx_cfg075_s cn56xx; | 1033 | struct cvmx_pciercx_cfg075_s cn56xx; |
2247 | struct cvmx_pciercx_cfg075_s cn56xxp1; | 1034 | struct cvmx_pciercx_cfg075_s cn56xxp1; |
2248 | struct cvmx_pciercx_cfg075_s cn61xx; | ||
2249 | struct cvmx_pciercx_cfg075_s cn63xx; | 1035 | struct cvmx_pciercx_cfg075_s cn63xx; |
2250 | struct cvmx_pciercx_cfg075_s cn63xxp1; | 1036 | struct cvmx_pciercx_cfg075_s cn63xxp1; |
2251 | struct cvmx_pciercx_cfg075_s cn66xx; | ||
2252 | struct cvmx_pciercx_cfg075_s cn68xx; | ||
2253 | struct cvmx_pciercx_cfg075_s cn68xxp1; | ||
2254 | struct cvmx_pciercx_cfg075_s cnf71xx; | ||
2255 | }; | 1037 | }; |
2256 | 1038 | ||
2257 | union cvmx_pciercx_cfg076 { | 1039 | union cvmx_pciercx_cfg076 { |
2258 | uint32_t u32; | 1040 | uint32_t u32; |
2259 | struct cvmx_pciercx_cfg076_s { | 1041 | struct cvmx_pciercx_cfg076_s { |
2260 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2261 | uint32_t aeimn:5; | 1042 | uint32_t aeimn:5; |
2262 | uint32_t reserved_7_26:20; | 1043 | uint32_t reserved_7_26:20; |
2263 | uint32_t femr:1; | 1044 | uint32_t femr:1; |
@@ -2267,187 +1048,95 @@ union cvmx_pciercx_cfg076 { | |||
2267 | uint32_t efnfr:1; | 1048 | uint32_t efnfr:1; |
2268 | uint32_t multi_ecr:1; | 1049 | uint32_t multi_ecr:1; |
2269 | uint32_t ecr:1; | 1050 | uint32_t ecr:1; |
2270 | #else | ||
2271 | uint32_t ecr:1; | ||
2272 | uint32_t multi_ecr:1; | ||
2273 | uint32_t efnfr:1; | ||
2274 | uint32_t multi_efnfr:1; | ||
2275 | uint32_t fuf:1; | ||
2276 | uint32_t nfemr:1; | ||
2277 | uint32_t femr:1; | ||
2278 | uint32_t reserved_7_26:20; | ||
2279 | uint32_t aeimn:5; | ||
2280 | #endif | ||
2281 | } s; | 1051 | } s; |
2282 | struct cvmx_pciercx_cfg076_s cn52xx; | 1052 | struct cvmx_pciercx_cfg076_s cn52xx; |
2283 | struct cvmx_pciercx_cfg076_s cn52xxp1; | 1053 | struct cvmx_pciercx_cfg076_s cn52xxp1; |
2284 | struct cvmx_pciercx_cfg076_s cn56xx; | 1054 | struct cvmx_pciercx_cfg076_s cn56xx; |
2285 | struct cvmx_pciercx_cfg076_s cn56xxp1; | 1055 | struct cvmx_pciercx_cfg076_s cn56xxp1; |
2286 | struct cvmx_pciercx_cfg076_s cn61xx; | ||
2287 | struct cvmx_pciercx_cfg076_s cn63xx; | 1056 | struct cvmx_pciercx_cfg076_s cn63xx; |
2288 | struct cvmx_pciercx_cfg076_s cn63xxp1; | 1057 | struct cvmx_pciercx_cfg076_s cn63xxp1; |
2289 | struct cvmx_pciercx_cfg076_s cn66xx; | ||
2290 | struct cvmx_pciercx_cfg076_s cn68xx; | ||
2291 | struct cvmx_pciercx_cfg076_s cn68xxp1; | ||
2292 | struct cvmx_pciercx_cfg076_s cnf71xx; | ||
2293 | }; | 1058 | }; |
2294 | 1059 | ||
2295 | union cvmx_pciercx_cfg077 { | 1060 | union cvmx_pciercx_cfg077 { |
2296 | uint32_t u32; | 1061 | uint32_t u32; |
2297 | struct cvmx_pciercx_cfg077_s { | 1062 | struct cvmx_pciercx_cfg077_s { |
2298 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2299 | uint32_t efnfsi:16; | 1063 | uint32_t efnfsi:16; |
2300 | uint32_t ecsi:16; | 1064 | uint32_t ecsi:16; |
2301 | #else | ||
2302 | uint32_t ecsi:16; | ||
2303 | uint32_t efnfsi:16; | ||
2304 | #endif | ||
2305 | } s; | 1065 | } s; |
2306 | struct cvmx_pciercx_cfg077_s cn52xx; | 1066 | struct cvmx_pciercx_cfg077_s cn52xx; |
2307 | struct cvmx_pciercx_cfg077_s cn52xxp1; | 1067 | struct cvmx_pciercx_cfg077_s cn52xxp1; |
2308 | struct cvmx_pciercx_cfg077_s cn56xx; | 1068 | struct cvmx_pciercx_cfg077_s cn56xx; |
2309 | struct cvmx_pciercx_cfg077_s cn56xxp1; | 1069 | struct cvmx_pciercx_cfg077_s cn56xxp1; |
2310 | struct cvmx_pciercx_cfg077_s cn61xx; | ||
2311 | struct cvmx_pciercx_cfg077_s cn63xx; | 1070 | struct cvmx_pciercx_cfg077_s cn63xx; |
2312 | struct cvmx_pciercx_cfg077_s cn63xxp1; | 1071 | struct cvmx_pciercx_cfg077_s cn63xxp1; |
2313 | struct cvmx_pciercx_cfg077_s cn66xx; | ||
2314 | struct cvmx_pciercx_cfg077_s cn68xx; | ||
2315 | struct cvmx_pciercx_cfg077_s cn68xxp1; | ||
2316 | struct cvmx_pciercx_cfg077_s cnf71xx; | ||
2317 | }; | 1072 | }; |
2318 | 1073 | ||
2319 | union cvmx_pciercx_cfg448 { | 1074 | union cvmx_pciercx_cfg448 { |
2320 | uint32_t u32; | 1075 | uint32_t u32; |
2321 | struct cvmx_pciercx_cfg448_s { | 1076 | struct cvmx_pciercx_cfg448_s { |
2322 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2323 | uint32_t rtl:16; | 1077 | uint32_t rtl:16; |
2324 | uint32_t rtltl:16; | 1078 | uint32_t rtltl:16; |
2325 | #else | ||
2326 | uint32_t rtltl:16; | ||
2327 | uint32_t rtl:16; | ||
2328 | #endif | ||
2329 | } s; | 1079 | } s; |
2330 | struct cvmx_pciercx_cfg448_s cn52xx; | 1080 | struct cvmx_pciercx_cfg448_s cn52xx; |
2331 | struct cvmx_pciercx_cfg448_s cn52xxp1; | 1081 | struct cvmx_pciercx_cfg448_s cn52xxp1; |
2332 | struct cvmx_pciercx_cfg448_s cn56xx; | 1082 | struct cvmx_pciercx_cfg448_s cn56xx; |
2333 | struct cvmx_pciercx_cfg448_s cn56xxp1; | 1083 | struct cvmx_pciercx_cfg448_s cn56xxp1; |
2334 | struct cvmx_pciercx_cfg448_s cn61xx; | ||
2335 | struct cvmx_pciercx_cfg448_s cn63xx; | 1084 | struct cvmx_pciercx_cfg448_s cn63xx; |
2336 | struct cvmx_pciercx_cfg448_s cn63xxp1; | 1085 | struct cvmx_pciercx_cfg448_s cn63xxp1; |
2337 | struct cvmx_pciercx_cfg448_s cn66xx; | ||
2338 | struct cvmx_pciercx_cfg448_s cn68xx; | ||
2339 | struct cvmx_pciercx_cfg448_s cn68xxp1; | ||
2340 | struct cvmx_pciercx_cfg448_s cnf71xx; | ||
2341 | }; | 1086 | }; |
2342 | 1087 | ||
2343 | union cvmx_pciercx_cfg449 { | 1088 | union cvmx_pciercx_cfg449 { |
2344 | uint32_t u32; | 1089 | uint32_t u32; |
2345 | struct cvmx_pciercx_cfg449_s { | 1090 | struct cvmx_pciercx_cfg449_s { |
2346 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2347 | uint32_t omr:32; | 1091 | uint32_t omr:32; |
2348 | #else | ||
2349 | uint32_t omr:32; | ||
2350 | #endif | ||
2351 | } s; | 1092 | } s; |
2352 | struct cvmx_pciercx_cfg449_s cn52xx; | 1093 | struct cvmx_pciercx_cfg449_s cn52xx; |
2353 | struct cvmx_pciercx_cfg449_s cn52xxp1; | 1094 | struct cvmx_pciercx_cfg449_s cn52xxp1; |
2354 | struct cvmx_pciercx_cfg449_s cn56xx; | 1095 | struct cvmx_pciercx_cfg449_s cn56xx; |
2355 | struct cvmx_pciercx_cfg449_s cn56xxp1; | 1096 | struct cvmx_pciercx_cfg449_s cn56xxp1; |
2356 | struct cvmx_pciercx_cfg449_s cn61xx; | ||
2357 | struct cvmx_pciercx_cfg449_s cn63xx; | 1097 | struct cvmx_pciercx_cfg449_s cn63xx; |
2358 | struct cvmx_pciercx_cfg449_s cn63xxp1; | 1098 | struct cvmx_pciercx_cfg449_s cn63xxp1; |
2359 | struct cvmx_pciercx_cfg449_s cn66xx; | ||
2360 | struct cvmx_pciercx_cfg449_s cn68xx; | ||
2361 | struct cvmx_pciercx_cfg449_s cn68xxp1; | ||
2362 | struct cvmx_pciercx_cfg449_s cnf71xx; | ||
2363 | }; | 1099 | }; |
2364 | 1100 | ||
2365 | union cvmx_pciercx_cfg450 { | 1101 | union cvmx_pciercx_cfg450 { |
2366 | uint32_t u32; | 1102 | uint32_t u32; |
2367 | struct cvmx_pciercx_cfg450_s { | 1103 | struct cvmx_pciercx_cfg450_s { |
2368 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2369 | uint32_t lpec:8; | 1104 | uint32_t lpec:8; |
2370 | uint32_t reserved_22_23:2; | 1105 | uint32_t reserved_22_23:2; |
2371 | uint32_t link_state:6; | 1106 | uint32_t link_state:6; |
2372 | uint32_t force_link:1; | 1107 | uint32_t force_link:1; |
2373 | uint32_t reserved_8_14:7; | 1108 | uint32_t reserved_8_14:7; |
2374 | uint32_t link_num:8; | 1109 | uint32_t link_num:8; |
2375 | #else | ||
2376 | uint32_t link_num:8; | ||
2377 | uint32_t reserved_8_14:7; | ||
2378 | uint32_t force_link:1; | ||
2379 | uint32_t link_state:6; | ||
2380 | uint32_t reserved_22_23:2; | ||
2381 | uint32_t lpec:8; | ||
2382 | #endif | ||
2383 | } s; | 1110 | } s; |
2384 | struct cvmx_pciercx_cfg450_s cn52xx; | 1111 | struct cvmx_pciercx_cfg450_s cn52xx; |
2385 | struct cvmx_pciercx_cfg450_s cn52xxp1; | 1112 | struct cvmx_pciercx_cfg450_s cn52xxp1; |
2386 | struct cvmx_pciercx_cfg450_s cn56xx; | 1113 | struct cvmx_pciercx_cfg450_s cn56xx; |
2387 | struct cvmx_pciercx_cfg450_s cn56xxp1; | 1114 | struct cvmx_pciercx_cfg450_s cn56xxp1; |
2388 | struct cvmx_pciercx_cfg450_s cn61xx; | ||
2389 | struct cvmx_pciercx_cfg450_s cn63xx; | 1115 | struct cvmx_pciercx_cfg450_s cn63xx; |
2390 | struct cvmx_pciercx_cfg450_s cn63xxp1; | 1116 | struct cvmx_pciercx_cfg450_s cn63xxp1; |
2391 | struct cvmx_pciercx_cfg450_s cn66xx; | ||
2392 | struct cvmx_pciercx_cfg450_s cn68xx; | ||
2393 | struct cvmx_pciercx_cfg450_s cn68xxp1; | ||
2394 | struct cvmx_pciercx_cfg450_s cnf71xx; | ||
2395 | }; | 1117 | }; |
2396 | 1118 | ||
2397 | union cvmx_pciercx_cfg451 { | 1119 | union cvmx_pciercx_cfg451 { |
2398 | uint32_t u32; | 1120 | uint32_t u32; |
2399 | struct cvmx_pciercx_cfg451_s { | 1121 | struct cvmx_pciercx_cfg451_s { |
2400 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2401 | uint32_t reserved_31_31:1; | ||
2402 | uint32_t easpml1:1; | ||
2403 | uint32_t l1el:3; | ||
2404 | uint32_t l0el:3; | ||
2405 | uint32_t n_fts_cc:8; | ||
2406 | uint32_t n_fts:8; | ||
2407 | uint32_t ack_freq:8; | ||
2408 | #else | ||
2409 | uint32_t ack_freq:8; | ||
2410 | uint32_t n_fts:8; | ||
2411 | uint32_t n_fts_cc:8; | ||
2412 | uint32_t l0el:3; | ||
2413 | uint32_t l1el:3; | ||
2414 | uint32_t easpml1:1; | ||
2415 | uint32_t reserved_31_31:1; | ||
2416 | #endif | ||
2417 | } s; | ||
2418 | struct cvmx_pciercx_cfg451_cn52xx { | ||
2419 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2420 | uint32_t reserved_30_31:2; | 1122 | uint32_t reserved_30_31:2; |
2421 | uint32_t l1el:3; | 1123 | uint32_t l1el:3; |
2422 | uint32_t l0el:3; | 1124 | uint32_t l0el:3; |
2423 | uint32_t n_fts_cc:8; | 1125 | uint32_t n_fts_cc:8; |
2424 | uint32_t n_fts:8; | 1126 | uint32_t n_fts:8; |
2425 | uint32_t ack_freq:8; | 1127 | uint32_t ack_freq:8; |
2426 | #else | 1128 | } s; |
2427 | uint32_t ack_freq:8; | 1129 | struct cvmx_pciercx_cfg451_s cn52xx; |
2428 | uint32_t n_fts:8; | 1130 | struct cvmx_pciercx_cfg451_s cn52xxp1; |
2429 | uint32_t n_fts_cc:8; | 1131 | struct cvmx_pciercx_cfg451_s cn56xx; |
2430 | uint32_t l0el:3; | 1132 | struct cvmx_pciercx_cfg451_s cn56xxp1; |
2431 | uint32_t l1el:3; | 1133 | struct cvmx_pciercx_cfg451_s cn63xx; |
2432 | uint32_t reserved_30_31:2; | 1134 | struct cvmx_pciercx_cfg451_s cn63xxp1; |
2433 | #endif | ||
2434 | } cn52xx; | ||
2435 | struct cvmx_pciercx_cfg451_cn52xx cn52xxp1; | ||
2436 | struct cvmx_pciercx_cfg451_cn52xx cn56xx; | ||
2437 | struct cvmx_pciercx_cfg451_cn52xx cn56xxp1; | ||
2438 | struct cvmx_pciercx_cfg451_s cn61xx; | ||
2439 | struct cvmx_pciercx_cfg451_cn52xx cn63xx; | ||
2440 | struct cvmx_pciercx_cfg451_cn52xx cn63xxp1; | ||
2441 | struct cvmx_pciercx_cfg451_s cn66xx; | ||
2442 | struct cvmx_pciercx_cfg451_s cn68xx; | ||
2443 | struct cvmx_pciercx_cfg451_s cn68xxp1; | ||
2444 | struct cvmx_pciercx_cfg451_s cnf71xx; | ||
2445 | }; | 1135 | }; |
2446 | 1136 | ||
2447 | union cvmx_pciercx_cfg452 { | 1137 | union cvmx_pciercx_cfg452 { |
2448 | uint32_t u32; | 1138 | uint32_t u32; |
2449 | struct cvmx_pciercx_cfg452_s { | 1139 | struct cvmx_pciercx_cfg452_s { |
2450 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2451 | uint32_t reserved_26_31:6; | 1140 | uint32_t reserved_26_31:6; |
2452 | uint32_t eccrc:1; | 1141 | uint32_t eccrc:1; |
2453 | uint32_t reserved_22_24:3; | 1142 | uint32_t reserved_22_24:3; |
@@ -2461,114 +1150,35 @@ union cvmx_pciercx_cfg452 { | |||
2461 | uint32_t le:1; | 1150 | uint32_t le:1; |
2462 | uint32_t sd:1; | 1151 | uint32_t sd:1; |
2463 | uint32_t omr:1; | 1152 | uint32_t omr:1; |
2464 | #else | ||
2465 | uint32_t omr:1; | ||
2466 | uint32_t sd:1; | ||
2467 | uint32_t le:1; | ||
2468 | uint32_t ra:1; | ||
2469 | uint32_t reserved_4_4:1; | ||
2470 | uint32_t dllle:1; | ||
2471 | uint32_t reserved_6_6:1; | ||
2472 | uint32_t flm:1; | ||
2473 | uint32_t reserved_8_15:8; | ||
2474 | uint32_t lme:6; | ||
2475 | uint32_t reserved_22_24:3; | ||
2476 | uint32_t eccrc:1; | ||
2477 | uint32_t reserved_26_31:6; | ||
2478 | #endif | ||
2479 | } s; | 1153 | } s; |
2480 | struct cvmx_pciercx_cfg452_s cn52xx; | 1154 | struct cvmx_pciercx_cfg452_s cn52xx; |
2481 | struct cvmx_pciercx_cfg452_s cn52xxp1; | 1155 | struct cvmx_pciercx_cfg452_s cn52xxp1; |
2482 | struct cvmx_pciercx_cfg452_s cn56xx; | 1156 | struct cvmx_pciercx_cfg452_s cn56xx; |
2483 | struct cvmx_pciercx_cfg452_s cn56xxp1; | 1157 | struct cvmx_pciercx_cfg452_s cn56xxp1; |
2484 | struct cvmx_pciercx_cfg452_cn61xx { | ||
2485 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2486 | uint32_t reserved_22_31:10; | ||
2487 | uint32_t lme:6; | ||
2488 | uint32_t reserved_8_15:8; | ||
2489 | uint32_t flm:1; | ||
2490 | uint32_t reserved_6_6:1; | ||
2491 | uint32_t dllle:1; | ||
2492 | uint32_t reserved_4_4:1; | ||
2493 | uint32_t ra:1; | ||
2494 | uint32_t le:1; | ||
2495 | uint32_t sd:1; | ||
2496 | uint32_t omr:1; | ||
2497 | #else | ||
2498 | uint32_t omr:1; | ||
2499 | uint32_t sd:1; | ||
2500 | uint32_t le:1; | ||
2501 | uint32_t ra:1; | ||
2502 | uint32_t reserved_4_4:1; | ||
2503 | uint32_t dllle:1; | ||
2504 | uint32_t reserved_6_6:1; | ||
2505 | uint32_t flm:1; | ||
2506 | uint32_t reserved_8_15:8; | ||
2507 | uint32_t lme:6; | ||
2508 | uint32_t reserved_22_31:10; | ||
2509 | #endif | ||
2510 | } cn61xx; | ||
2511 | struct cvmx_pciercx_cfg452_s cn63xx; | 1158 | struct cvmx_pciercx_cfg452_s cn63xx; |
2512 | struct cvmx_pciercx_cfg452_s cn63xxp1; | 1159 | struct cvmx_pciercx_cfg452_s cn63xxp1; |
2513 | struct cvmx_pciercx_cfg452_cn61xx cn66xx; | ||
2514 | struct cvmx_pciercx_cfg452_cn61xx cn68xx; | ||
2515 | struct cvmx_pciercx_cfg452_cn61xx cn68xxp1; | ||
2516 | struct cvmx_pciercx_cfg452_cn61xx cnf71xx; | ||
2517 | }; | 1160 | }; |
2518 | 1161 | ||
2519 | union cvmx_pciercx_cfg453 { | 1162 | union cvmx_pciercx_cfg453 { |
2520 | uint32_t u32; | 1163 | uint32_t u32; |
2521 | struct cvmx_pciercx_cfg453_s { | 1164 | struct cvmx_pciercx_cfg453_s { |
2522 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2523 | uint32_t dlld:1; | 1165 | uint32_t dlld:1; |
2524 | uint32_t reserved_26_30:5; | 1166 | uint32_t reserved_26_30:5; |
2525 | uint32_t ack_nak:1; | 1167 | uint32_t ack_nak:1; |
2526 | uint32_t fcd:1; | 1168 | uint32_t fcd:1; |
2527 | uint32_t ilst:24; | 1169 | uint32_t ilst:24; |
2528 | #else | ||
2529 | uint32_t ilst:24; | ||
2530 | uint32_t fcd:1; | ||
2531 | uint32_t ack_nak:1; | ||
2532 | uint32_t reserved_26_30:5; | ||
2533 | uint32_t dlld:1; | ||
2534 | #endif | ||
2535 | } s; | 1170 | } s; |
2536 | struct cvmx_pciercx_cfg453_s cn52xx; | 1171 | struct cvmx_pciercx_cfg453_s cn52xx; |
2537 | struct cvmx_pciercx_cfg453_s cn52xxp1; | 1172 | struct cvmx_pciercx_cfg453_s cn52xxp1; |
2538 | struct cvmx_pciercx_cfg453_s cn56xx; | 1173 | struct cvmx_pciercx_cfg453_s cn56xx; |
2539 | struct cvmx_pciercx_cfg453_s cn56xxp1; | 1174 | struct cvmx_pciercx_cfg453_s cn56xxp1; |
2540 | struct cvmx_pciercx_cfg453_s cn61xx; | ||
2541 | struct cvmx_pciercx_cfg453_s cn63xx; | 1175 | struct cvmx_pciercx_cfg453_s cn63xx; |
2542 | struct cvmx_pciercx_cfg453_s cn63xxp1; | 1176 | struct cvmx_pciercx_cfg453_s cn63xxp1; |
2543 | struct cvmx_pciercx_cfg453_s cn66xx; | ||
2544 | struct cvmx_pciercx_cfg453_s cn68xx; | ||
2545 | struct cvmx_pciercx_cfg453_s cn68xxp1; | ||
2546 | struct cvmx_pciercx_cfg453_s cnf71xx; | ||
2547 | }; | 1177 | }; |
2548 | 1178 | ||
2549 | union cvmx_pciercx_cfg454 { | 1179 | union cvmx_pciercx_cfg454 { |
2550 | uint32_t u32; | 1180 | uint32_t u32; |
2551 | struct cvmx_pciercx_cfg454_s { | 1181 | struct cvmx_pciercx_cfg454_s { |
2552 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2553 | uint32_t cx_nfunc:3; | ||
2554 | uint32_t tmfcwt:5; | ||
2555 | uint32_t tmanlt:5; | ||
2556 | uint32_t tmrt:5; | ||
2557 | uint32_t reserved_11_13:3; | ||
2558 | uint32_t nskps:3; | ||
2559 | uint32_t reserved_0_7:8; | ||
2560 | #else | ||
2561 | uint32_t reserved_0_7:8; | ||
2562 | uint32_t nskps:3; | ||
2563 | uint32_t reserved_11_13:3; | ||
2564 | uint32_t tmrt:5; | ||
2565 | uint32_t tmanlt:5; | ||
2566 | uint32_t tmfcwt:5; | ||
2567 | uint32_t cx_nfunc:3; | ||
2568 | #endif | ||
2569 | } s; | ||
2570 | struct cvmx_pciercx_cfg454_cn52xx { | ||
2571 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2572 | uint32_t reserved_29_31:3; | 1182 | uint32_t reserved_29_31:3; |
2573 | uint32_t tmfcwt:5; | 1183 | uint32_t tmfcwt:5; |
2574 | uint32_t tmanlt:5; | 1184 | uint32_t tmanlt:5; |
@@ -2577,49 +1187,18 @@ union cvmx_pciercx_cfg454 { | |||
2577 | uint32_t nskps:3; | 1187 | uint32_t nskps:3; |
2578 | uint32_t reserved_4_7:4; | 1188 | uint32_t reserved_4_7:4; |
2579 | uint32_t ntss:4; | 1189 | uint32_t ntss:4; |
2580 | #else | 1190 | } s; |
2581 | uint32_t ntss:4; | 1191 | struct cvmx_pciercx_cfg454_s cn52xx; |
2582 | uint32_t reserved_4_7:4; | 1192 | struct cvmx_pciercx_cfg454_s cn52xxp1; |
2583 | uint32_t nskps:3; | 1193 | struct cvmx_pciercx_cfg454_s cn56xx; |
2584 | uint32_t reserved_11_13:3; | 1194 | struct cvmx_pciercx_cfg454_s cn56xxp1; |
2585 | uint32_t tmrt:5; | 1195 | struct cvmx_pciercx_cfg454_s cn63xx; |
2586 | uint32_t tmanlt:5; | 1196 | struct cvmx_pciercx_cfg454_s cn63xxp1; |
2587 | uint32_t tmfcwt:5; | ||
2588 | uint32_t reserved_29_31:3; | ||
2589 | #endif | ||
2590 | } cn52xx; | ||
2591 | struct cvmx_pciercx_cfg454_cn52xx cn52xxp1; | ||
2592 | struct cvmx_pciercx_cfg454_cn52xx cn56xx; | ||
2593 | struct cvmx_pciercx_cfg454_cn52xx cn56xxp1; | ||
2594 | struct cvmx_pciercx_cfg454_cn61xx { | ||
2595 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2596 | uint32_t cx_nfunc:3; | ||
2597 | uint32_t tmfcwt:5; | ||
2598 | uint32_t tmanlt:5; | ||
2599 | uint32_t tmrt:5; | ||
2600 | uint32_t reserved_8_13:6; | ||
2601 | uint32_t mfuncn:8; | ||
2602 | #else | ||
2603 | uint32_t mfuncn:8; | ||
2604 | uint32_t reserved_8_13:6; | ||
2605 | uint32_t tmrt:5; | ||
2606 | uint32_t tmanlt:5; | ||
2607 | uint32_t tmfcwt:5; | ||
2608 | uint32_t cx_nfunc:3; | ||
2609 | #endif | ||
2610 | } cn61xx; | ||
2611 | struct cvmx_pciercx_cfg454_cn52xx cn63xx; | ||
2612 | struct cvmx_pciercx_cfg454_cn52xx cn63xxp1; | ||
2613 | struct cvmx_pciercx_cfg454_cn61xx cn66xx; | ||
2614 | struct cvmx_pciercx_cfg454_cn61xx cn68xx; | ||
2615 | struct cvmx_pciercx_cfg454_cn52xx cn68xxp1; | ||
2616 | struct cvmx_pciercx_cfg454_cn61xx cnf71xx; | ||
2617 | }; | 1197 | }; |
2618 | 1198 | ||
2619 | union cvmx_pciercx_cfg455 { | 1199 | union cvmx_pciercx_cfg455 { |
2620 | uint32_t u32; | 1200 | uint32_t u32; |
2621 | struct cvmx_pciercx_cfg455_s { | 1201 | struct cvmx_pciercx_cfg455_s { |
2622 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2623 | uint32_t m_cfg0_filt:1; | 1202 | uint32_t m_cfg0_filt:1; |
2624 | uint32_t m_io_filt:1; | 1203 | uint32_t m_io_filt:1; |
2625 | uint32_t msg_ctrl:1; | 1204 | uint32_t msg_ctrl:1; |
@@ -2639,291 +1218,152 @@ union cvmx_pciercx_cfg455 { | |||
2639 | uint32_t dfcwt:1; | 1218 | uint32_t dfcwt:1; |
2640 | uint32_t reserved_11_14:4; | 1219 | uint32_t reserved_11_14:4; |
2641 | uint32_t skpiv:11; | 1220 | uint32_t skpiv:11; |
2642 | #else | ||
2643 | uint32_t skpiv:11; | ||
2644 | uint32_t reserved_11_14:4; | ||
2645 | uint32_t dfcwt:1; | ||
2646 | uint32_t m_fun:1; | ||
2647 | uint32_t m_pois_filt:1; | ||
2648 | uint32_t m_bar_match:1; | ||
2649 | uint32_t m_cfg1_filt:1; | ||
2650 | uint32_t m_lk_filt:1; | ||
2651 | uint32_t m_cpl_tag_err:1; | ||
2652 | uint32_t m_cpl_rid_err:1; | ||
2653 | uint32_t m_cpl_fun_err:1; | ||
2654 | uint32_t m_cpl_tc_err:1; | ||
2655 | uint32_t m_cpl_attr_err:1; | ||
2656 | uint32_t m_cpl_len_err:1; | ||
2657 | uint32_t m_ecrc_filt:1; | ||
2658 | uint32_t m_cpl_ecrc_filt:1; | ||
2659 | uint32_t msg_ctrl:1; | ||
2660 | uint32_t m_io_filt:1; | ||
2661 | uint32_t m_cfg0_filt:1; | ||
2662 | #endif | ||
2663 | } s; | 1221 | } s; |
2664 | struct cvmx_pciercx_cfg455_s cn52xx; | 1222 | struct cvmx_pciercx_cfg455_s cn52xx; |
2665 | struct cvmx_pciercx_cfg455_s cn52xxp1; | 1223 | struct cvmx_pciercx_cfg455_s cn52xxp1; |
2666 | struct cvmx_pciercx_cfg455_s cn56xx; | 1224 | struct cvmx_pciercx_cfg455_s cn56xx; |
2667 | struct cvmx_pciercx_cfg455_s cn56xxp1; | 1225 | struct cvmx_pciercx_cfg455_s cn56xxp1; |
2668 | struct cvmx_pciercx_cfg455_s cn61xx; | ||
2669 | struct cvmx_pciercx_cfg455_s cn63xx; | 1226 | struct cvmx_pciercx_cfg455_s cn63xx; |
2670 | struct cvmx_pciercx_cfg455_s cn63xxp1; | 1227 | struct cvmx_pciercx_cfg455_s cn63xxp1; |
2671 | struct cvmx_pciercx_cfg455_s cn66xx; | ||
2672 | struct cvmx_pciercx_cfg455_s cn68xx; | ||
2673 | struct cvmx_pciercx_cfg455_s cn68xxp1; | ||
2674 | struct cvmx_pciercx_cfg455_s cnf71xx; | ||
2675 | }; | 1228 | }; |
2676 | 1229 | ||
2677 | union cvmx_pciercx_cfg456 { | 1230 | union cvmx_pciercx_cfg456 { |
2678 | uint32_t u32; | 1231 | uint32_t u32; |
2679 | struct cvmx_pciercx_cfg456_s { | 1232 | struct cvmx_pciercx_cfg456_s { |
2680 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2681 | uint32_t reserved_4_31:28; | ||
2682 | uint32_t m_handle_flush:1; | ||
2683 | uint32_t m_dabort_4ucpl:1; | ||
2684 | uint32_t m_vend1_drp:1; | ||
2685 | uint32_t m_vend0_drp:1; | ||
2686 | #else | ||
2687 | uint32_t m_vend0_drp:1; | ||
2688 | uint32_t m_vend1_drp:1; | ||
2689 | uint32_t m_dabort_4ucpl:1; | ||
2690 | uint32_t m_handle_flush:1; | ||
2691 | uint32_t reserved_4_31:28; | ||
2692 | #endif | ||
2693 | } s; | ||
2694 | struct cvmx_pciercx_cfg456_cn52xx { | ||
2695 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2696 | uint32_t reserved_2_31:30; | 1233 | uint32_t reserved_2_31:30; |
2697 | uint32_t m_vend1_drp:1; | 1234 | uint32_t m_vend1_drp:1; |
2698 | uint32_t m_vend0_drp:1; | 1235 | uint32_t m_vend0_drp:1; |
2699 | #else | 1236 | } s; |
2700 | uint32_t m_vend0_drp:1; | 1237 | struct cvmx_pciercx_cfg456_s cn52xx; |
2701 | uint32_t m_vend1_drp:1; | 1238 | struct cvmx_pciercx_cfg456_s cn52xxp1; |
2702 | uint32_t reserved_2_31:30; | 1239 | struct cvmx_pciercx_cfg456_s cn56xx; |
2703 | #endif | 1240 | struct cvmx_pciercx_cfg456_s cn56xxp1; |
2704 | } cn52xx; | 1241 | struct cvmx_pciercx_cfg456_s cn63xx; |
2705 | struct cvmx_pciercx_cfg456_cn52xx cn52xxp1; | 1242 | struct cvmx_pciercx_cfg456_s cn63xxp1; |
2706 | struct cvmx_pciercx_cfg456_cn52xx cn56xx; | ||
2707 | struct cvmx_pciercx_cfg456_cn52xx cn56xxp1; | ||
2708 | struct cvmx_pciercx_cfg456_s cn61xx; | ||
2709 | struct cvmx_pciercx_cfg456_cn52xx cn63xx; | ||
2710 | struct cvmx_pciercx_cfg456_cn52xx cn63xxp1; | ||
2711 | struct cvmx_pciercx_cfg456_s cn66xx; | ||
2712 | struct cvmx_pciercx_cfg456_s cn68xx; | ||
2713 | struct cvmx_pciercx_cfg456_cn52xx cn68xxp1; | ||
2714 | struct cvmx_pciercx_cfg456_s cnf71xx; | ||
2715 | }; | 1243 | }; |
2716 | 1244 | ||
2717 | union cvmx_pciercx_cfg458 { | 1245 | union cvmx_pciercx_cfg458 { |
2718 | uint32_t u32; | 1246 | uint32_t u32; |
2719 | struct cvmx_pciercx_cfg458_s { | 1247 | struct cvmx_pciercx_cfg458_s { |
2720 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2721 | uint32_t dbg_info_l32:32; | ||
2722 | #else | ||
2723 | uint32_t dbg_info_l32:32; | 1248 | uint32_t dbg_info_l32:32; |
2724 | #endif | ||
2725 | } s; | 1249 | } s; |
2726 | struct cvmx_pciercx_cfg458_s cn52xx; | 1250 | struct cvmx_pciercx_cfg458_s cn52xx; |
2727 | struct cvmx_pciercx_cfg458_s cn52xxp1; | 1251 | struct cvmx_pciercx_cfg458_s cn52xxp1; |
2728 | struct cvmx_pciercx_cfg458_s cn56xx; | 1252 | struct cvmx_pciercx_cfg458_s cn56xx; |
2729 | struct cvmx_pciercx_cfg458_s cn56xxp1; | 1253 | struct cvmx_pciercx_cfg458_s cn56xxp1; |
2730 | struct cvmx_pciercx_cfg458_s cn61xx; | ||
2731 | struct cvmx_pciercx_cfg458_s cn63xx; | 1254 | struct cvmx_pciercx_cfg458_s cn63xx; |
2732 | struct cvmx_pciercx_cfg458_s cn63xxp1; | 1255 | struct cvmx_pciercx_cfg458_s cn63xxp1; |
2733 | struct cvmx_pciercx_cfg458_s cn66xx; | ||
2734 | struct cvmx_pciercx_cfg458_s cn68xx; | ||
2735 | struct cvmx_pciercx_cfg458_s cn68xxp1; | ||
2736 | struct cvmx_pciercx_cfg458_s cnf71xx; | ||
2737 | }; | 1256 | }; |
2738 | 1257 | ||
2739 | union cvmx_pciercx_cfg459 { | 1258 | union cvmx_pciercx_cfg459 { |
2740 | uint32_t u32; | 1259 | uint32_t u32; |
2741 | struct cvmx_pciercx_cfg459_s { | 1260 | struct cvmx_pciercx_cfg459_s { |
2742 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2743 | uint32_t dbg_info_u32:32; | ||
2744 | #else | ||
2745 | uint32_t dbg_info_u32:32; | 1261 | uint32_t dbg_info_u32:32; |
2746 | #endif | ||
2747 | } s; | 1262 | } s; |
2748 | struct cvmx_pciercx_cfg459_s cn52xx; | 1263 | struct cvmx_pciercx_cfg459_s cn52xx; |
2749 | struct cvmx_pciercx_cfg459_s cn52xxp1; | 1264 | struct cvmx_pciercx_cfg459_s cn52xxp1; |
2750 | struct cvmx_pciercx_cfg459_s cn56xx; | 1265 | struct cvmx_pciercx_cfg459_s cn56xx; |
2751 | struct cvmx_pciercx_cfg459_s cn56xxp1; | 1266 | struct cvmx_pciercx_cfg459_s cn56xxp1; |
2752 | struct cvmx_pciercx_cfg459_s cn61xx; | ||
2753 | struct cvmx_pciercx_cfg459_s cn63xx; | 1267 | struct cvmx_pciercx_cfg459_s cn63xx; |
2754 | struct cvmx_pciercx_cfg459_s cn63xxp1; | 1268 | struct cvmx_pciercx_cfg459_s cn63xxp1; |
2755 | struct cvmx_pciercx_cfg459_s cn66xx; | ||
2756 | struct cvmx_pciercx_cfg459_s cn68xx; | ||
2757 | struct cvmx_pciercx_cfg459_s cn68xxp1; | ||
2758 | struct cvmx_pciercx_cfg459_s cnf71xx; | ||
2759 | }; | 1269 | }; |
2760 | 1270 | ||
2761 | union cvmx_pciercx_cfg460 { | 1271 | union cvmx_pciercx_cfg460 { |
2762 | uint32_t u32; | 1272 | uint32_t u32; |
2763 | struct cvmx_pciercx_cfg460_s { | 1273 | struct cvmx_pciercx_cfg460_s { |
2764 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2765 | uint32_t reserved_20_31:12; | 1274 | uint32_t reserved_20_31:12; |
2766 | uint32_t tphfcc:8; | 1275 | uint32_t tphfcc:8; |
2767 | uint32_t tpdfcc:12; | 1276 | uint32_t tpdfcc:12; |
2768 | #else | ||
2769 | uint32_t tpdfcc:12; | ||
2770 | uint32_t tphfcc:8; | ||
2771 | uint32_t reserved_20_31:12; | ||
2772 | #endif | ||
2773 | } s; | 1277 | } s; |
2774 | struct cvmx_pciercx_cfg460_s cn52xx; | 1278 | struct cvmx_pciercx_cfg460_s cn52xx; |
2775 | struct cvmx_pciercx_cfg460_s cn52xxp1; | 1279 | struct cvmx_pciercx_cfg460_s cn52xxp1; |
2776 | struct cvmx_pciercx_cfg460_s cn56xx; | 1280 | struct cvmx_pciercx_cfg460_s cn56xx; |
2777 | struct cvmx_pciercx_cfg460_s cn56xxp1; | 1281 | struct cvmx_pciercx_cfg460_s cn56xxp1; |
2778 | struct cvmx_pciercx_cfg460_s cn61xx; | ||
2779 | struct cvmx_pciercx_cfg460_s cn63xx; | 1282 | struct cvmx_pciercx_cfg460_s cn63xx; |
2780 | struct cvmx_pciercx_cfg460_s cn63xxp1; | 1283 | struct cvmx_pciercx_cfg460_s cn63xxp1; |
2781 | struct cvmx_pciercx_cfg460_s cn66xx; | ||
2782 | struct cvmx_pciercx_cfg460_s cn68xx; | ||
2783 | struct cvmx_pciercx_cfg460_s cn68xxp1; | ||
2784 | struct cvmx_pciercx_cfg460_s cnf71xx; | ||
2785 | }; | 1284 | }; |
2786 | 1285 | ||
2787 | union cvmx_pciercx_cfg461 { | 1286 | union cvmx_pciercx_cfg461 { |
2788 | uint32_t u32; | 1287 | uint32_t u32; |
2789 | struct cvmx_pciercx_cfg461_s { | 1288 | struct cvmx_pciercx_cfg461_s { |
2790 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2791 | uint32_t reserved_20_31:12; | 1289 | uint32_t reserved_20_31:12; |
2792 | uint32_t tchfcc:8; | 1290 | uint32_t tchfcc:8; |
2793 | uint32_t tcdfcc:12; | 1291 | uint32_t tcdfcc:12; |
2794 | #else | ||
2795 | uint32_t tcdfcc:12; | ||
2796 | uint32_t tchfcc:8; | ||
2797 | uint32_t reserved_20_31:12; | ||
2798 | #endif | ||
2799 | } s; | 1292 | } s; |
2800 | struct cvmx_pciercx_cfg461_s cn52xx; | 1293 | struct cvmx_pciercx_cfg461_s cn52xx; |
2801 | struct cvmx_pciercx_cfg461_s cn52xxp1; | 1294 | struct cvmx_pciercx_cfg461_s cn52xxp1; |
2802 | struct cvmx_pciercx_cfg461_s cn56xx; | 1295 | struct cvmx_pciercx_cfg461_s cn56xx; |
2803 | struct cvmx_pciercx_cfg461_s cn56xxp1; | 1296 | struct cvmx_pciercx_cfg461_s cn56xxp1; |
2804 | struct cvmx_pciercx_cfg461_s cn61xx; | ||
2805 | struct cvmx_pciercx_cfg461_s cn63xx; | 1297 | struct cvmx_pciercx_cfg461_s cn63xx; |
2806 | struct cvmx_pciercx_cfg461_s cn63xxp1; | 1298 | struct cvmx_pciercx_cfg461_s cn63xxp1; |
2807 | struct cvmx_pciercx_cfg461_s cn66xx; | ||
2808 | struct cvmx_pciercx_cfg461_s cn68xx; | ||
2809 | struct cvmx_pciercx_cfg461_s cn68xxp1; | ||
2810 | struct cvmx_pciercx_cfg461_s cnf71xx; | ||
2811 | }; | 1299 | }; |
2812 | 1300 | ||
2813 | union cvmx_pciercx_cfg462 { | 1301 | union cvmx_pciercx_cfg462 { |
2814 | uint32_t u32; | 1302 | uint32_t u32; |
2815 | struct cvmx_pciercx_cfg462_s { | 1303 | struct cvmx_pciercx_cfg462_s { |
2816 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2817 | uint32_t reserved_20_31:12; | 1304 | uint32_t reserved_20_31:12; |
2818 | uint32_t tchfcc:8; | 1305 | uint32_t tchfcc:8; |
2819 | uint32_t tcdfcc:12; | 1306 | uint32_t tcdfcc:12; |
2820 | #else | ||
2821 | uint32_t tcdfcc:12; | ||
2822 | uint32_t tchfcc:8; | ||
2823 | uint32_t reserved_20_31:12; | ||
2824 | #endif | ||
2825 | } s; | 1307 | } s; |
2826 | struct cvmx_pciercx_cfg462_s cn52xx; | 1308 | struct cvmx_pciercx_cfg462_s cn52xx; |
2827 | struct cvmx_pciercx_cfg462_s cn52xxp1; | 1309 | struct cvmx_pciercx_cfg462_s cn52xxp1; |
2828 | struct cvmx_pciercx_cfg462_s cn56xx; | 1310 | struct cvmx_pciercx_cfg462_s cn56xx; |
2829 | struct cvmx_pciercx_cfg462_s cn56xxp1; | 1311 | struct cvmx_pciercx_cfg462_s cn56xxp1; |
2830 | struct cvmx_pciercx_cfg462_s cn61xx; | ||
2831 | struct cvmx_pciercx_cfg462_s cn63xx; | 1312 | struct cvmx_pciercx_cfg462_s cn63xx; |
2832 | struct cvmx_pciercx_cfg462_s cn63xxp1; | 1313 | struct cvmx_pciercx_cfg462_s cn63xxp1; |
2833 | struct cvmx_pciercx_cfg462_s cn66xx; | ||
2834 | struct cvmx_pciercx_cfg462_s cn68xx; | ||
2835 | struct cvmx_pciercx_cfg462_s cn68xxp1; | ||
2836 | struct cvmx_pciercx_cfg462_s cnf71xx; | ||
2837 | }; | 1314 | }; |
2838 | 1315 | ||
2839 | union cvmx_pciercx_cfg463 { | 1316 | union cvmx_pciercx_cfg463 { |
2840 | uint32_t u32; | 1317 | uint32_t u32; |
2841 | struct cvmx_pciercx_cfg463_s { | 1318 | struct cvmx_pciercx_cfg463_s { |
2842 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2843 | uint32_t reserved_3_31:29; | 1319 | uint32_t reserved_3_31:29; |
2844 | uint32_t rqne:1; | 1320 | uint32_t rqne:1; |
2845 | uint32_t trbne:1; | 1321 | uint32_t trbne:1; |
2846 | uint32_t rtlpfccnr:1; | 1322 | uint32_t rtlpfccnr:1; |
2847 | #else | ||
2848 | uint32_t rtlpfccnr:1; | ||
2849 | uint32_t trbne:1; | ||
2850 | uint32_t rqne:1; | ||
2851 | uint32_t reserved_3_31:29; | ||
2852 | #endif | ||
2853 | } s; | 1323 | } s; |
2854 | struct cvmx_pciercx_cfg463_s cn52xx; | 1324 | struct cvmx_pciercx_cfg463_s cn52xx; |
2855 | struct cvmx_pciercx_cfg463_s cn52xxp1; | 1325 | struct cvmx_pciercx_cfg463_s cn52xxp1; |
2856 | struct cvmx_pciercx_cfg463_s cn56xx; | 1326 | struct cvmx_pciercx_cfg463_s cn56xx; |
2857 | struct cvmx_pciercx_cfg463_s cn56xxp1; | 1327 | struct cvmx_pciercx_cfg463_s cn56xxp1; |
2858 | struct cvmx_pciercx_cfg463_s cn61xx; | ||
2859 | struct cvmx_pciercx_cfg463_s cn63xx; | 1328 | struct cvmx_pciercx_cfg463_s cn63xx; |
2860 | struct cvmx_pciercx_cfg463_s cn63xxp1; | 1329 | struct cvmx_pciercx_cfg463_s cn63xxp1; |
2861 | struct cvmx_pciercx_cfg463_s cn66xx; | ||
2862 | struct cvmx_pciercx_cfg463_s cn68xx; | ||
2863 | struct cvmx_pciercx_cfg463_s cn68xxp1; | ||
2864 | struct cvmx_pciercx_cfg463_s cnf71xx; | ||
2865 | }; | 1330 | }; |
2866 | 1331 | ||
2867 | union cvmx_pciercx_cfg464 { | 1332 | union cvmx_pciercx_cfg464 { |
2868 | uint32_t u32; | 1333 | uint32_t u32; |
2869 | struct cvmx_pciercx_cfg464_s { | 1334 | struct cvmx_pciercx_cfg464_s { |
2870 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2871 | uint32_t wrr_vc3:8; | 1335 | uint32_t wrr_vc3:8; |
2872 | uint32_t wrr_vc2:8; | 1336 | uint32_t wrr_vc2:8; |
2873 | uint32_t wrr_vc1:8; | 1337 | uint32_t wrr_vc1:8; |
2874 | uint32_t wrr_vc0:8; | 1338 | uint32_t wrr_vc0:8; |
2875 | #else | ||
2876 | uint32_t wrr_vc0:8; | ||
2877 | uint32_t wrr_vc1:8; | ||
2878 | uint32_t wrr_vc2:8; | ||
2879 | uint32_t wrr_vc3:8; | ||
2880 | #endif | ||
2881 | } s; | 1339 | } s; |
2882 | struct cvmx_pciercx_cfg464_s cn52xx; | 1340 | struct cvmx_pciercx_cfg464_s cn52xx; |
2883 | struct cvmx_pciercx_cfg464_s cn52xxp1; | 1341 | struct cvmx_pciercx_cfg464_s cn52xxp1; |
2884 | struct cvmx_pciercx_cfg464_s cn56xx; | 1342 | struct cvmx_pciercx_cfg464_s cn56xx; |
2885 | struct cvmx_pciercx_cfg464_s cn56xxp1; | 1343 | struct cvmx_pciercx_cfg464_s cn56xxp1; |
2886 | struct cvmx_pciercx_cfg464_s cn61xx; | ||
2887 | struct cvmx_pciercx_cfg464_s cn63xx; | 1344 | struct cvmx_pciercx_cfg464_s cn63xx; |
2888 | struct cvmx_pciercx_cfg464_s cn63xxp1; | 1345 | struct cvmx_pciercx_cfg464_s cn63xxp1; |
2889 | struct cvmx_pciercx_cfg464_s cn66xx; | ||
2890 | struct cvmx_pciercx_cfg464_s cn68xx; | ||
2891 | struct cvmx_pciercx_cfg464_s cn68xxp1; | ||
2892 | struct cvmx_pciercx_cfg464_s cnf71xx; | ||
2893 | }; | 1346 | }; |
2894 | 1347 | ||
2895 | union cvmx_pciercx_cfg465 { | 1348 | union cvmx_pciercx_cfg465 { |
2896 | uint32_t u32; | 1349 | uint32_t u32; |
2897 | struct cvmx_pciercx_cfg465_s { | 1350 | struct cvmx_pciercx_cfg465_s { |
2898 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2899 | uint32_t wrr_vc7:8; | 1351 | uint32_t wrr_vc7:8; |
2900 | uint32_t wrr_vc6:8; | 1352 | uint32_t wrr_vc6:8; |
2901 | uint32_t wrr_vc5:8; | 1353 | uint32_t wrr_vc5:8; |
2902 | uint32_t wrr_vc4:8; | 1354 | uint32_t wrr_vc4:8; |
2903 | #else | ||
2904 | uint32_t wrr_vc4:8; | ||
2905 | uint32_t wrr_vc5:8; | ||
2906 | uint32_t wrr_vc6:8; | ||
2907 | uint32_t wrr_vc7:8; | ||
2908 | #endif | ||
2909 | } s; | 1355 | } s; |
2910 | struct cvmx_pciercx_cfg465_s cn52xx; | 1356 | struct cvmx_pciercx_cfg465_s cn52xx; |
2911 | struct cvmx_pciercx_cfg465_s cn52xxp1; | 1357 | struct cvmx_pciercx_cfg465_s cn52xxp1; |
2912 | struct cvmx_pciercx_cfg465_s cn56xx; | 1358 | struct cvmx_pciercx_cfg465_s cn56xx; |
2913 | struct cvmx_pciercx_cfg465_s cn56xxp1; | 1359 | struct cvmx_pciercx_cfg465_s cn56xxp1; |
2914 | struct cvmx_pciercx_cfg465_s cn61xx; | ||
2915 | struct cvmx_pciercx_cfg465_s cn63xx; | 1360 | struct cvmx_pciercx_cfg465_s cn63xx; |
2916 | struct cvmx_pciercx_cfg465_s cn63xxp1; | 1361 | struct cvmx_pciercx_cfg465_s cn63xxp1; |
2917 | struct cvmx_pciercx_cfg465_s cn66xx; | ||
2918 | struct cvmx_pciercx_cfg465_s cn68xx; | ||
2919 | struct cvmx_pciercx_cfg465_s cn68xxp1; | ||
2920 | struct cvmx_pciercx_cfg465_s cnf71xx; | ||
2921 | }; | 1362 | }; |
2922 | 1363 | ||
2923 | union cvmx_pciercx_cfg466 { | 1364 | union cvmx_pciercx_cfg466 { |
2924 | uint32_t u32; | 1365 | uint32_t u32; |
2925 | struct cvmx_pciercx_cfg466_s { | 1366 | struct cvmx_pciercx_cfg466_s { |
2926 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2927 | uint32_t rx_queue_order:1; | 1367 | uint32_t rx_queue_order:1; |
2928 | uint32_t type_ordering:1; | 1368 | uint32_t type_ordering:1; |
2929 | uint32_t reserved_24_29:6; | 1369 | uint32_t reserved_24_29:6; |
@@ -2931,177 +1371,100 @@ union cvmx_pciercx_cfg466 { | |||
2931 | uint32_t reserved_20_20:1; | 1371 | uint32_t reserved_20_20:1; |
2932 | uint32_t header_credits:8; | 1372 | uint32_t header_credits:8; |
2933 | uint32_t data_credits:12; | 1373 | uint32_t data_credits:12; |
2934 | #else | ||
2935 | uint32_t data_credits:12; | ||
2936 | uint32_t header_credits:8; | ||
2937 | uint32_t reserved_20_20:1; | ||
2938 | uint32_t queue_mode:3; | ||
2939 | uint32_t reserved_24_29:6; | ||
2940 | uint32_t type_ordering:1; | ||
2941 | uint32_t rx_queue_order:1; | ||
2942 | #endif | ||
2943 | } s; | 1374 | } s; |
2944 | struct cvmx_pciercx_cfg466_s cn52xx; | 1375 | struct cvmx_pciercx_cfg466_s cn52xx; |
2945 | struct cvmx_pciercx_cfg466_s cn52xxp1; | 1376 | struct cvmx_pciercx_cfg466_s cn52xxp1; |
2946 | struct cvmx_pciercx_cfg466_s cn56xx; | 1377 | struct cvmx_pciercx_cfg466_s cn56xx; |
2947 | struct cvmx_pciercx_cfg466_s cn56xxp1; | 1378 | struct cvmx_pciercx_cfg466_s cn56xxp1; |
2948 | struct cvmx_pciercx_cfg466_s cn61xx; | ||
2949 | struct cvmx_pciercx_cfg466_s cn63xx; | 1379 | struct cvmx_pciercx_cfg466_s cn63xx; |
2950 | struct cvmx_pciercx_cfg466_s cn63xxp1; | 1380 | struct cvmx_pciercx_cfg466_s cn63xxp1; |
2951 | struct cvmx_pciercx_cfg466_s cn66xx; | ||
2952 | struct cvmx_pciercx_cfg466_s cn68xx; | ||
2953 | struct cvmx_pciercx_cfg466_s cn68xxp1; | ||
2954 | struct cvmx_pciercx_cfg466_s cnf71xx; | ||
2955 | }; | 1381 | }; |
2956 | 1382 | ||
2957 | union cvmx_pciercx_cfg467 { | 1383 | union cvmx_pciercx_cfg467 { |
2958 | uint32_t u32; | 1384 | uint32_t u32; |
2959 | struct cvmx_pciercx_cfg467_s { | 1385 | struct cvmx_pciercx_cfg467_s { |
2960 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2961 | uint32_t reserved_24_31:8; | 1386 | uint32_t reserved_24_31:8; |
2962 | uint32_t queue_mode:3; | 1387 | uint32_t queue_mode:3; |
2963 | uint32_t reserved_20_20:1; | 1388 | uint32_t reserved_20_20:1; |
2964 | uint32_t header_credits:8; | 1389 | uint32_t header_credits:8; |
2965 | uint32_t data_credits:12; | 1390 | uint32_t data_credits:12; |
2966 | #else | ||
2967 | uint32_t data_credits:12; | ||
2968 | uint32_t header_credits:8; | ||
2969 | uint32_t reserved_20_20:1; | ||
2970 | uint32_t queue_mode:3; | ||
2971 | uint32_t reserved_24_31:8; | ||
2972 | #endif | ||
2973 | } s; | 1391 | } s; |
2974 | struct cvmx_pciercx_cfg467_s cn52xx; | 1392 | struct cvmx_pciercx_cfg467_s cn52xx; |
2975 | struct cvmx_pciercx_cfg467_s cn52xxp1; | 1393 | struct cvmx_pciercx_cfg467_s cn52xxp1; |
2976 | struct cvmx_pciercx_cfg467_s cn56xx; | 1394 | struct cvmx_pciercx_cfg467_s cn56xx; |
2977 | struct cvmx_pciercx_cfg467_s cn56xxp1; | 1395 | struct cvmx_pciercx_cfg467_s cn56xxp1; |
2978 | struct cvmx_pciercx_cfg467_s cn61xx; | ||
2979 | struct cvmx_pciercx_cfg467_s cn63xx; | 1396 | struct cvmx_pciercx_cfg467_s cn63xx; |
2980 | struct cvmx_pciercx_cfg467_s cn63xxp1; | 1397 | struct cvmx_pciercx_cfg467_s cn63xxp1; |
2981 | struct cvmx_pciercx_cfg467_s cn66xx; | ||
2982 | struct cvmx_pciercx_cfg467_s cn68xx; | ||
2983 | struct cvmx_pciercx_cfg467_s cn68xxp1; | ||
2984 | struct cvmx_pciercx_cfg467_s cnf71xx; | ||
2985 | }; | 1398 | }; |
2986 | 1399 | ||
2987 | union cvmx_pciercx_cfg468 { | 1400 | union cvmx_pciercx_cfg468 { |
2988 | uint32_t u32; | 1401 | uint32_t u32; |
2989 | struct cvmx_pciercx_cfg468_s { | 1402 | struct cvmx_pciercx_cfg468_s { |
2990 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2991 | uint32_t reserved_24_31:8; | 1403 | uint32_t reserved_24_31:8; |
2992 | uint32_t queue_mode:3; | 1404 | uint32_t queue_mode:3; |
2993 | uint32_t reserved_20_20:1; | 1405 | uint32_t reserved_20_20:1; |
2994 | uint32_t header_credits:8; | 1406 | uint32_t header_credits:8; |
2995 | uint32_t data_credits:12; | 1407 | uint32_t data_credits:12; |
2996 | #else | ||
2997 | uint32_t data_credits:12; | ||
2998 | uint32_t header_credits:8; | ||
2999 | uint32_t reserved_20_20:1; | ||
3000 | uint32_t queue_mode:3; | ||
3001 | uint32_t reserved_24_31:8; | ||
3002 | #endif | ||
3003 | } s; | 1408 | } s; |
3004 | struct cvmx_pciercx_cfg468_s cn52xx; | 1409 | struct cvmx_pciercx_cfg468_s cn52xx; |
3005 | struct cvmx_pciercx_cfg468_s cn52xxp1; | 1410 | struct cvmx_pciercx_cfg468_s cn52xxp1; |
3006 | struct cvmx_pciercx_cfg468_s cn56xx; | 1411 | struct cvmx_pciercx_cfg468_s cn56xx; |
3007 | struct cvmx_pciercx_cfg468_s cn56xxp1; | 1412 | struct cvmx_pciercx_cfg468_s cn56xxp1; |
3008 | struct cvmx_pciercx_cfg468_s cn61xx; | ||
3009 | struct cvmx_pciercx_cfg468_s cn63xx; | 1413 | struct cvmx_pciercx_cfg468_s cn63xx; |
3010 | struct cvmx_pciercx_cfg468_s cn63xxp1; | 1414 | struct cvmx_pciercx_cfg468_s cn63xxp1; |
3011 | struct cvmx_pciercx_cfg468_s cn66xx; | ||
3012 | struct cvmx_pciercx_cfg468_s cn68xx; | ||
3013 | struct cvmx_pciercx_cfg468_s cn68xxp1; | ||
3014 | struct cvmx_pciercx_cfg468_s cnf71xx; | ||
3015 | }; | 1415 | }; |
3016 | 1416 | ||
3017 | union cvmx_pciercx_cfg490 { | 1417 | union cvmx_pciercx_cfg490 { |
3018 | uint32_t u32; | 1418 | uint32_t u32; |
3019 | struct cvmx_pciercx_cfg490_s { | 1419 | struct cvmx_pciercx_cfg490_s { |
3020 | #ifdef __BIG_ENDIAN_BITFIELD | ||
3021 | uint32_t reserved_26_31:6; | 1420 | uint32_t reserved_26_31:6; |
3022 | uint32_t header_depth:10; | 1421 | uint32_t header_depth:10; |
3023 | uint32_t reserved_14_15:2; | 1422 | uint32_t reserved_14_15:2; |
3024 | uint32_t data_depth:14; | 1423 | uint32_t data_depth:14; |
3025 | #else | ||
3026 | uint32_t data_depth:14; | ||
3027 | uint32_t reserved_14_15:2; | ||
3028 | uint32_t header_depth:10; | ||
3029 | uint32_t reserved_26_31:6; | ||
3030 | #endif | ||
3031 | } s; | 1424 | } s; |
3032 | struct cvmx_pciercx_cfg490_s cn52xx; | 1425 | struct cvmx_pciercx_cfg490_s cn52xx; |
3033 | struct cvmx_pciercx_cfg490_s cn52xxp1; | 1426 | struct cvmx_pciercx_cfg490_s cn52xxp1; |
3034 | struct cvmx_pciercx_cfg490_s cn56xx; | 1427 | struct cvmx_pciercx_cfg490_s cn56xx; |
3035 | struct cvmx_pciercx_cfg490_s cn56xxp1; | 1428 | struct cvmx_pciercx_cfg490_s cn56xxp1; |
3036 | struct cvmx_pciercx_cfg490_s cn61xx; | ||
3037 | struct cvmx_pciercx_cfg490_s cn63xx; | 1429 | struct cvmx_pciercx_cfg490_s cn63xx; |
3038 | struct cvmx_pciercx_cfg490_s cn63xxp1; | 1430 | struct cvmx_pciercx_cfg490_s cn63xxp1; |
3039 | struct cvmx_pciercx_cfg490_s cn66xx; | ||
3040 | struct cvmx_pciercx_cfg490_s cn68xx; | ||
3041 | struct cvmx_pciercx_cfg490_s cn68xxp1; | ||
3042 | struct cvmx_pciercx_cfg490_s cnf71xx; | ||
3043 | }; | 1431 | }; |
3044 | 1432 | ||
3045 | union cvmx_pciercx_cfg491 { | 1433 | union cvmx_pciercx_cfg491 { |
3046 | uint32_t u32; | 1434 | uint32_t u32; |
3047 | struct cvmx_pciercx_cfg491_s { | 1435 | struct cvmx_pciercx_cfg491_s { |
3048 | #ifdef __BIG_ENDIAN_BITFIELD | ||
3049 | uint32_t reserved_26_31:6; | 1436 | uint32_t reserved_26_31:6; |
3050 | uint32_t header_depth:10; | 1437 | uint32_t header_depth:10; |
3051 | uint32_t reserved_14_15:2; | 1438 | uint32_t reserved_14_15:2; |
3052 | uint32_t data_depth:14; | 1439 | uint32_t data_depth:14; |
3053 | #else | ||
3054 | uint32_t data_depth:14; | ||
3055 | uint32_t reserved_14_15:2; | ||
3056 | uint32_t header_depth:10; | ||
3057 | uint32_t reserved_26_31:6; | ||
3058 | #endif | ||
3059 | } s; | 1440 | } s; |
3060 | struct cvmx_pciercx_cfg491_s cn52xx; | 1441 | struct cvmx_pciercx_cfg491_s cn52xx; |
3061 | struct cvmx_pciercx_cfg491_s cn52xxp1; | 1442 | struct cvmx_pciercx_cfg491_s cn52xxp1; |
3062 | struct cvmx_pciercx_cfg491_s cn56xx; | 1443 | struct cvmx_pciercx_cfg491_s cn56xx; |
3063 | struct cvmx_pciercx_cfg491_s cn56xxp1; | 1444 | struct cvmx_pciercx_cfg491_s cn56xxp1; |
3064 | struct cvmx_pciercx_cfg491_s cn61xx; | ||
3065 | struct cvmx_pciercx_cfg491_s cn63xx; | 1445 | struct cvmx_pciercx_cfg491_s cn63xx; |
3066 | struct cvmx_pciercx_cfg491_s cn63xxp1; | 1446 | struct cvmx_pciercx_cfg491_s cn63xxp1; |
3067 | struct cvmx_pciercx_cfg491_s cn66xx; | ||
3068 | struct cvmx_pciercx_cfg491_s cn68xx; | ||
3069 | struct cvmx_pciercx_cfg491_s cn68xxp1; | ||
3070 | struct cvmx_pciercx_cfg491_s cnf71xx; | ||
3071 | }; | 1447 | }; |
3072 | 1448 | ||
3073 | union cvmx_pciercx_cfg492 { | 1449 | union cvmx_pciercx_cfg492 { |
3074 | uint32_t u32; | 1450 | uint32_t u32; |
3075 | struct cvmx_pciercx_cfg492_s { | 1451 | struct cvmx_pciercx_cfg492_s { |
3076 | #ifdef __BIG_ENDIAN_BITFIELD | ||
3077 | uint32_t reserved_26_31:6; | 1452 | uint32_t reserved_26_31:6; |
3078 | uint32_t header_depth:10; | 1453 | uint32_t header_depth:10; |
3079 | uint32_t reserved_14_15:2; | 1454 | uint32_t reserved_14_15:2; |
3080 | uint32_t data_depth:14; | 1455 | uint32_t data_depth:14; |
3081 | #else | ||
3082 | uint32_t data_depth:14; | ||
3083 | uint32_t reserved_14_15:2; | ||
3084 | uint32_t header_depth:10; | ||
3085 | uint32_t reserved_26_31:6; | ||
3086 | #endif | ||
3087 | } s; | 1456 | } s; |
3088 | struct cvmx_pciercx_cfg492_s cn52xx; | 1457 | struct cvmx_pciercx_cfg492_s cn52xx; |
3089 | struct cvmx_pciercx_cfg492_s cn52xxp1; | 1458 | struct cvmx_pciercx_cfg492_s cn52xxp1; |
3090 | struct cvmx_pciercx_cfg492_s cn56xx; | 1459 | struct cvmx_pciercx_cfg492_s cn56xx; |
3091 | struct cvmx_pciercx_cfg492_s cn56xxp1; | 1460 | struct cvmx_pciercx_cfg492_s cn56xxp1; |
3092 | struct cvmx_pciercx_cfg492_s cn61xx; | ||
3093 | struct cvmx_pciercx_cfg492_s cn63xx; | 1461 | struct cvmx_pciercx_cfg492_s cn63xx; |
3094 | struct cvmx_pciercx_cfg492_s cn63xxp1; | 1462 | struct cvmx_pciercx_cfg492_s cn63xxp1; |
3095 | struct cvmx_pciercx_cfg492_s cn66xx; | ||
3096 | struct cvmx_pciercx_cfg492_s cn68xx; | ||
3097 | struct cvmx_pciercx_cfg492_s cn68xxp1; | ||
3098 | struct cvmx_pciercx_cfg492_s cnf71xx; | ||
3099 | }; | 1463 | }; |
3100 | 1464 | ||
3101 | union cvmx_pciercx_cfg515 { | 1465 | union cvmx_pciercx_cfg515 { |
3102 | uint32_t u32; | 1466 | uint32_t u32; |
3103 | struct cvmx_pciercx_cfg515_s { | 1467 | struct cvmx_pciercx_cfg515_s { |
3104 | #ifdef __BIG_ENDIAN_BITFIELD | ||
3105 | uint32_t reserved_21_31:11; | 1468 | uint32_t reserved_21_31:11; |
3106 | uint32_t s_d_e:1; | 1469 | uint32_t s_d_e:1; |
3107 | uint32_t ctcrb:1; | 1470 | uint32_t ctcrb:1; |
@@ -3109,67 +1472,35 @@ union cvmx_pciercx_cfg515 { | |||
3109 | uint32_t dsc:1; | 1472 | uint32_t dsc:1; |
3110 | uint32_t le:9; | 1473 | uint32_t le:9; |
3111 | uint32_t n_fts:8; | 1474 | uint32_t n_fts:8; |
3112 | #else | ||
3113 | uint32_t n_fts:8; | ||
3114 | uint32_t le:9; | ||
3115 | uint32_t dsc:1; | ||
3116 | uint32_t cpyts:1; | ||
3117 | uint32_t ctcrb:1; | ||
3118 | uint32_t s_d_e:1; | ||
3119 | uint32_t reserved_21_31:11; | ||
3120 | #endif | ||
3121 | } s; | 1475 | } s; |
3122 | struct cvmx_pciercx_cfg515_s cn61xx; | ||
3123 | struct cvmx_pciercx_cfg515_s cn63xx; | 1476 | struct cvmx_pciercx_cfg515_s cn63xx; |
3124 | struct cvmx_pciercx_cfg515_s cn63xxp1; | 1477 | struct cvmx_pciercx_cfg515_s cn63xxp1; |
3125 | struct cvmx_pciercx_cfg515_s cn66xx; | ||
3126 | struct cvmx_pciercx_cfg515_s cn68xx; | ||
3127 | struct cvmx_pciercx_cfg515_s cn68xxp1; | ||
3128 | struct cvmx_pciercx_cfg515_s cnf71xx; | ||
3129 | }; | 1478 | }; |
3130 | 1479 | ||
3131 | union cvmx_pciercx_cfg516 { | 1480 | union cvmx_pciercx_cfg516 { |
3132 | uint32_t u32; | 1481 | uint32_t u32; |
3133 | struct cvmx_pciercx_cfg516_s { | 1482 | struct cvmx_pciercx_cfg516_s { |
3134 | #ifdef __BIG_ENDIAN_BITFIELD | ||
3135 | uint32_t phy_stat:32; | ||
3136 | #else | ||
3137 | uint32_t phy_stat:32; | 1483 | uint32_t phy_stat:32; |
3138 | #endif | ||
3139 | } s; | 1484 | } s; |
3140 | struct cvmx_pciercx_cfg516_s cn52xx; | 1485 | struct cvmx_pciercx_cfg516_s cn52xx; |
3141 | struct cvmx_pciercx_cfg516_s cn52xxp1; | 1486 | struct cvmx_pciercx_cfg516_s cn52xxp1; |
3142 | struct cvmx_pciercx_cfg516_s cn56xx; | 1487 | struct cvmx_pciercx_cfg516_s cn56xx; |
3143 | struct cvmx_pciercx_cfg516_s cn56xxp1; | 1488 | struct cvmx_pciercx_cfg516_s cn56xxp1; |
3144 | struct cvmx_pciercx_cfg516_s cn61xx; | ||
3145 | struct cvmx_pciercx_cfg516_s cn63xx; | 1489 | struct cvmx_pciercx_cfg516_s cn63xx; |
3146 | struct cvmx_pciercx_cfg516_s cn63xxp1; | 1490 | struct cvmx_pciercx_cfg516_s cn63xxp1; |
3147 | struct cvmx_pciercx_cfg516_s cn66xx; | ||
3148 | struct cvmx_pciercx_cfg516_s cn68xx; | ||
3149 | struct cvmx_pciercx_cfg516_s cn68xxp1; | ||
3150 | struct cvmx_pciercx_cfg516_s cnf71xx; | ||
3151 | }; | 1491 | }; |
3152 | 1492 | ||
3153 | union cvmx_pciercx_cfg517 { | 1493 | union cvmx_pciercx_cfg517 { |
3154 | uint32_t u32; | 1494 | uint32_t u32; |
3155 | struct cvmx_pciercx_cfg517_s { | 1495 | struct cvmx_pciercx_cfg517_s { |
3156 | #ifdef __BIG_ENDIAN_BITFIELD | ||
3157 | uint32_t phy_ctrl:32; | ||
3158 | #else | ||
3159 | uint32_t phy_ctrl:32; | 1496 | uint32_t phy_ctrl:32; |
3160 | #endif | ||
3161 | } s; | 1497 | } s; |
3162 | struct cvmx_pciercx_cfg517_s cn52xx; | 1498 | struct cvmx_pciercx_cfg517_s cn52xx; |
3163 | struct cvmx_pciercx_cfg517_s cn52xxp1; | 1499 | struct cvmx_pciercx_cfg517_s cn52xxp1; |
3164 | struct cvmx_pciercx_cfg517_s cn56xx; | 1500 | struct cvmx_pciercx_cfg517_s cn56xx; |
3165 | struct cvmx_pciercx_cfg517_s cn56xxp1; | 1501 | struct cvmx_pciercx_cfg517_s cn56xxp1; |
3166 | struct cvmx_pciercx_cfg517_s cn61xx; | ||
3167 | struct cvmx_pciercx_cfg517_s cn63xx; | 1502 | struct cvmx_pciercx_cfg517_s cn63xx; |
3168 | struct cvmx_pciercx_cfg517_s cn63xxp1; | 1503 | struct cvmx_pciercx_cfg517_s cn63xxp1; |
3169 | struct cvmx_pciercx_cfg517_s cn66xx; | ||
3170 | struct cvmx_pciercx_cfg517_s cn68xx; | ||
3171 | struct cvmx_pciercx_cfg517_s cn68xxp1; | ||
3172 | struct cvmx_pciercx_cfg517_s cnf71xx; | ||
3173 | }; | 1504 | }; |
3174 | 1505 | ||
3175 | #endif | 1506 | #endif |