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Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-l2t-defs.h')
-rw-r--r--arch/mips/include/asm/octeon/cvmx-l2t-defs.h105
1 files changed, 104 insertions, 1 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-l2t-defs.h b/arch/mips/include/asm/octeon/cvmx-l2t-defs.h
index 873968f55ee..83ce22c080e 100644
--- a/arch/mips/include/asm/octeon/cvmx-l2t-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-l2t-defs.h
@@ -4,7 +4,7 @@
4 * Contact: support@caviumnetworks.com 4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK 5 * This file is part of the OCTEON SDK
6 * 6 *
7 * Copyright (c) 2003-2010 Cavium Networks 7 * Copyright (c) 2003-2012 Cavium Networks
8 * 8 *
9 * This file is free software; you can redistribute it and/or modify 9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as 10 * it under the terms of the GNU General Public License, Version 2, as
@@ -33,6 +33,7 @@
33union cvmx_l2t_err { 33union cvmx_l2t_err {
34 uint64_t u64; 34 uint64_t u64;
35 struct cvmx_l2t_err_s { 35 struct cvmx_l2t_err_s {
36#ifdef __BIG_ENDIAN_BITFIELD
36 uint64_t reserved_29_63:35; 37 uint64_t reserved_29_63:35;
37 uint64_t fadru:1; 38 uint64_t fadru:1;
38 uint64_t lck_intena2:1; 39 uint64_t lck_intena2:1;
@@ -47,8 +48,25 @@ union cvmx_l2t_err {
47 uint64_t ded_intena:1; 48 uint64_t ded_intena:1;
48 uint64_t sec_intena:1; 49 uint64_t sec_intena:1;
49 uint64_t ecc_ena:1; 50 uint64_t ecc_ena:1;
51#else
52 uint64_t ecc_ena:1;
53 uint64_t sec_intena:1;
54 uint64_t ded_intena:1;
55 uint64_t sec_err:1;
56 uint64_t ded_err:1;
57 uint64_t fsyn:6;
58 uint64_t fadr:10;
59 uint64_t fset:3;
60 uint64_t lckerr:1;
61 uint64_t lck_intena:1;
62 uint64_t lckerr2:1;
63 uint64_t lck_intena2:1;
64 uint64_t fadru:1;
65 uint64_t reserved_29_63:35;
66#endif
50 } s; 67 } s;
51 struct cvmx_l2t_err_cn30xx { 68 struct cvmx_l2t_err_cn30xx {
69#ifdef __BIG_ENDIAN_BITFIELD
52 uint64_t reserved_28_63:36; 70 uint64_t reserved_28_63:36;
53 uint64_t lck_intena2:1; 71 uint64_t lck_intena2:1;
54 uint64_t lckerr2:1; 72 uint64_t lckerr2:1;
@@ -64,8 +82,26 @@ union cvmx_l2t_err {
64 uint64_t ded_intena:1; 82 uint64_t ded_intena:1;
65 uint64_t sec_intena:1; 83 uint64_t sec_intena:1;
66 uint64_t ecc_ena:1; 84 uint64_t ecc_ena:1;
85#else
86 uint64_t ecc_ena:1;
87 uint64_t sec_intena:1;
88 uint64_t ded_intena:1;
89 uint64_t sec_err:1;
90 uint64_t ded_err:1;
91 uint64_t fsyn:6;
92 uint64_t fadr:8;
93 uint64_t reserved_19_20:2;
94 uint64_t fset:2;
95 uint64_t reserved_23_23:1;
96 uint64_t lckerr:1;
97 uint64_t lck_intena:1;
98 uint64_t lckerr2:1;
99 uint64_t lck_intena2:1;
100 uint64_t reserved_28_63:36;
101#endif
67 } cn30xx; 102 } cn30xx;
68 struct cvmx_l2t_err_cn31xx { 103 struct cvmx_l2t_err_cn31xx {
104#ifdef __BIG_ENDIAN_BITFIELD
69 uint64_t reserved_28_63:36; 105 uint64_t reserved_28_63:36;
70 uint64_t lck_intena2:1; 106 uint64_t lck_intena2:1;
71 uint64_t lckerr2:1; 107 uint64_t lckerr2:1;
@@ -81,8 +117,26 @@ union cvmx_l2t_err {
81 uint64_t ded_intena:1; 117 uint64_t ded_intena:1;
82 uint64_t sec_intena:1; 118 uint64_t sec_intena:1;
83 uint64_t ecc_ena:1; 119 uint64_t ecc_ena:1;
120#else
121 uint64_t ecc_ena:1;
122 uint64_t sec_intena:1;
123 uint64_t ded_intena:1;
124 uint64_t sec_err:1;
125 uint64_t ded_err:1;
126 uint64_t fsyn:6;
127 uint64_t fadr:9;
128 uint64_t reserved_20_20:1;
129 uint64_t fset:2;
130 uint64_t reserved_23_23:1;
131 uint64_t lckerr:1;
132 uint64_t lck_intena:1;
133 uint64_t lckerr2:1;
134 uint64_t lck_intena2:1;
135 uint64_t reserved_28_63:36;
136#endif
84 } cn31xx; 137 } cn31xx;
85 struct cvmx_l2t_err_cn38xx { 138 struct cvmx_l2t_err_cn38xx {
139#ifdef __BIG_ENDIAN_BITFIELD
86 uint64_t reserved_28_63:36; 140 uint64_t reserved_28_63:36;
87 uint64_t lck_intena2:1; 141 uint64_t lck_intena2:1;
88 uint64_t lckerr2:1; 142 uint64_t lckerr2:1;
@@ -96,9 +150,25 @@ union cvmx_l2t_err {
96 uint64_t ded_intena:1; 150 uint64_t ded_intena:1;
97 uint64_t sec_intena:1; 151 uint64_t sec_intena:1;
98 uint64_t ecc_ena:1; 152 uint64_t ecc_ena:1;
153#else
154 uint64_t ecc_ena:1;
155 uint64_t sec_intena:1;
156 uint64_t ded_intena:1;
157 uint64_t sec_err:1;
158 uint64_t ded_err:1;
159 uint64_t fsyn:6;
160 uint64_t fadr:10;
161 uint64_t fset:3;
162 uint64_t lckerr:1;
163 uint64_t lck_intena:1;
164 uint64_t lckerr2:1;
165 uint64_t lck_intena2:1;
166 uint64_t reserved_28_63:36;
167#endif
99 } cn38xx; 168 } cn38xx;
100 struct cvmx_l2t_err_cn38xx cn38xxp2; 169 struct cvmx_l2t_err_cn38xx cn38xxp2;
101 struct cvmx_l2t_err_cn50xx { 170 struct cvmx_l2t_err_cn50xx {
171#ifdef __BIG_ENDIAN_BITFIELD
102 uint64_t reserved_28_63:36; 172 uint64_t reserved_28_63:36;
103 uint64_t lck_intena2:1; 173 uint64_t lck_intena2:1;
104 uint64_t lckerr2:1; 174 uint64_t lckerr2:1;
@@ -113,8 +183,25 @@ union cvmx_l2t_err {
113 uint64_t ded_intena:1; 183 uint64_t ded_intena:1;
114 uint64_t sec_intena:1; 184 uint64_t sec_intena:1;
115 uint64_t ecc_ena:1; 185 uint64_t ecc_ena:1;
186#else
187 uint64_t ecc_ena:1;
188 uint64_t sec_intena:1;
189 uint64_t ded_intena:1;
190 uint64_t sec_err:1;
191 uint64_t ded_err:1;
192 uint64_t fsyn:6;
193 uint64_t fadr:7;
194 uint64_t reserved_18_20:3;
195 uint64_t fset:3;
196 uint64_t lckerr:1;
197 uint64_t lck_intena:1;
198 uint64_t lckerr2:1;
199 uint64_t lck_intena2:1;
200 uint64_t reserved_28_63:36;
201#endif
116 } cn50xx; 202 } cn50xx;
117 struct cvmx_l2t_err_cn52xx { 203 struct cvmx_l2t_err_cn52xx {
204#ifdef __BIG_ENDIAN_BITFIELD
118 uint64_t reserved_28_63:36; 205 uint64_t reserved_28_63:36;
119 uint64_t lck_intena2:1; 206 uint64_t lck_intena2:1;
120 uint64_t lckerr2:1; 207 uint64_t lckerr2:1;
@@ -129,6 +216,22 @@ union cvmx_l2t_err {
129 uint64_t ded_intena:1; 216 uint64_t ded_intena:1;
130 uint64_t sec_intena:1; 217 uint64_t sec_intena:1;
131 uint64_t ecc_ena:1; 218 uint64_t ecc_ena:1;
219#else
220 uint64_t ecc_ena:1;
221 uint64_t sec_intena:1;
222 uint64_t ded_intena:1;
223 uint64_t sec_err:1;
224 uint64_t ded_err:1;
225 uint64_t fsyn:6;
226 uint64_t fadr:9;
227 uint64_t reserved_20_20:1;
228 uint64_t fset:3;
229 uint64_t lckerr:1;
230 uint64_t lck_intena:1;
231 uint64_t lckerr2:1;
232 uint64_t lck_intena2:1;
233 uint64_t reserved_28_63:36;
234#endif
132 } cn52xx; 235 } cn52xx;
133 struct cvmx_l2t_err_cn52xx cn52xxp1; 236 struct cvmx_l2t_err_cn52xx cn52xxp1;
134 struct cvmx_l2t_err_s cn56xx; 237 struct cvmx_l2t_err_s cn56xx;